CN300/STU/src_middlewares/stm32fxx_STUstartup.c

#include "stm32f1xx_hal.h"

#define ALLOC_GLOBALS
#include "stm32fxx_STUlib.h"
//#include "motor_control.h"
//#include "power12V_driver.h"
#include "tasks.h"
#include "can.h"
#include "gpio.h"


uint8_t  FIT_testflag=1;

//static uint32_t sRomTestData=0x55555555; //0x55555554

CRC_HandleTypeDef CrcHandle = {0};

void StartUpClock_Config_Reset(void);

//#ifdef __CC_ARM             /* KEIL Compiler */
	void $Sub$$main(void)
  {
		__disable_irq();
		if ( CRC_FLAG != 0xAAu )
		{
			STU_StartUp();		/* trick to call StartUp before main entry */
		}
		CRC_FLAG = 0u;
		__enable_irq();
		$Super$$main(); 
	}
//#endif /* __CC_ARM */
	
void STU_StartUp(void)
{
	uint32_t crc_result;
  uint32_t index;
	
	/* Reset of all peripherals, Initializes the Flash interface and the Systick */
  HAL_Init();
	
	/*时钟倍频到72Mhz*/
	StartUpClock_Config();
	
//	/*FIT*/
//	FIT_rom_test();
	
	
	/* Initialization of counters for control flow monitoring */
  init_control_flow();
	
	/*--------------------------------------------------------------------------*/
  /*------------------- CPU registers test --------------------*/
  /*--------------------------------------------------------------------------*/
	control_flow_call(CPU_TEST_CALLER);
	
	STU_CpuTestStartup();

	control_flow_resume(CPU_TEST_CALLER);
		
	STU_CPURegsAddressing();
	
	/*--------------------------------------------------------------------------*/
  /*--------------------- ROM CRC check ------------------------*/
  /*--------------------------------------------------------------------------*/
	control_flow_call(CRC32_TEST_CALLER);
	
	CrcHandle.Instance = CRC;
	__HAL_CRC_DR_RESET(&CrcHandle);
 	HAL_CRC_Init(&CrcHandle);
	
	for(index = 0; index < (uint32_t)ROM_SIZEinWORDS; index++)
  {
    CRC->DR = (*((uint32_t *)ROM_START + index));
  }
  crc_result = CRC->DR;
	
	if(crc_result != *(uint32_t *)(&REF_CRC32))
	{
		/*ROM err*/
		FailSafePOR();
	}
	
	control_flow_resume(CRC32_TEST_CALLER);
	
	/*--------------------------------------------------------------------------*/
  /* --------------------- Instruct and decode test -------------------*/
  /*--------------------------------------------------------------------------*/
	control_flow_call(INSTRUCT_AND_DECODE_TEST_CALLER);
	
	if(STU_InstructAndDecode() == ERROR)
	{
		FailSafePOR();
	}
	
	control_flow_resume(INSTRUCT_AND_DECODE_TEST_CALLER);
	
	/*--------------------------------------------------------------------------*/
  /* --------------------- Addressing test -------------------*/
  /*--------------------------------------------------------------------------*/
	control_flow_call(ADDRESSING_TEST_CALLER);
	
	if(STU_AddressingTest() == ERROR)
	{
		FailSafePOR();
	}
	
	control_flow_resume(ADDRESSING_TEST_CALLER);
	
	/*--------------------------------------------------------------------------*/
  /* --------------------- Peripheral Registers test -------------------*/
  /*--------------------------------------------------------------------------*/
	control_flow_call(PERIPHERAL_REGS_TEST_CALLER);
	
	if(STU_PeripheralRegistersTest() == ERROR)
	{
		FailSafePOR();
	}
	
	/*做两次测试，确保0->1,1->0均能有效翻转*/
	if(STU_PeripheralRegistersTest() == ERROR)
	{
		FailSafePOR();
	}
	
	control_flow_resume(PERIPHERAL_REGS_TEST_CALLER);
	
	/*--------------------------------------------------------------------------*/
  /*   Verify Control flow before RAM init (which clears Ctrl flow counters)  */
  /*--------------------------------------------------------------------------*/
	 if (control_flow_check_point(STARTUP_CHECK) == ERROR)
  {
     FailSafePOR();
  }
	
	/*--------------------------------------------------------------------------*/
  /* --------------------- RAM functional test -------------------*/
  /*--------------------------------------------------------------------------*/
	//__disable_irq();
	
	if(STU_FullRamWalkpat((uint32_t *)RAM_START ,RAM_SIZE) == ERROR)
	{
		FailSafePOR();
	}
	
	//__enable_irq();
	
	/*复位时钟到默认状态*/
	StartUpClock_Config_Reset();
	
	GotoCompilerStartUp();
}




void StartUpClock_Config(void)
//{
//	RCC_OscInitTypeDef RCC_OscInitStruct;
//  RCC_ClkInitTypeDef RCC_ClkInitStruct;

//    /**Initializes the CPU, AHB and APB busses clocks 
//    */
//  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
//  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
//  RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
//  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
//  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
//  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
//  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
//  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
//  {
//    _Error_Handler(__FILE__, __LINE__);
//  }

//    /**Initializes the CPU, AHB and APB busses clocks 
//    */
//  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
//                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
//  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
//  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
//  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
//  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

//  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
//  {
//    _Error_Handler(__FILE__, __LINE__);
//  }

//    /**Configure the Systick interrupt time 
//    */
//  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);

//    /**Configure the Systick 
//    */
//  HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);

//  /* SysTick_IRQn interrupt configuration */
//  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
//}
{

  RCC_OscInitTypeDef RCC_OscInitStruct;
  RCC_ClkInitTypeDef RCC_ClkInitStruct;
  RCC_PeriphCLKInitTypeDef PeriphClkInit;

    /**Initializes the CPU, AHB and APB busses clocks 
    */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  {
    _Error_Handler(__FILE__, __LINE__);
  }

    /**Initializes the CPU, AHB and APB busses clocks 
    */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
  {
    _Error_Handler(__FILE__, __LINE__);
  }

  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
  PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
  {
    _Error_Handler(__FILE__, __LINE__);
  }

    /**Configure the Systick interrupt time 
    */
  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);

    /**Configure the Systick 
    */
  HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);

  /* SysTick_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
}

/**
  * @brief System Clock Configuration
  * @retval None
  */
void StartUpClock_Config_Reset(void)
{

  RCC_OscInitTypeDef RCC_OscInitStruct;
  RCC_ClkInitTypeDef RCC_ClkInitStruct;

    /**Initializes the CPU, AHB and APB busses clocks 
    */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  RCC_OscInitStruct.HSICalibrationValue = 16;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  {
    _Error_Handler(__FILE__, __LINE__);
  }

    /**Initializes the CPU, AHB and APB busses clocks 
    */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
  {
    _Error_Handler(__FILE__, __LINE__);
  }

    /**Configure the Systick interrupt time 
    */
  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);

    /**Configure the Systick 
    */
  HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);

  /* SysTick_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
}


/**
  * @brief  Verifies the consistency and value of control flow counters
  * @param  : check value of the positive counter
  * @retval : ErrorStatus (SUCCESS, ERROR)
  */
ErrorStatus control_flow_check_point(uint32_t chck)
{
  ErrorStatus Result= SUCCESS;
  
  if ((CtrlFlowCnt != (chck)) || ((CtrlFlowCnt ^ CtrlFlowCntInv) != 0xFFFFFFFFuL))
  {
    Result= ERROR;
  }
  return(Result);
}


void FailSafePOR(void)
{		
	__enable_irq();
	
	 MX_GPIO_Init();
	 MX_CAN_Init();	
	
	while(1)
	{
		//MCU故障
		PBU_hardwareErrorCode.ERROR_Bit.MCU_Fault = 1;		
		SendData(ID_PBU_BC, MODE_REPORT, 0x1504, (uint8_t*)&PBU_ErrorCode.Code);
		HAL_Delay(200);		
	}
}