stm32f1xx_hal_spi.c 75 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_spi.c
  4. * @author MCD Application Team
  5. * @version V1.0.4
  6. * @date 29-April-2016
  7. * @brief SPI HAL module driver.
  8. *
  9. * This file provides firmware functions to manage the following
  10. * functionalities of the Serial Peripheral Interface (SPI) peripheral:
  11. * + Initialization and de-initialization functions
  12. * + IO operation functions
  13. * + Peripheral Control functions
  14. * + Peripheral State functions
  15. @verbatim
  16. ==============================================================================
  17. ##### How to use this driver #####
  18. ==============================================================================
  19. [..]
  20. The SPI HAL driver can be used as follows:
  21. (#) Declare a SPI_HandleTypeDef handle structure, for example:
  22. SPI_HandleTypeDef hspi;
  23. (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit ()API:
  24. (##) Enable the SPIx interface clock
  25. (##) SPI pins configuration
  26. (+++) Enable the clock for the SPI GPIOs
  27. (+++) Configure these SPI pins as alternate function push-pull
  28. (##) NVIC configuration if you need to use interrupt process
  29. (+++) Configure the SPIx interrupt priority
  30. (+++) Enable the NVIC SPI IRQ handle
  31. (##) DMA Configuration if you need to use DMA process
  32. (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive Channel
  33. (+++) Enable the DMAx clock
  34. (+++) Configure the DMA handle parameters
  35. (+++) Configure the DMA Tx or Rx Channel
  36. (+++) Associate the initilalized hdma_tx(or _rx) handle to the hspi DMA Tx (or Rx) handle
  37. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx or Rx Channel
  38. (#) Program the Mode, Direction , Data size, Baudrate Prescaler, NSS
  39. management, Clock polarity and phase, FirstBit and CRC configuration in the hspi Init structure.
  40. (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
  41. (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
  42. by calling the customed HAL_SPI_MspInit() API.
  43. [..]
  44. Circular mode restriction:
  45. (#) The DMA circular mode cannot be used when the SPI is configured in these modes:
  46. (##) Master 2Lines RxOnly
  47. (##) Master 1Line Rx
  48. (#) The CRC feature is not managed when the DMA circular mode is enabled
  49. (#) When the SPI DMA Pause/Stop features are used, we must use the following APIs
  50. the HAL_SPI_DMAPause()/ HAL_SPI_DMAStop() only under the SPI callbacks
  51. @endverbatim
  52. ******************************************************************************
  53. * @attention
  54. *
  55. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  56. *
  57. * Redistribution and use in source and binary forms, with or without modification,
  58. * are permitted provided that the following conditions are met:
  59. * 1. Redistributions of source code must retain the above copyright notice,
  60. * this list of conditions and the following disclaimer.
  61. * 2. Redistributions in binary form must reproduce the above copyright notice,
  62. * this list of conditions and the following disclaimer in the documentation
  63. * and/or other materials provided with the distribution.
  64. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  65. * may be used to endorse or promote products derived from this software
  66. * without specific prior written permission.
  67. *
  68. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  69. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  70. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  71. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  72. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  73. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  74. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  75. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  76. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  77. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  78. *
  79. ******************************************************************************
  80. */
  81. /*
  82. Using the HAL it is not possible to reach all supported SPI frequency with the differents SPI Modes,
  83. the following table resume the max SPI frequency reached with data size 8bits/16bits,
  84. according to frequency used on APBx Peripheral Clock (fPCLK) used by the SPI instance :
  85. For 8 bits SPI data size transfers :
  86. +--------------------------------------------------------------------------------------------------+
  87. | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line |
  88. | Process | Tranfert mode |-----------------------|-----------------------|-----------------------|
  89. | | | Master | Slave | Master | Slave | Master | Slave |
  90. |==================================================================================================|
  91. | T | Polling | fPCLK/8 | fPCLK/8 | NA | NA | NA | NA |
  92. | X |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  93. | / | Interrupt | fPCLK/32 | fPCLK/32 | NA | NA | NA | NA |
  94. | R |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  95. | X | DMA | fPCLK/2 | fPCLK/4 | NA | NA | NA | NA |
  96. |=========|================|===========|===========|===========|===========|===========|===========|
  97. | | Polling | fPCLK/4 | fPCLK/8 | fPCLK/128 | fPCLK/16 | fPCLK/128 | fPCLK/8 |
  98. | |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  99. | R | Interrupt | fPCLK/32 | fPCLK/16 | fPCLK/128 | fPCLK/16 | fPCLK/128 | fPCLK/16 |
  100. | X |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  101. | | DMA | fPCLK/2 | fPCLK/2 | fPCLK/128 | fPCLK/16 | fPCLK/128 | fPCLK/2 |
  102. |=========|================|===========|===========|===========|===========|===========|===========|
  103. | | Polling | fPCLK/4 | fPCLK/4 | NA | NA | fPCLK/4 | fPCLK/64 |
  104. | |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  105. | T | Interrupt | fPCLK/8 | fPCLK/16 | NA | NA | fPCLK/8 | fPCLK/128 |
  106. | X |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  107. | | DMA | fPCLK/2 | fPCLK/4 | NA | NA | fPCLK/2 | fPCLK/64 |
  108. +--------------------------------------------------------------------------------------------------+
  109. For 16 bits SPI data size transfers :
  110. +--------------------------------------------------------------------------------------------------+
  111. | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line |
  112. | Process | Tranfert mode |-----------------------|-----------------------|-----------------------|
  113. | | | Master | Slave | Master | Slave | Master | Slave |
  114. |==================================================================================================|
  115. | T | Polling | fPCLK/2 | fPCLK/4 | NA | NA | NA | NA |
  116. | X |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  117. | / | Interrupt | fPCLK/16 | fPCLK/16 | NA | NA | NA | NA |
  118. | R |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  119. | X | DMA | fPCLK/2 | fPCLK/4 | NA | NA | NA | NA |
  120. |=========|================|===========|===========|===========|===========|===========|===========|
  121. | | Polling | fPCLK/2 | fPCLK/4 | fPCLK/64 | fPCLK/8 | fPCLK/64 | fPCLK/4 |
  122. | |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  123. | R | Interrupt | fPCLK/16 | fPCLK/8 | fPCLK/128 | fPCLK/8 | fPCLK/128 | fPCLK/8 |
  124. | X |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  125. | | DMA | fPCLK/2 | fPCLK/2 | fPCLK/128 | fPCLK/8 | fPCLK/128 | fPCLK/2 |
  126. |=========|================|===========|===========|===========|===========|===========|===========|
  127. | | Polling | fPCLK/2 | fPCLK/4 | NA | NA | fPCLK/2 | fPCLK/64 |
  128. | |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  129. | T | Interrupt | fPCLK/4 | fPCLK/8 | NA | NA | fPCLK/4 | fPCLK/256 |
  130. | X |----------------|-----------|-----------|-----------|-----------|-----------|-----------|
  131. | | DMA | fPCLK/2 | fPCLK/4 | NA | NA | fPCLK/2 | fPCLK/32 |
  132. +--------------------------------------------------------------------------------------------------+
  133. note:
  134. The max SPI frequency depend on SPI data size (8bits, 16bits),
  135. SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT, DMA).
  136. note:
  137. TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT() and HAL_SPI_TransmitReceive_DMA()
  138. RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA()
  139. TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA()
  140. */
  141. /* Includes ------------------------------------------------------------------*/
  142. #include "stm32f1xx_hal.h"
  143. /** @addtogroup STM32F1xx_HAL_Driver
  144. * @{
  145. */
  146. /** @defgroup SPI SPI
  147. * @brief SPI HAL module driver
  148. * @{
  149. */
  150. #ifdef HAL_SPI_MODULE_ENABLED
  151. /* Private typedef -----------------------------------------------------------*/
  152. /* Private define ------------------------------------------------------------*/
  153. /** @defgroup SPI_Private_Constants SPI Private Constants
  154. * @{
  155. */
  156. #define SPI_TIMEOUT_VALUE 10
  157. /**
  158. * @}
  159. */
  160. /* Private macro -------------------------------------------------------------*/
  161. /* Private variables ---------------------------------------------------------*/
  162. /* Private function prototypes -----------------------------------------------*/
  163. /** @defgroup SPI_Private_Functions SPI Private Functions
  164. * @{
  165. */
  166. static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi);
  167. static void SPI_TxISR(SPI_HandleTypeDef *hspi);
  168. static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi);
  169. static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi);
  170. static void SPI_RxISR(SPI_HandleTypeDef *hspi);
  171. static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
  172. static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
  173. static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
  174. static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma);
  175. static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma);
  176. static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma);
  177. static void SPI_DMAError(DMA_HandleTypeDef *hdma);
  178. static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
  179. /**
  180. * @}
  181. */
  182. /* Exported functions ---------------------------------------------------------*/
  183. /** @defgroup SPI_Exported_Functions SPI Exported Functions
  184. * @{
  185. */
  186. /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
  187. * @brief Initialization and Configuration functions
  188. *
  189. @verbatim
  190. ===============================================================================
  191. ##### Initialization and de-initialization functions #####
  192. ===============================================================================
  193. [..] This subsection provides a set of functions allowing to initialize and
  194. de-initialiaze the SPIx peripheral:
  195. (+) User must implement HAL_SPI_MspInit() function in which he configures
  196. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  197. (+) Call the function HAL_SPI_Init() to configure the selected device with
  198. the selected configuration:
  199. (++) Mode
  200. (++) Direction
  201. (++) Data Size
  202. (++) Clock Polarity and Phase
  203. (++) NSS Management
  204. (++) BaudRate Prescaler
  205. (++) FirstBit
  206. (++) TIMode
  207. (++) CRC Calculation
  208. (++) CRC Polynomial if CRC enabled
  209. (+) Call the function HAL_SPI_DeInit() to restore the default configuration
  210. of the selected SPIx periperal.
  211. @endverbatim
  212. * @{
  213. */
  214. /**
  215. * @brief Initializes the SPI according to the specified parameters
  216. * in the SPI_InitTypeDef and create the associated handle.
  217. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  218. * the configuration information for SPI module.
  219. * @retval HAL status
  220. */
  221. __weak HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
  222. {
  223. /* Check the SPI handle allocation */
  224. if(hspi == NULL)
  225. {
  226. return HAL_ERROR;
  227. }
  228. /* Check the parameters */
  229. assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
  230. assert_param(IS_SPI_MODE(hspi->Init.Mode));
  231. assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction));
  232. assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
  233. assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
  234. assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
  235. assert_param(IS_SPI_NSS(hspi->Init.NSS));
  236. assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
  237. assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
  238. assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
  239. assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation));
  240. assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
  241. if(hspi->State == HAL_SPI_STATE_RESET)
  242. {
  243. /* Allocate lock resource and initialize it */
  244. hspi->Lock = HAL_UNLOCKED;
  245. /* Init the low level hardware : GPIO, CLOCK, NVIC... */
  246. HAL_SPI_MspInit(hspi);
  247. }
  248. hspi->State = HAL_SPI_STATE_BUSY;
  249. /* Disble the selected SPI peripheral */
  250. __HAL_SPI_DISABLE(hspi);
  251. /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
  252. /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
  253. Communication speed, First bit and CRC calculation state */
  254. WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
  255. hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
  256. hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation) );
  257. /* Configure : NSS management */
  258. WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode));
  259. /*---------------------------- SPIx CRCPOLY Configuration ------------------*/
  260. /* Configure : CRC Polynomial */
  261. WRITE_REG(hspi->Instance->CRCPR, hspi->Init.CRCPolynomial);
  262. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  263. hspi->State = HAL_SPI_STATE_READY;
  264. return HAL_OK;
  265. }
  266. /**
  267. * @brief DeInitializes the SPI peripheral
  268. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  269. * the configuration information for SPI module.
  270. * @retval HAL status
  271. */
  272. HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
  273. {
  274. /* Check the SPI handle allocation */
  275. if(hspi == NULL)
  276. {
  277. return HAL_ERROR;
  278. }
  279. hspi->State = HAL_SPI_STATE_BUSY;
  280. /* Disable the SPI Peripheral Clock */
  281. __HAL_SPI_DISABLE(hspi);
  282. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  283. HAL_SPI_MspDeInit(hspi);
  284. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  285. hspi->State = HAL_SPI_STATE_RESET;
  286. /* Release Lock */
  287. __HAL_UNLOCK(hspi);
  288. return HAL_OK;
  289. }
  290. /**
  291. * @brief SPI MSP Init
  292. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  293. * the configuration information for SPI module.
  294. * @retval None
  295. */
  296. __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
  297. {
  298. /* Prevent unused argument(s) compilation warning */
  299. UNUSED(hspi);
  300. /* NOTE : This function Should not be modified, when the callback is needed,
  301. the HAL_SPI_MspInit could be implenetd in the user file
  302. */
  303. }
  304. /**
  305. * @brief SPI MSP DeInit
  306. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  307. * the configuration information for SPI module.
  308. * @retval None
  309. */
  310. __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
  311. {
  312. /* Prevent unused argument(s) compilation warning */
  313. UNUSED(hspi);
  314. /* NOTE : This function Should not be modified, when the callback is needed,
  315. the HAL_SPI_MspDeInit could be implenetd in the user file
  316. */
  317. }
  318. /**
  319. * @}
  320. */
  321. /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
  322. * @brief Data transfers functions
  323. *
  324. @verbatim
  325. ==============================================================================
  326. ##### IO operation functions #####
  327. ===============================================================================
  328. This subsection provides a set of functions allowing to manage the SPI
  329. data transfers.
  330. [..] The SPI supports master and slave mode :
  331. (#) There are two modes of transfer:
  332. (++) Blocking mode: The communication is performed in polling mode.
  333. The HAL status of all data processing is returned by the same function
  334. after finishing transfer.
  335. (++) No-Blocking mode: The communication is performed using Interrupts
  336. or DMA, These APIs return the HAL status.
  337. The end of the data processing will be indicated through the
  338. dedicated SPI IRQ when using Interrupt mode or the DMA IRQ when
  339. using DMA mode.
  340. The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
  341. will be executed respectivelly at the end of the transmit or Receive process
  342. The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
  343. (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
  344. exist for 1Line (simplex) and 2Lines (full duplex) modes.
  345. @endverbatim
  346. * @{
  347. */
  348. /**
  349. * @brief Transmit an amount of data in blocking mode
  350. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  351. * the configuration information for SPI module.
  352. * @param pData: pointer to data buffer
  353. * @param Size: amount of data to be sent
  354. * @param Timeout: Timeout duration
  355. * @retval HAL status
  356. */
  357. HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  358. {
  359. if(hspi->State == HAL_SPI_STATE_READY)
  360. {
  361. if((pData == NULL ) || (Size == 0))
  362. {
  363. return HAL_ERROR;
  364. }
  365. /* Check the parameters */
  366. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  367. /* Process Locked */
  368. __HAL_LOCK(hspi);
  369. /* Configure communication */
  370. hspi->State = HAL_SPI_STATE_BUSY_TX;
  371. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  372. hspi->pTxBuffPtr = pData;
  373. hspi->TxXferSize = Size;
  374. hspi->TxXferCount = Size;
  375. /*Init field not used in handle to zero */
  376. hspi->TxISR = 0;
  377. hspi->RxISR = 0;
  378. hspi->pRxBuffPtr = NULL;
  379. hspi->RxXferSize = 0;
  380. hspi->RxXferCount = 0;
  381. /* Reset CRC Calculation */
  382. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  383. {
  384. SPI_RESET_CRC(hspi);
  385. }
  386. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  387. {
  388. /* Configure communication direction : 1Line */
  389. SPI_1LINE_TX(hspi);
  390. }
  391. /* Check if the SPI is already enabled */
  392. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  393. {
  394. /* Enable SPI peripheral */
  395. __HAL_SPI_ENABLE(hspi);
  396. }
  397. /* Transmit data in 8 Bit mode */
  398. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  399. {
  400. if((hspi->Init.Mode == SPI_MODE_SLAVE)|| (hspi->TxXferCount == 0x01))
  401. {
  402. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  403. hspi->TxXferCount--;
  404. }
  405. while(hspi->TxXferCount > 0)
  406. {
  407. /* Wait until TXE flag is set to send data */
  408. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  409. {
  410. return HAL_TIMEOUT;
  411. }
  412. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  413. hspi->TxXferCount--;
  414. }
  415. /* Enable CRC Transmission */
  416. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  417. {
  418. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  419. }
  420. }
  421. /* Transmit data in 16 Bit mode */
  422. else
  423. {
  424. if((hspi->Init.Mode == SPI_MODE_SLAVE) || (hspi->TxXferCount == 0x01))
  425. {
  426. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  427. hspi->pTxBuffPtr+=2;
  428. hspi->TxXferCount--;
  429. }
  430. while(hspi->TxXferCount > 0)
  431. {
  432. /* Wait until TXE flag is set to send data */
  433. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  434. {
  435. return HAL_TIMEOUT;
  436. }
  437. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  438. hspi->pTxBuffPtr+=2;
  439. hspi->TxXferCount--;
  440. }
  441. /* Enable CRC Transmission */
  442. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  443. {
  444. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  445. }
  446. }
  447. /* Wait until TXE flag is set to send data */
  448. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  449. {
  450. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  451. return HAL_TIMEOUT;
  452. }
  453. /* Wait until Busy flag is reset before disabling SPI */
  454. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
  455. {
  456. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  457. return HAL_TIMEOUT;
  458. }
  459. /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  460. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  461. {
  462. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  463. }
  464. hspi->State = HAL_SPI_STATE_READY;
  465. /* Process Unlocked */
  466. __HAL_UNLOCK(hspi);
  467. return HAL_OK;
  468. }
  469. else
  470. {
  471. return HAL_BUSY;
  472. }
  473. }
  474. /**
  475. * @brief Receive an amount of data in blocking mode
  476. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  477. * the configuration information for SPI module.
  478. * @param pData: pointer to data buffer
  479. * @param Size: amount of data to be sent
  480. * @param Timeout: Timeout duration
  481. * @retval HAL status
  482. */
  483. HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  484. {
  485. __IO uint16_t tmpreg = 0;
  486. if(hspi->State == HAL_SPI_STATE_READY)
  487. {
  488. if((pData == NULL ) || (Size == 0))
  489. {
  490. return HAL_ERROR;
  491. }
  492. /* Process Locked */
  493. __HAL_LOCK(hspi);
  494. /* Configure communication */
  495. hspi->State = HAL_SPI_STATE_BUSY_RX;
  496. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  497. hspi->pRxBuffPtr = pData;
  498. hspi->RxXferSize = Size;
  499. hspi->RxXferCount = Size;
  500. /*Init field not used in handle to zero */
  501. hspi->RxISR = 0;
  502. hspi->TxISR = 0;
  503. hspi->pTxBuffPtr = NULL;
  504. hspi->TxXferSize = 0;
  505. hspi->TxXferCount = 0;
  506. /* Configure communication direction : 1Line */
  507. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  508. {
  509. SPI_1LINE_RX(hspi);
  510. }
  511. /* Reset CRC Calculation */
  512. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  513. {
  514. SPI_RESET_CRC(hspi);
  515. }
  516. if((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
  517. {
  518. /* Process Unlocked */
  519. __HAL_UNLOCK(hspi);
  520. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  521. return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
  522. }
  523. /* Check if the SPI is already enabled */
  524. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  525. {
  526. /* Enable SPI peripheral */
  527. __HAL_SPI_ENABLE(hspi);
  528. }
  529. /* Receive data in 8 Bit mode */
  530. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  531. {
  532. while(hspi->RxXferCount > 1)
  533. {
  534. /* Wait until RXNE flag is set */
  535. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  536. {
  537. return HAL_TIMEOUT;
  538. }
  539. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  540. hspi->RxXferCount--;
  541. }
  542. /* Enable CRC Reception */
  543. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  544. {
  545. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  546. }
  547. }
  548. /* Receive data in 16 Bit mode */
  549. else
  550. {
  551. while(hspi->RxXferCount > 1)
  552. {
  553. /* Wait until RXNE flag is set to read data */
  554. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  555. {
  556. return HAL_TIMEOUT;
  557. }
  558. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  559. hspi->pRxBuffPtr+=2;
  560. hspi->RxXferCount--;
  561. }
  562. /* Enable CRC Reception */
  563. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  564. {
  565. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  566. }
  567. }
  568. /* Wait until RXNE flag is set */
  569. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  570. {
  571. return HAL_TIMEOUT;
  572. }
  573. /* Receive last data in 8 Bit mode */
  574. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  575. {
  576. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  577. }
  578. /* Receive last data in 16 Bit mode */
  579. else
  580. {
  581. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  582. hspi->pRxBuffPtr+=2;
  583. }
  584. hspi->RxXferCount--;
  585. /* If CRC computation is enabled */
  586. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  587. {
  588. /* Wait until RXNE flag is set: CRC Received */
  589. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  590. {
  591. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  592. return HAL_TIMEOUT;
  593. }
  594. /* Read CRC to clear RXNE flag */
  595. tmpreg = hspi->Instance->DR;
  596. UNUSED(tmpreg);
  597. }
  598. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  599. {
  600. /* Disable SPI peripheral */
  601. __HAL_SPI_DISABLE(hspi);
  602. }
  603. hspi->State = HAL_SPI_STATE_READY;
  604. /* Check if CRC error occurred */
  605. if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
  606. {
  607. /* Check if CRC error is valid or not (workaround to be applied or not) */
  608. if (SPI_ISCRCErrorValid(hspi) == SPI_VALID_CRC_ERROR)
  609. {
  610. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  611. /* Reset CRC Calculation */
  612. SPI_RESET_CRC(hspi);
  613. /* Process Unlocked */
  614. __HAL_UNLOCK(hspi);
  615. return HAL_ERROR;
  616. }
  617. else
  618. {
  619. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  620. }
  621. }
  622. /* Process Unlocked */
  623. __HAL_UNLOCK(hspi);
  624. return HAL_OK;
  625. }
  626. else
  627. {
  628. return HAL_BUSY;
  629. }
  630. }
  631. /**
  632. * @brief Transmit and Receive an amount of data in blocking mode
  633. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  634. * the configuration information for SPI module.
  635. * @param pTxData: pointer to transmission data buffer
  636. * @param pRxData: pointer to reception data buffer to be
  637. * @param Size: amount of data to be sent
  638. * @param Timeout: Timeout duration
  639. * @retval HAL status
  640. */
  641. HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
  642. {
  643. __IO uint16_t tmpreg = 0;
  644. if((hspi->State == HAL_SPI_STATE_READY) || (hspi->State == HAL_SPI_STATE_BUSY_RX))
  645. {
  646. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  647. {
  648. return HAL_ERROR;
  649. }
  650. /* Check the parameters */
  651. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  652. /* Process Locked */
  653. __HAL_LOCK(hspi);
  654. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  655. if(hspi->State == HAL_SPI_STATE_READY)
  656. {
  657. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  658. }
  659. /* Configure communication */
  660. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  661. hspi->pRxBuffPtr = pRxData;
  662. hspi->RxXferSize = Size;
  663. hspi->RxXferCount = Size;
  664. hspi->pTxBuffPtr = pTxData;
  665. hspi->TxXferSize = Size;
  666. hspi->TxXferCount = Size;
  667. /*Init field not used in handle to zero */
  668. hspi->RxISR = 0;
  669. hspi->TxISR = 0;
  670. /* Reset CRC Calculation */
  671. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  672. {
  673. SPI_RESET_CRC(hspi);
  674. }
  675. /* Check if the SPI is already enabled */
  676. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  677. {
  678. /* Enable SPI peripheral */
  679. __HAL_SPI_ENABLE(hspi);
  680. }
  681. /* Transmit and Receive data in 16 Bit mode */
  682. if(hspi->Init.DataSize == SPI_DATASIZE_16BIT)
  683. {
  684. if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
  685. {
  686. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  687. hspi->pTxBuffPtr+=2;
  688. hspi->TxXferCount--;
  689. }
  690. if(hspi->TxXferCount == 0)
  691. {
  692. /* Enable CRC Transmission */
  693. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  694. {
  695. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  696. }
  697. /* Wait until RXNE flag is set */
  698. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  699. {
  700. return HAL_TIMEOUT;
  701. }
  702. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  703. hspi->pRxBuffPtr+=2;
  704. hspi->RxXferCount--;
  705. }
  706. else
  707. {
  708. while(hspi->TxXferCount > 0)
  709. {
  710. /* Wait until TXE flag is set to send data */
  711. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  712. {
  713. return HAL_TIMEOUT;
  714. }
  715. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  716. hspi->pTxBuffPtr+=2;
  717. hspi->TxXferCount--;
  718. /* Enable CRC Transmission */
  719. if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  720. {
  721. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  722. }
  723. /* Wait until RXNE flag is set */
  724. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  725. {
  726. return HAL_TIMEOUT;
  727. }
  728. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  729. hspi->pRxBuffPtr+=2;
  730. hspi->RxXferCount--;
  731. }
  732. /* Receive the last byte */
  733. if(hspi->Init.Mode == SPI_MODE_SLAVE)
  734. {
  735. /* Wait until RXNE flag is set */
  736. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  737. {
  738. return HAL_TIMEOUT;
  739. }
  740. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  741. hspi->pRxBuffPtr+=2;
  742. hspi->RxXferCount--;
  743. }
  744. }
  745. }
  746. /* Transmit and Receive data in 8 Bit mode */
  747. else
  748. {
  749. if((hspi->Init.Mode == SPI_MODE_SLAVE) || ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->TxXferCount == 0x01)))
  750. {
  751. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  752. hspi->TxXferCount--;
  753. }
  754. if(hspi->TxXferCount == 0)
  755. {
  756. /* Enable CRC Transmission */
  757. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  758. {
  759. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  760. }
  761. /* Wait until RXNE flag is set */
  762. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  763. {
  764. return HAL_TIMEOUT;
  765. }
  766. (*hspi->pRxBuffPtr) = hspi->Instance->DR;
  767. hspi->RxXferCount--;
  768. }
  769. else
  770. {
  771. while(hspi->TxXferCount > 0)
  772. {
  773. /* Wait until TXE flag is set to send data */
  774. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, Timeout) != HAL_OK)
  775. {
  776. return HAL_TIMEOUT;
  777. }
  778. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  779. hspi->TxXferCount--;
  780. /* Enable CRC Transmission */
  781. if((hspi->TxXferCount == 0) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  782. {
  783. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  784. }
  785. /* Wait until RXNE flag is set */
  786. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  787. {
  788. return HAL_TIMEOUT;
  789. }
  790. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  791. hspi->RxXferCount--;
  792. }
  793. if(hspi->Init.Mode == SPI_MODE_SLAVE)
  794. {
  795. /* Wait until RXNE flag is set */
  796. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  797. {
  798. return HAL_TIMEOUT;
  799. }
  800. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  801. hspi->RxXferCount--;
  802. }
  803. }
  804. }
  805. /* Read CRC from DR to close CRC calculation process */
  806. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  807. {
  808. /* Wait until RXNE flag is set */
  809. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  810. {
  811. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  812. return HAL_TIMEOUT;
  813. }
  814. /* Read CRC */
  815. tmpreg = hspi->Instance->DR;
  816. UNUSED(tmpreg);
  817. }
  818. /* Wait until Busy flag is reset before disabling SPI */
  819. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, Timeout) != HAL_OK)
  820. {
  821. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  822. return HAL_TIMEOUT;
  823. }
  824. hspi->State = HAL_SPI_STATE_READY;
  825. /* Check if CRC error occurred */
  826. if((hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET))
  827. {
  828. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  829. SPI_RESET_CRC(hspi);
  830. /* Process Unlocked */
  831. __HAL_UNLOCK(hspi);
  832. return HAL_ERROR;
  833. }
  834. /* Process Unlocked */
  835. __HAL_UNLOCK(hspi);
  836. return HAL_OK;
  837. }
  838. else
  839. {
  840. return HAL_BUSY;
  841. }
  842. }
  843. /**
  844. * @brief Transmit an amount of data in no-blocking mode with Interrupt
  845. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  846. * the configuration information for SPI module.
  847. * @param pData: pointer to data buffer
  848. * @param Size: amount of data to be sent
  849. * @retval HAL status
  850. */
  851. HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  852. {
  853. if(hspi->State == HAL_SPI_STATE_READY)
  854. {
  855. if((pData == NULL) || (Size == 0))
  856. {
  857. return HAL_ERROR;
  858. }
  859. /* Check the parameters */
  860. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  861. /* Process Locked */
  862. __HAL_LOCK(hspi);
  863. /* Configure communication */
  864. hspi->State = HAL_SPI_STATE_BUSY_TX;
  865. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  866. hspi->TxISR = &SPI_TxISR;
  867. hspi->pTxBuffPtr = pData;
  868. hspi->TxXferSize = Size;
  869. hspi->TxXferCount = Size;
  870. /*Init field not used in handle to zero */
  871. hspi->RxISR = 0;
  872. hspi->pRxBuffPtr = NULL;
  873. hspi->RxXferSize = 0;
  874. hspi->RxXferCount = 0;
  875. /* Configure communication direction : 1Line */
  876. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  877. {
  878. SPI_1LINE_TX(hspi);
  879. }
  880. /* Reset CRC Calculation */
  881. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  882. {
  883. SPI_RESET_CRC(hspi);
  884. }
  885. if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  886. {
  887. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE));
  888. }
  889. else
  890. {
  891. /* Enable TXE and ERR interrupt */
  892. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
  893. }
  894. /* Process Unlocked */
  895. __HAL_UNLOCK(hspi);
  896. /* Check if the SPI is already enabled */
  897. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  898. {
  899. /* Enable SPI peripheral */
  900. __HAL_SPI_ENABLE(hspi);
  901. }
  902. return HAL_OK;
  903. }
  904. else
  905. {
  906. return HAL_BUSY;
  907. }
  908. }
  909. /**
  910. * @brief Receive an amount of data in no-blocking mode with Interrupt
  911. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  912. * the configuration information for SPI module.
  913. * @param pData: pointer to data buffer
  914. * @param Size: amount of data to be sent
  915. * @retval HAL status
  916. */
  917. HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  918. {
  919. if(hspi->State == HAL_SPI_STATE_READY)
  920. {
  921. if((pData == NULL) || (Size == 0))
  922. {
  923. return HAL_ERROR;
  924. }
  925. /* Process Locked */
  926. __HAL_LOCK(hspi);
  927. /* Configure communication */
  928. hspi->State = HAL_SPI_STATE_BUSY_RX;
  929. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  930. hspi->RxISR = &SPI_RxISR;
  931. hspi->pRxBuffPtr = pData;
  932. hspi->RxXferSize = Size;
  933. hspi->RxXferCount = Size ;
  934. /*Init field not used in handle to zero */
  935. hspi->TxISR = 0;
  936. hspi->pTxBuffPtr = NULL;
  937. hspi->TxXferSize = 0;
  938. hspi->TxXferCount = 0;
  939. /* Configure communication direction : 1Line */
  940. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  941. {
  942. SPI_1LINE_RX(hspi);
  943. }
  944. else if((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
  945. {
  946. /* Process Unlocked */
  947. __HAL_UNLOCK(hspi);
  948. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  949. return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
  950. }
  951. /* Reset CRC Calculation */
  952. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  953. {
  954. SPI_RESET_CRC(hspi);
  955. }
  956. /* Enable TXE and ERR interrupt */
  957. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  958. /* Process Unlocked */
  959. __HAL_UNLOCK(hspi);
  960. /* Note : The SPI must be enabled after unlocking current process
  961. to avoid the risk of SPI interrupt handle execution before current
  962. process unlock */
  963. /* Check if the SPI is already enabled */
  964. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  965. {
  966. /* Enable SPI peripheral */
  967. __HAL_SPI_ENABLE(hspi);
  968. }
  969. return HAL_OK;
  970. }
  971. else
  972. {
  973. return HAL_BUSY;
  974. }
  975. }
  976. /**
  977. * @brief Transmit and Receive an amount of data in no-blocking mode with Interrupt
  978. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  979. * the configuration information for SPI module.
  980. * @param pTxData: pointer to transmission data buffer
  981. * @param pRxData: pointer to reception data buffer to be
  982. * @param Size: amount of data to be sent
  983. * @retval HAL status
  984. */
  985. HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  986. {
  987. if((hspi->State == HAL_SPI_STATE_READY) || \
  988. ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
  989. {
  990. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  991. {
  992. return HAL_ERROR;
  993. }
  994. /* Check the parameters */
  995. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  996. /* Process locked */
  997. __HAL_LOCK(hspi);
  998. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  999. if(hspi->State != HAL_SPI_STATE_BUSY_RX)
  1000. {
  1001. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1002. }
  1003. /* Configure communication */
  1004. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1005. hspi->TxISR = &SPI_TxISR;
  1006. hspi->pTxBuffPtr = pTxData;
  1007. hspi->TxXferSize = Size;
  1008. hspi->TxXferCount = Size;
  1009. hspi->RxISR = &SPI_2LinesRxISR;
  1010. hspi->pRxBuffPtr = pRxData;
  1011. hspi->RxXferSize = Size;
  1012. hspi->RxXferCount = Size;
  1013. /* Reset CRC Calculation */
  1014. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1015. {
  1016. SPI_RESET_CRC(hspi);
  1017. }
  1018. /* Enable TXE, RXNE and ERR interrupt */
  1019. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1020. /* Process Unlocked */
  1021. __HAL_UNLOCK(hspi);
  1022. /* Check if the SPI is already enabled */
  1023. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1024. {
  1025. /* Enable SPI peripheral */
  1026. __HAL_SPI_ENABLE(hspi);
  1027. }
  1028. return HAL_OK;
  1029. }
  1030. else
  1031. {
  1032. return HAL_BUSY;
  1033. }
  1034. }
  1035. /**
  1036. * @brief Transmit an amount of data in no-blocking mode with DMA
  1037. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1038. * the configuration information for SPI module.
  1039. * @param pData: pointer to data buffer
  1040. * @param Size: amount of data to be sent
  1041. * @retval HAL status
  1042. */
  1043. HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1044. {
  1045. if(hspi->State == HAL_SPI_STATE_READY)
  1046. {
  1047. if((pData == NULL) || (Size == 0))
  1048. {
  1049. return HAL_ERROR;
  1050. }
  1051. /* Check the parameters */
  1052. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  1053. /* Process Locked */
  1054. __HAL_LOCK(hspi);
  1055. /* Configure communication */
  1056. hspi->State = HAL_SPI_STATE_BUSY_TX;
  1057. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1058. hspi->pTxBuffPtr = pData;
  1059. hspi->TxXferSize = Size;
  1060. hspi->TxXferCount = Size;
  1061. /*Init field not used in handle to zero */
  1062. hspi->TxISR = 0;
  1063. hspi->RxISR = 0;
  1064. hspi->pRxBuffPtr = NULL;
  1065. hspi->RxXferSize = 0;
  1066. hspi->RxXferCount = 0;
  1067. /* Configure communication direction : 1Line */
  1068. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1069. {
  1070. SPI_1LINE_TX(hspi);
  1071. }
  1072. /* Reset CRC Calculation */
  1073. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1074. {
  1075. SPI_RESET_CRC(hspi);
  1076. }
  1077. /* Set the SPI TxDMA Half transfer complete callback */
  1078. hspi->hdmatx->XferHalfCpltCallback = SPI_DMAHalfTransmitCplt;
  1079. /* Set the SPI TxDMA transfer complete callback */
  1080. hspi->hdmatx->XferCpltCallback = SPI_DMATransmitCplt;
  1081. /* Set the DMA error callback */
  1082. hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  1083. /* Enable the Tx DMA Channel */
  1084. HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
  1085. /* Enable Tx DMA Request */
  1086. SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1087. /* Process Unlocked */
  1088. __HAL_UNLOCK(hspi);
  1089. /* Check if the SPI is already enabled */
  1090. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1091. {
  1092. /* Enable SPI peripheral */
  1093. __HAL_SPI_ENABLE(hspi);
  1094. }
  1095. return HAL_OK;
  1096. }
  1097. else
  1098. {
  1099. return HAL_BUSY;
  1100. }
  1101. }
  1102. /**
  1103. * @brief Receive an amount of data in no-blocking mode with DMA
  1104. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1105. * the configuration information for SPI module.
  1106. * @param pData: pointer to data buffer
  1107. * @note When the CRC feature is enabled the pData Length must be Size + 1.
  1108. * @param Size: amount of data to be sent
  1109. * @retval HAL status
  1110. */
  1111. HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1112. {
  1113. if(hspi->State == HAL_SPI_STATE_READY)
  1114. {
  1115. if((pData == NULL) || (Size == 0))
  1116. {
  1117. return HAL_ERROR;
  1118. }
  1119. /* Process Locked */
  1120. __HAL_LOCK(hspi);
  1121. /* Configure communication */
  1122. hspi->State = HAL_SPI_STATE_BUSY_RX;
  1123. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1124. hspi->pRxBuffPtr = pData;
  1125. hspi->RxXferSize = Size;
  1126. hspi->RxXferCount = Size;
  1127. /*Init field not used in handle to zero */
  1128. hspi->RxISR = 0;
  1129. hspi->TxISR = 0;
  1130. hspi->pTxBuffPtr = NULL;
  1131. hspi->TxXferSize = 0;
  1132. hspi->TxXferCount = 0;
  1133. /* Configure communication direction : 1Line */
  1134. if(hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1135. {
  1136. SPI_1LINE_RX(hspi);
  1137. }
  1138. else if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
  1139. {
  1140. /* Process Unlocked */
  1141. __HAL_UNLOCK(hspi);
  1142. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  1143. return HAL_SPI_TransmitReceive_DMA(hspi, pData, pData, Size);
  1144. }
  1145. /* Reset CRC Calculation */
  1146. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1147. {
  1148. SPI_RESET_CRC(hspi);
  1149. }
  1150. /* Set the SPI RxDMA Half transfer complete callback */
  1151. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1152. /* Set the SPI Rx DMA transfer complete callback */
  1153. hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1154. /* Set the DMA error callback */
  1155. hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1156. /* Enable the Rx DMA Channel */
  1157. HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
  1158. /* Enable Rx DMA Request */
  1159. SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1160. /* Process Unlocked */
  1161. __HAL_UNLOCK(hspi);
  1162. /* Check if the SPI is already enabled */
  1163. if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
  1164. {
  1165. /* Enable SPI peripheral */
  1166. __HAL_SPI_ENABLE(hspi);
  1167. }
  1168. return HAL_OK;
  1169. }
  1170. else
  1171. {
  1172. return HAL_BUSY;
  1173. }
  1174. }
  1175. /**
  1176. * @brief Transmit and Receive an amount of data in no-blocking mode with DMA
  1177. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1178. * the configuration information for SPI module.
  1179. * @param pTxData: pointer to transmission data buffer
  1180. * @param pRxData: pointer to reception data buffer
  1181. * @note When the CRC feature is enabled the pRxData Length must be Size + 1
  1182. * @param Size: amount of data to be sent
  1183. * @retval HAL status
  1184. */
  1185. HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  1186. {
  1187. if((hspi->State == HAL_SPI_STATE_READY) || \
  1188. ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->State == HAL_SPI_STATE_BUSY_RX)))
  1189. {
  1190. if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0))
  1191. {
  1192. return HAL_ERROR;
  1193. }
  1194. /* Check the parameters */
  1195. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  1196. /* Process locked */
  1197. __HAL_LOCK(hspi);
  1198. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  1199. if(hspi->State != HAL_SPI_STATE_BUSY_RX)
  1200. {
  1201. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1202. }
  1203. /* Configure communication */
  1204. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1205. hspi->pTxBuffPtr = (uint8_t*)pTxData;
  1206. hspi->TxXferSize = Size;
  1207. hspi->TxXferCount = Size;
  1208. hspi->pRxBuffPtr = (uint8_t*)pRxData;
  1209. hspi->RxXferSize = Size;
  1210. hspi->RxXferCount = Size;
  1211. /*Init field not used in handle to zero */
  1212. hspi->RxISR = 0;
  1213. hspi->TxISR = 0;
  1214. /* Reset CRC Calculation */
  1215. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1216. {
  1217. SPI_RESET_CRC(hspi);
  1218. }
  1219. /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
  1220. if(hspi->State == HAL_SPI_STATE_BUSY_RX)
  1221. {
  1222. /* Set the SPI Rx DMA Half transfer complete callback */
  1223. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfReceiveCplt;
  1224. hspi->hdmarx->XferCpltCallback = SPI_DMAReceiveCplt;
  1225. }
  1226. else
  1227. {
  1228. /* Set the SPI Tx/Rx DMA Half transfer complete callback */
  1229. hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
  1230. hspi->hdmarx->XferCpltCallback = SPI_DMATransmitReceiveCplt;
  1231. }
  1232. /* Set the DMA error callback */
  1233. hspi->hdmarx->XferErrorCallback = SPI_DMAError;
  1234. /* Enable the Rx DMA Channel */
  1235. HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
  1236. /* Enable Rx DMA Request */
  1237. SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1238. /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
  1239. is performed in DMA reception complete callback */
  1240. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1241. {
  1242. /* Set the DMA error callback */
  1243. hspi->hdmatx->XferErrorCallback = SPI_DMAError;
  1244. }
  1245. else
  1246. {
  1247. hspi->hdmatx->XferErrorCallback = NULL;
  1248. }
  1249. /* Enable the Tx DMA Channel */
  1250. HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
  1251. /* Check if the SPI is already enabled */
  1252. if((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1253. {
  1254. /* Enable SPI peripheral */
  1255. __HAL_SPI_ENABLE(hspi);
  1256. }
  1257. /* Enable Tx DMA Request */
  1258. SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1259. /* Process Unlocked */
  1260. __HAL_UNLOCK(hspi);
  1261. return HAL_OK;
  1262. }
  1263. else
  1264. {
  1265. return HAL_BUSY;
  1266. }
  1267. }
  1268. /**
  1269. * @brief Pauses the DMA Transfer.
  1270. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1271. * the configuration information for the specified SPI module.
  1272. * @retval HAL status
  1273. */
  1274. HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi)
  1275. {
  1276. /* Process Locked */
  1277. __HAL_LOCK(hspi);
  1278. /* Disable the SPI DMA Tx & Rx requests */
  1279. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1280. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1281. /* Process Unlocked */
  1282. __HAL_UNLOCK(hspi);
  1283. return HAL_OK;
  1284. }
  1285. /**
  1286. * @brief Resumes the DMA Transfer.
  1287. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1288. * the configuration information for the specified SPI module.
  1289. * @retval HAL status
  1290. */
  1291. HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi)
  1292. {
  1293. /* Process Locked */
  1294. __HAL_LOCK(hspi);
  1295. /* Enable the SPI DMA Tx & Rx requests */
  1296. SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1297. SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1298. /* Process Unlocked */
  1299. __HAL_UNLOCK(hspi);
  1300. return HAL_OK;
  1301. }
  1302. /**
  1303. * @brief Stops the DMA Transfer.
  1304. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1305. * the configuration information for the specified SPI module.
  1306. * @retval HAL status
  1307. */
  1308. HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi)
  1309. {
  1310. /* The Lock is not implemented on this API to allow the user application
  1311. to call the HAL SPI API under callbacks HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback():
  1312. when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
  1313. and the correspond call back is executed HAL_SPI_TxCpltCallback() or HAL_SPI_RxCpltCallback() or HAL_SPI_TxRxCpltCallback()
  1314. */
  1315. /* Abort the SPI DMA tx Channel */
  1316. if(hspi->hdmatx != NULL)
  1317. {
  1318. HAL_DMA_Abort(hspi->hdmatx);
  1319. }
  1320. /* Abort the SPI DMA rx Channel */
  1321. if(hspi->hdmarx != NULL)
  1322. {
  1323. HAL_DMA_Abort(hspi->hdmarx);
  1324. }
  1325. /* Disable the SPI DMA Tx & Rx requests */
  1326. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1327. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1328. hspi->State = HAL_SPI_STATE_READY;
  1329. return HAL_OK;
  1330. }
  1331. /**
  1332. * @brief This function handles SPI interrupt request.
  1333. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1334. * the configuration information for SPI module.
  1335. * @retval None
  1336. */
  1337. void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
  1338. {
  1339. /* SPI in mode Receiver and Overrun not occurred ---------------------------*/
  1340. if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) == RESET))
  1341. {
  1342. hspi->RxISR(hspi);
  1343. return;
  1344. }
  1345. /* SPI in mode Tramitter ---------------------------------------------------*/
  1346. if((__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) != RESET) && (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE) != RESET))
  1347. {
  1348. hspi->TxISR(hspi);
  1349. return;
  1350. }
  1351. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_ERR) != RESET)
  1352. {
  1353. /* SPI CRC error interrupt occurred ---------------------------------------*/
  1354. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1355. {
  1356. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1357. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1358. }
  1359. /* SPI Mode Fault error interrupt occurred --------------------------------*/
  1360. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_MODF) != RESET)
  1361. {
  1362. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
  1363. __HAL_SPI_CLEAR_MODFFLAG(hspi);
  1364. }
  1365. /* SPI Overrun error interrupt occurred -----------------------------------*/
  1366. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_OVR) != RESET)
  1367. {
  1368. if(hspi->State != HAL_SPI_STATE_BUSY_TX)
  1369. {
  1370. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
  1371. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1372. }
  1373. }
  1374. /* Call the Error call Back in case of Errors */
  1375. if(hspi->ErrorCode!=HAL_SPI_ERROR_NONE)
  1376. {
  1377. __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
  1378. hspi->State = HAL_SPI_STATE_READY;
  1379. HAL_SPI_ErrorCallback(hspi);
  1380. }
  1381. }
  1382. }
  1383. /**
  1384. * @brief Tx Transfer completed callbacks
  1385. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1386. * the configuration information for SPI module.
  1387. * @retval None
  1388. */
  1389. __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
  1390. {
  1391. /* Prevent unused argument(s) compilation warning */
  1392. UNUSED(hspi);
  1393. /* NOTE : This function Should not be modified, when the callback is needed,
  1394. the HAL_SPI_TxCpltCallback could be implenetd in the user file
  1395. */
  1396. }
  1397. /**
  1398. * @brief Rx Transfer completed callbacks
  1399. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1400. * the configuration information for SPI module.
  1401. * @retval None
  1402. */
  1403. __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
  1404. {
  1405. /* Prevent unused argument(s) compilation warning */
  1406. UNUSED(hspi);
  1407. /* NOTE : This function Should not be modified, when the callback is needed,
  1408. the HAL_SPI_RxCpltCallback() could be implenetd in the user file
  1409. */
  1410. }
  1411. /**
  1412. * @brief Tx and Rx Transfer completed callbacks
  1413. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1414. * the configuration information for SPI module.
  1415. * @retval None
  1416. */
  1417. __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
  1418. {
  1419. /* Prevent unused argument(s) compilation warning */
  1420. UNUSED(hspi);
  1421. /* NOTE : This function Should not be modified, when the callback is needed,
  1422. the HAL_SPI_TxRxCpltCallback() could be implenetd in the user file
  1423. */
  1424. }
  1425. /**
  1426. * @brief Tx Half Transfer completed callbacks
  1427. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1428. * the configuration information for SPI module.
  1429. * @retval None
  1430. */
  1431. __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1432. {
  1433. /* Prevent unused argument(s) compilation warning */
  1434. UNUSED(hspi);
  1435. /* NOTE : This function Should not be modified, when the callback is needed,
  1436. the HAL_SPI_TxHalfCpltCallback could be implenetd in the user file
  1437. */
  1438. }
  1439. /**
  1440. * @brief Rx Half Transfer completed callbacks
  1441. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1442. * the configuration information for SPI module.
  1443. * @retval None
  1444. */
  1445. __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1446. {
  1447. /* Prevent unused argument(s) compilation warning */
  1448. UNUSED(hspi);
  1449. /* NOTE : This function Should not be modified, when the callback is needed,
  1450. the HAL_SPI_RxHalfCpltCallback() could be implenetd in the user file
  1451. */
  1452. }
  1453. /**
  1454. * @brief Tx and Rx Transfer completed callbacks
  1455. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1456. * the configuration information for SPI module.
  1457. * @retval None
  1458. */
  1459. __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1460. {
  1461. /* Prevent unused argument(s) compilation warning */
  1462. UNUSED(hspi);
  1463. /* NOTE : This function Should not be modified, when the callback is needed,
  1464. the HAL_SPI_TxRxHalfCpltCallback() could be implenetd in the user file
  1465. */
  1466. }
  1467. /**
  1468. * @brief SPI error callbacks
  1469. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1470. * the configuration information for SPI module.
  1471. * @retval None
  1472. */
  1473. __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
  1474. {
  1475. /* Prevent unused argument(s) compilation warning */
  1476. UNUSED(hspi);
  1477. /* NOTE : - This function Should not be modified, when the callback is needed,
  1478. the HAL_SPI_ErrorCallback() could be implenetd in the user file.
  1479. - The ErrorCode parameter in the hspi handle is updated by the SPI processes
  1480. and user can use HAL_SPI_GetError() API to check the latest error occurred.
  1481. */
  1482. }
  1483. /**
  1484. * @}
  1485. */
  1486. /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
  1487. * @brief SPI control functions
  1488. *
  1489. @verbatim
  1490. ===============================================================================
  1491. ##### Peripheral State and Errors functions #####
  1492. ===============================================================================
  1493. [..]
  1494. This subsection provides a set of functions allowing to control the SPI.
  1495. (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
  1496. (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
  1497. @endverbatim
  1498. * @{
  1499. */
  1500. /**
  1501. * @brief Return the SPI state
  1502. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1503. * the configuration information for SPI module.
  1504. * @retval SPI state
  1505. */
  1506. HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
  1507. {
  1508. return hspi->State;
  1509. }
  1510. /**
  1511. * @brief Return the SPI error code
  1512. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1513. * the configuration information for SPI module.
  1514. * @retval SPI Error Code
  1515. */
  1516. uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
  1517. {
  1518. return hspi->ErrorCode;
  1519. }
  1520. /**
  1521. * @}
  1522. */
  1523. /**
  1524. * @}
  1525. */
  1526. /** @addtogroup SPI_Private_Functions
  1527. * @{
  1528. */
  1529. /**
  1530. * @brief Interrupt Handler to close Tx transfer
  1531. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1532. * the configuration information for SPI module.
  1533. * @retval None
  1534. */
  1535. static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi)
  1536. {
  1537. /* Wait until TXE flag is set to send data */
  1538. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1539. {
  1540. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1541. }
  1542. /* Disable TXE interrupt */
  1543. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE));
  1544. /* Disable ERR interrupt if Receive process is finished */
  1545. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_RXNE) == RESET)
  1546. {
  1547. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
  1548. /* Wait until Busy flag is reset before disabling SPI */
  1549. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1550. {
  1551. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1552. }
  1553. /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  1554. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1555. {
  1556. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1557. }
  1558. /* Check if Errors has been detected during transfer */
  1559. if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  1560. {
  1561. /* Check if we are in Tx or in Rx/Tx Mode */
  1562. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1563. {
  1564. /* Set state to READY before run the Callback Complete */
  1565. hspi->State = HAL_SPI_STATE_READY;
  1566. HAL_SPI_TxRxCpltCallback(hspi);
  1567. }
  1568. else
  1569. {
  1570. /* Set state to READY before run the Callback Complete */
  1571. hspi->State = HAL_SPI_STATE_READY;
  1572. HAL_SPI_TxCpltCallback(hspi);
  1573. }
  1574. }
  1575. else
  1576. {
  1577. /* Set state to READY before run the Callback Complete */
  1578. hspi->State = HAL_SPI_STATE_READY;
  1579. /* Call Error call back in case of Error */
  1580. HAL_SPI_ErrorCallback(hspi);
  1581. }
  1582. }
  1583. }
  1584. /**
  1585. * @brief Interrupt Handler to transmit amount of data in no-blocking mode
  1586. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1587. * the configuration information for SPI module.
  1588. * @retval None
  1589. */
  1590. static void SPI_TxISR(SPI_HandleTypeDef *hspi)
  1591. {
  1592. /* Transmit data in 8 Bit mode */
  1593. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1594. {
  1595. hspi->Instance->DR = (*hspi->pTxBuffPtr++);
  1596. }
  1597. /* Transmit data in 16 Bit mode */
  1598. else
  1599. {
  1600. hspi->Instance->DR = *((uint16_t*)hspi->pTxBuffPtr);
  1601. hspi->pTxBuffPtr+=2;
  1602. }
  1603. hspi->TxXferCount--;
  1604. if(hspi->TxXferCount == 0)
  1605. {
  1606. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1607. {
  1608. /* calculate and transfer CRC on Tx line */
  1609. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  1610. }
  1611. SPI_TxCloseIRQHandler(hspi);
  1612. }
  1613. }
  1614. /**
  1615. * @brief Interrupt Handler to close Rx transfer
  1616. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1617. * the configuration information for SPI module.
  1618. * @retval None
  1619. */
  1620. static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi)
  1621. {
  1622. __IO uint16_t tmpreg = 0;
  1623. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1624. {
  1625. /* Wait until RXNE flag is set to read CRC data */
  1626. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1627. {
  1628. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1629. }
  1630. /* Read CRC to reset RXNE flag */
  1631. tmpreg = hspi->Instance->DR;
  1632. UNUSED(tmpreg);
  1633. /* Wait until RXNE flag is reset */
  1634. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1635. {
  1636. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1637. }
  1638. /* Check if CRC error occurred */
  1639. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1640. {
  1641. /* Check if CRC error is valid or not (workaround to be applied or not) */
  1642. if ( (hspi->State != HAL_SPI_STATE_BUSY_RX)
  1643. || (SPI_ISCRCErrorValid(hspi) == SPI_VALID_CRC_ERROR) )
  1644. {
  1645. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1646. /* Reset CRC Calculation */
  1647. SPI_RESET_CRC(hspi);
  1648. }
  1649. else
  1650. {
  1651. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1652. }
  1653. }
  1654. }
  1655. /* Disable RXNE interrupt */
  1656. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE));
  1657. /* if Transmit process is finished */
  1658. if(__HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE) == RESET)
  1659. {
  1660. /* Disable ERR interrupt */
  1661. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_ERR));
  1662. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1663. {
  1664. /* Disable SPI peripheral */
  1665. __HAL_SPI_DISABLE(hspi);
  1666. }
  1667. /* Check if Errors has been detected during transfer */
  1668. if(hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  1669. {
  1670. /* Check if we are in Rx or in Rx/Tx Mode */
  1671. if(hspi->State == HAL_SPI_STATE_BUSY_TX_RX)
  1672. {
  1673. /* Set state to READY before run the Callback Complete */
  1674. hspi->State = HAL_SPI_STATE_READY;
  1675. HAL_SPI_TxRxCpltCallback(hspi);
  1676. }
  1677. else
  1678. {
  1679. /* Set state to READY before run the Callback Complete */
  1680. hspi->State = HAL_SPI_STATE_READY;
  1681. HAL_SPI_RxCpltCallback(hspi);
  1682. }
  1683. }
  1684. else
  1685. {
  1686. /* Set state to READY before run the Callback Complete */
  1687. hspi->State = HAL_SPI_STATE_READY;
  1688. /* Call Error call back in case of Error */
  1689. HAL_SPI_ErrorCallback(hspi);
  1690. }
  1691. }
  1692. }
  1693. /**
  1694. * @brief Interrupt Handler to receive amount of data in 2Lines mode
  1695. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1696. * the configuration information for SPI module.
  1697. * @retval None
  1698. */
  1699. static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi)
  1700. {
  1701. /* Receive data in 8 Bit mode */
  1702. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1703. {
  1704. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  1705. }
  1706. /* Receive data in 16 Bit mode */
  1707. else
  1708. {
  1709. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  1710. hspi->pRxBuffPtr+=2;
  1711. }
  1712. hspi->RxXferCount--;
  1713. if(hspi->RxXferCount==0)
  1714. {
  1715. SPI_RxCloseIRQHandler(hspi);
  1716. }
  1717. }
  1718. /**
  1719. * @brief Interrupt Handler to receive amount of data in no-blocking mode
  1720. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1721. * the configuration information for SPI module.
  1722. * @retval None
  1723. */
  1724. static void SPI_RxISR(SPI_HandleTypeDef *hspi)
  1725. {
  1726. /* Receive data in 8 Bit mode */
  1727. if(hspi->Init.DataSize == SPI_DATASIZE_8BIT)
  1728. {
  1729. (*hspi->pRxBuffPtr++) = hspi->Instance->DR;
  1730. }
  1731. /* Receive data in 16 Bit mode */
  1732. else
  1733. {
  1734. *((uint16_t*)hspi->pRxBuffPtr) = hspi->Instance->DR;
  1735. hspi->pRxBuffPtr+=2;
  1736. }
  1737. hspi->RxXferCount--;
  1738. /* Enable CRC Transmission */
  1739. if((hspi->RxXferCount == 1) && (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE))
  1740. {
  1741. /* Set CRC Next to calculate CRC on Rx side */
  1742. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  1743. }
  1744. if(hspi->RxXferCount == 0)
  1745. {
  1746. SPI_RxCloseIRQHandler(hspi);
  1747. }
  1748. }
  1749. /**
  1750. * @brief DMA SPI transmit process complete callback
  1751. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1752. * the configuration information for the specified DMA module.
  1753. * @retval None
  1754. */
  1755. static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma)
  1756. {
  1757. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1758. /* DMA Normal Mode */
  1759. if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
  1760. {
  1761. /* Wait until TXE flag is set to send data */
  1762. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1763. {
  1764. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1765. }
  1766. /* Disable Tx DMA Request */
  1767. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1768. /* Wait until Busy flag is reset before disabling SPI */
  1769. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1770. {
  1771. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1772. }
  1773. hspi->TxXferCount = 0;
  1774. hspi->State = HAL_SPI_STATE_READY;
  1775. }
  1776. /* Clear OVERUN flag in 2 Lines communication mode because received is not read */
  1777. if(hspi->Init.Direction == SPI_DIRECTION_2LINES)
  1778. {
  1779. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1780. }
  1781. /* Check if Errors has been detected during transfer */
  1782. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1783. {
  1784. HAL_SPI_ErrorCallback(hspi);
  1785. }
  1786. else
  1787. {
  1788. HAL_SPI_TxCpltCallback(hspi);
  1789. }
  1790. }
  1791. /**
  1792. * @brief DMA SPI receive process complete callback
  1793. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1794. * the configuration information for the specified DMA module.
  1795. * @retval None
  1796. */
  1797. static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
  1798. {
  1799. __IO uint16_t tmpreg = 0;
  1800. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1801. /* DMA Normal mode */
  1802. if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
  1803. {
  1804. /* Disable Rx DMA Request */
  1805. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1806. /* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
  1807. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1808. /* CRC Calculation handling */
  1809. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1810. {
  1811. /* Wait until RXNE flag is set (CRC ready) */
  1812. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1813. {
  1814. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1815. }
  1816. /* Read CRC */
  1817. tmpreg = hspi->Instance->DR;
  1818. UNUSED(tmpreg);
  1819. /* Wait until RXNE flag is reset */
  1820. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1821. {
  1822. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1823. }
  1824. /* Check if CRC error occurred */
  1825. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1826. {
  1827. /* Check if CRC error is valid or not (workaround to be applied or not) */
  1828. if (SPI_ISCRCErrorValid(hspi) == SPI_VALID_CRC_ERROR)
  1829. {
  1830. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1831. /* Reset CRC Calculation */
  1832. SPI_RESET_CRC(hspi);
  1833. }
  1834. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1835. }
  1836. }
  1837. if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1838. {
  1839. /* Disable SPI peripheral */
  1840. __HAL_SPI_DISABLE(hspi);
  1841. }
  1842. hspi->RxXferCount = 0;
  1843. hspi->State = HAL_SPI_STATE_READY;
  1844. /* Check if Errors has been detected during transfer */
  1845. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1846. {
  1847. HAL_SPI_ErrorCallback(hspi);
  1848. }
  1849. else
  1850. {
  1851. HAL_SPI_RxCpltCallback(hspi);
  1852. }
  1853. }
  1854. else
  1855. {
  1856. HAL_SPI_RxCpltCallback(hspi);
  1857. }
  1858. }
  1859. /**
  1860. * @brief DMA SPI transmit receive process complete callback
  1861. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1862. * the configuration information for the specified DMA module.
  1863. * @retval None
  1864. */
  1865. static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
  1866. {
  1867. __IO uint16_t tmpreg = 0;
  1868. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1869. if((hdma->Instance->CCR & DMA_CIRCULAR) == 0)
  1870. {
  1871. /* CRC Calculation handling */
  1872. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  1873. {
  1874. /* Check if CRC is done on going (RXNE flag set) */
  1875. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
  1876. {
  1877. /* Wait until RXNE flag is set to send data */
  1878. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1879. {
  1880. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1881. }
  1882. }
  1883. /* Read CRC */
  1884. tmpreg = hspi->Instance->DR;
  1885. UNUSED(tmpreg);
  1886. /* Check if CRC error occurred */
  1887. if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
  1888. {
  1889. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC);
  1890. __HAL_SPI_CLEAR_CRCERRFLAG(hspi);
  1891. }
  1892. }
  1893. /* Wait until TXE flag is set to send data */
  1894. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1895. {
  1896. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1897. }
  1898. /* Disable Tx DMA Request */
  1899. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
  1900. /* Wait until Busy flag is reset before disabling SPI */
  1901. if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
  1902. {
  1903. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1904. }
  1905. /* Disable Rx DMA Request */
  1906. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
  1907. hspi->TxXferCount = 0;
  1908. hspi->RxXferCount = 0;
  1909. hspi->State = HAL_SPI_STATE_READY;
  1910. /* Check if Errors has been detected during transfer */
  1911. if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1912. {
  1913. HAL_SPI_ErrorCallback(hspi);
  1914. }
  1915. else
  1916. {
  1917. HAL_SPI_TxRxCpltCallback(hspi);
  1918. }
  1919. }
  1920. else
  1921. {
  1922. HAL_SPI_TxRxCpltCallback(hspi);
  1923. }
  1924. }
  1925. /**
  1926. * @brief DMA SPI half transmit process complete callback
  1927. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1928. * the configuration information for the specified DMA module.
  1929. * @retval None
  1930. */
  1931. static void SPI_DMAHalfTransmitCplt(DMA_HandleTypeDef *hdma)
  1932. {
  1933. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1934. HAL_SPI_TxHalfCpltCallback(hspi);
  1935. }
  1936. /**
  1937. * @brief DMA SPI half receive process complete callback
  1938. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1939. * the configuration information for the specified DMA module.
  1940. * @retval None
  1941. */
  1942. static void SPI_DMAHalfReceiveCplt(DMA_HandleTypeDef *hdma)
  1943. {
  1944. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1945. HAL_SPI_RxHalfCpltCallback(hspi);
  1946. }
  1947. /**
  1948. * @brief DMA SPI Half transmit receive process complete callback
  1949. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1950. * the configuration information for the specified DMA module.
  1951. * @retval None
  1952. */
  1953. static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
  1954. {
  1955. SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1956. HAL_SPI_TxRxHalfCpltCallback(hspi);
  1957. }
  1958. /**
  1959. * @brief DMA SPI communication error callback
  1960. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  1961. * the configuration information for the specified DMA module.
  1962. * @retval None
  1963. */
  1964. static void SPI_DMAError(DMA_HandleTypeDef *hdma)
  1965. {
  1966. SPI_HandleTypeDef* hspi = (SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1967. hspi->TxXferCount = 0;
  1968. hspi->RxXferCount = 0;
  1969. hspi->State= HAL_SPI_STATE_READY;
  1970. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
  1971. HAL_SPI_ErrorCallback(hspi);
  1972. }
  1973. /**
  1974. * @brief This function handles SPI Communication Timeout.
  1975. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  1976. * the configuration information for SPI module.
  1977. * @param Flag: SPI flag to check
  1978. * @param Status: Flag status to check: RESET or set
  1979. * @param Timeout: Timeout duration
  1980. * @retval HAL status
  1981. */
  1982. static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
  1983. {
  1984. uint32_t tickstart = 0;
  1985. /* Get tick */
  1986. tickstart = HAL_GetTick();
  1987. /* Wait until flag is set */
  1988. if(Status == RESET)
  1989. {
  1990. while(__HAL_SPI_GET_FLAG(hspi, Flag) == RESET)
  1991. {
  1992. if(Timeout != HAL_MAX_DELAY)
  1993. {
  1994. if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
  1995. {
  1996. /* Disable the SPI and reset the CRC: the CRC value should be cleared
  1997. on both master and slave sides in order to resynchronize the master
  1998. and slave for their respective CRC calculation */
  1999. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  2000. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  2001. /* Disable SPI peripheral */
  2002. __HAL_SPI_DISABLE(hspi);
  2003. /* Reset CRC Calculation */
  2004. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  2005. {
  2006. SPI_RESET_CRC(hspi);
  2007. }
  2008. hspi->State= HAL_SPI_STATE_READY;
  2009. /* Process Unlocked */
  2010. __HAL_UNLOCK(hspi);
  2011. return HAL_TIMEOUT;
  2012. }
  2013. }
  2014. }
  2015. }
  2016. else
  2017. {
  2018. while(__HAL_SPI_GET_FLAG(hspi, Flag) != RESET)
  2019. {
  2020. if(Timeout != HAL_MAX_DELAY)
  2021. {
  2022. if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
  2023. {
  2024. /* Disable the SPI and reset the CRC: the CRC value should be cleared
  2025. on both master and slave sides in order to resynchronize the master
  2026. and slave for their respective CRC calculation */
  2027. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  2028. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  2029. /* Disable SPI peripheral */
  2030. __HAL_SPI_DISABLE(hspi);
  2031. /* Reset CRC Calculation */
  2032. if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  2033. {
  2034. SPI_RESET_CRC(hspi);
  2035. }
  2036. hspi->State= HAL_SPI_STATE_READY;
  2037. /* Process Unlocked */
  2038. __HAL_UNLOCK(hspi);
  2039. return HAL_TIMEOUT;
  2040. }
  2041. }
  2042. }
  2043. }
  2044. return HAL_OK;
  2045. }
  2046. /**
  2047. * @}
  2048. */
  2049. /** @addtogroup SPI_Private_Functions
  2050. * @{
  2051. */
  2052. /**
  2053. * @brief Checks if encountered CRC error could be corresponding to wrongly detected errors
  2054. * according to SPI instance, Device type, and revision ID.
  2055. * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
  2056. * the configuration information for SPI module.
  2057. * @retval CRC error validity (SPI_INVALID_CRC_ERROR or SPI_VALID_CRC_ERROR).
  2058. */
  2059. __weak uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi)
  2060. {
  2061. return (SPI_VALID_CRC_ERROR);
  2062. }
  2063. /**
  2064. * @}
  2065. */
  2066. #endif /* HAL_SPI_MODULE_ENABLED */
  2067. /**
  2068. * @}
  2069. */
  2070. /**
  2071. * @}
  2072. */
  2073. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/