stm32f1xx_hal_spi.h 26 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_spi.h
  4. * @author MCD Application Team
  5. * @version V1.0.4
  6. * @date 29-April-2016
  7. * @brief Header file of SPI HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F1xx_HAL_SPI_H
  39. #define __STM32F1xx_HAL_SPI_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32f1xx_hal_def.h"
  45. /** @addtogroup STM32F1xx_HAL_Driver
  46. * @{
  47. */
  48. /** @addtogroup SPI
  49. * @{
  50. */
  51. /* Exported types ------------------------------------------------------------*/
  52. /** @defgroup SPI_Exported_Types SPI Exported Types
  53. * @{
  54. */
  55. /**
  56. * @brief SPI Configuration Structure definition
  57. */
  58. typedef struct
  59. {
  60. uint32_t Mode; /*!< Specifies the SPI operating mode.
  61. This parameter can be a value of @ref SPI_mode */
  62. uint32_t Direction; /*!< Specifies the SPI Directional mode state.
  63. This parameter can be a value of @ref SPI_Direction_mode */
  64. uint32_t DataSize; /*!< Specifies the SPI data size.
  65. This parameter can be a value of @ref SPI_data_size */
  66. uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
  67. This parameter can be a value of @ref SPI_Clock_Polarity */
  68. uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
  69. This parameter can be a value of @ref SPI_Clock_Phase */
  70. uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
  71. hardware (NSS pin) or by software using the SSI bit.
  72. This parameter can be a value of @ref SPI_Slave_Select_management */
  73. uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
  74. used to configure the transmit and receive SCK clock.
  75. This parameter can be a value of @ref SPI_BaudRate_Prescaler
  76. @note The communication clock is derived from the master
  77. clock. The slave clock does not need to be set */
  78. uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
  79. This parameter can be a value of @ref SPI_MSB_LSB_transmission */
  80. uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
  81. This parameter can be a value of @ref SPI_TI_mode */
  82. uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
  83. This parameter can be a value of @ref SPI_CRC_Calculation */
  84. uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
  85. This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
  86. }SPI_InitTypeDef;
  87. /**
  88. * @brief HAL SPI State structure definition
  89. */
  90. typedef enum
  91. {
  92. HAL_SPI_STATE_RESET = 0x00, /*!< SPI not yet initialized or disabled */
  93. HAL_SPI_STATE_READY = 0x01, /*!< SPI initialized and ready for use */
  94. HAL_SPI_STATE_BUSY = 0x02, /*!< SPI process is ongoing */
  95. HAL_SPI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
  96. HAL_SPI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
  97. HAL_SPI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
  98. HAL_SPI_STATE_ERROR = 0x03 /*!< SPI error state */
  99. }HAL_SPI_StateTypeDef;
  100. /**
  101. * @brief SPI handle Structure definition
  102. */
  103. typedef struct __SPI_HandleTypeDef
  104. {
  105. SPI_TypeDef *Instance; /*!< SPI registers base address */
  106. SPI_InitTypeDef Init; /*!< SPI communication parameters */
  107. uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */
  108. uint16_t TxXferSize; /*!< SPI Tx transfer size */
  109. uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */
  110. uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */
  111. uint16_t RxXferSize; /*!< SPI Rx transfer size */
  112. uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */
  113. DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA handle parameters */
  114. DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA handle parameters */
  115. void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Rx ISR */
  116. void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /*!< function pointer on Tx ISR */
  117. HAL_LockTypeDef Lock; /*!< SPI locking object */
  118. __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */
  119. __IO uint32_t ErrorCode; /*!< SPI Error code */
  120. }SPI_HandleTypeDef;
  121. /**
  122. * @}
  123. */
  124. /* Exported constants --------------------------------------------------------*/
  125. /** @defgroup SPI_Exported_Constants SPI Exported Constants
  126. * @{
  127. */
  128. /** @defgroup SPI_Error_Codes SPI Error Codes
  129. * @{
  130. */
  131. #define HAL_SPI_ERROR_NONE ((uint32_t)0x00) /*!< No error */
  132. #define HAL_SPI_ERROR_MODF ((uint32_t)0x01) /*!< MODF error */
  133. #define HAL_SPI_ERROR_CRC ((uint32_t)0x02) /*!< CRC error */
  134. #define HAL_SPI_ERROR_OVR ((uint32_t)0x04) /*!< OVR error */
  135. #define HAL_SPI_ERROR_DMA ((uint32_t)0x08) /*!< DMA transfer error */
  136. #define HAL_SPI_ERROR_FLAG ((uint32_t)0x10) /*!< Flag: RXNE,TXE, BSY */
  137. /**
  138. * @}
  139. */
  140. /** @defgroup SPI_mode SPI mode
  141. * @{
  142. */
  143. #define SPI_MODE_SLAVE ((uint32_t)0x00000000)
  144. #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
  145. /**
  146. * @}
  147. */
  148. /** @defgroup SPI_Direction_mode SPI Direction mode
  149. * @{
  150. */
  151. #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
  152. #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
  153. #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
  154. /**
  155. * @}
  156. */
  157. /** @defgroup SPI_data_size SPI data size
  158. * @{
  159. */
  160. #define SPI_DATASIZE_8BIT ((uint32_t)0x00000000)
  161. #define SPI_DATASIZE_16BIT SPI_CR1_DFF
  162. /**
  163. * @}
  164. */
  165. /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
  166. * @{
  167. */
  168. #define SPI_POLARITY_LOW ((uint32_t)0x00000000)
  169. #define SPI_POLARITY_HIGH SPI_CR1_CPOL
  170. /**
  171. * @}
  172. */
  173. /** @defgroup SPI_Clock_Phase SPI Clock Phase
  174. * @{
  175. */
  176. #define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
  177. #define SPI_PHASE_2EDGE SPI_CR1_CPHA
  178. /**
  179. * @}
  180. */
  181. /** @defgroup SPI_Slave_Select_management SPI Slave Select management
  182. * @{
  183. */
  184. #define SPI_NSS_SOFT SPI_CR1_SSM
  185. #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
  186. #define SPI_NSS_HARD_OUTPUT ((uint32_t)(SPI_CR2_SSOE << 16))
  187. /**
  188. * @}
  189. */
  190. /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
  191. * @{
  192. */
  193. #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
  194. #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)SPI_CR1_BR_0)
  195. #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)SPI_CR1_BR_1)
  196. #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)SPI_CR1_BR_1 | SPI_CR1_BR_0)
  197. #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)SPI_CR1_BR_2)
  198. #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_0)
  199. #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1)
  200. #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
  201. /**
  202. * @}
  203. */
  204. /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
  205. * @{
  206. */
  207. #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
  208. #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
  209. /**
  210. * @}
  211. */
  212. /** @defgroup SPI_TI_mode SPI TI mode disable
  213. * @brief SPI TI Mode not supported for STM32F1xx family
  214. * @{
  215. */
  216. #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000)
  217. /**
  218. * @}
  219. */
  220. /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
  221. * @{
  222. */
  223. #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000)
  224. #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
  225. /**
  226. * @}
  227. */
  228. /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
  229. * @{
  230. */
  231. #define SPI_IT_TXE SPI_CR2_TXEIE
  232. #define SPI_IT_RXNE SPI_CR2_RXNEIE
  233. #define SPI_IT_ERR SPI_CR2_ERRIE
  234. /**
  235. * @}
  236. */
  237. /** @defgroup SPI_Flag_definition SPI Flag definition
  238. * @{
  239. */
  240. #define SPI_FLAG_RXNE SPI_SR_RXNE
  241. #define SPI_FLAG_TXE SPI_SR_TXE
  242. #define SPI_FLAG_CRCERR SPI_SR_CRCERR
  243. #define SPI_FLAG_MODF SPI_SR_MODF
  244. #define SPI_FLAG_OVR SPI_SR_OVR
  245. #define SPI_FLAG_BSY SPI_SR_BSY
  246. /**
  247. * @}
  248. */
  249. /**
  250. * @}
  251. */
  252. /* Private constants ---------------------------------------------------------*/
  253. /** @defgroup SPI_Private_Constants SPI Private Constants
  254. * @{
  255. */
  256. #define SPI_INVALID_CRC_ERROR 0 /* CRC error wrongly detected */
  257. #define SPI_VALID_CRC_ERROR 1 /* CRC error is true */
  258. /**
  259. * @}
  260. */
  261. /* Exported macro ------------------------------------------------------------*/
  262. /** @defgroup SPI_Exported_Macros SPI Exported Macros
  263. * @{
  264. */
  265. /** @brief Reset SPI handle state
  266. * @param __HANDLE__: specifies the SPI handle.
  267. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  268. * @retval None
  269. */
  270. #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
  271. /** @brief Enable the specified SPI interrupts.
  272. * @param __HANDLE__: specifies the SPI handle.
  273. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  274. * @param __INTERRUPT__: specifies the interrupt source to enable.
  275. * This parameter can be one of the following values:
  276. * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
  277. * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
  278. * @arg SPI_IT_ERR: Error interrupt enable
  279. * @retval None
  280. */
  281. #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
  282. /** @brief Disable the specified SPI interrupts.
  283. * @param __HANDLE__: specifies the SPI handle.
  284. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  285. * @param __INTERRUPT__: specifies the interrupt source to disable.
  286. * This parameter can be one of the following values:
  287. * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
  288. * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
  289. * @arg SPI_IT_ERR: Error interrupt enable
  290. * @retval None
  291. */
  292. #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
  293. /** @brief Check if the specified SPI interrupt source is enabled or disabled.
  294. * @param __HANDLE__: specifies the SPI handle.
  295. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  296. * @param __INTERRUPT__: specifies the SPI interrupt source to check.
  297. * This parameter can be one of the following values:
  298. * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
  299. * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
  300. * @arg SPI_IT_ERR: Error interrupt enable
  301. * @retval The new state of __IT__ (TRUE or FALSE).
  302. */
  303. #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
  304. /** @brief Check whether the specified SPI flag is set or not.
  305. * @param __HANDLE__: specifies the SPI handle.
  306. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  307. * @param __FLAG__: specifies the flag to check.
  308. * This parameter can be one of the following values:
  309. * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
  310. * @arg SPI_FLAG_TXE: Transmit buffer empty flag
  311. * @arg SPI_FLAG_CRCERR: CRC error flag
  312. * @arg SPI_FLAG_MODF: Mode fault flag
  313. * @arg SPI_FLAG_OVR: Overrun flag
  314. * @arg SPI_FLAG_BSY: Busy flag
  315. * @retval The new state of __FLAG__ (TRUE or FALSE).
  316. */
  317. #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
  318. /** @brief Clear the SPI CRCERR pending flag.
  319. * @param __HANDLE__: specifies the SPI handle.
  320. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  321. * @retval None
  322. */
  323. #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR))
  324. /** @brief Clear the SPI MODF pending flag.
  325. * @param __HANDLE__: specifies the SPI handle.
  326. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  327. * @retval None
  328. */
  329. #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
  330. do{ \
  331. __IO uint32_t tmpreg; \
  332. tmpreg = (__HANDLE__)->Instance->SR; \
  333. tmpreg = CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \
  334. UNUSED(tmpreg); \
  335. }while(0)
  336. /** @brief Clear the SPI OVR pending flag.
  337. * @param __HANDLE__: specifies the SPI handle.
  338. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  339. * @retval None
  340. */
  341. #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
  342. do{ \
  343. __IO uint32_t tmpreg; \
  344. tmpreg = (__HANDLE__)->Instance->DR; \
  345. tmpreg = (__HANDLE__)->Instance->SR; \
  346. UNUSED(tmpreg); \
  347. }while(0)
  348. /** @brief Enables the SPI.
  349. * @param __HANDLE__: specifies the SPI Handle.
  350. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  351. * @retval None
  352. */
  353. #define __HAL_SPI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
  354. /** @brief Disables the SPI.
  355. * @param __HANDLE__: specifies the SPI Handle.
  356. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  357. * @retval None
  358. */
  359. #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
  360. /**
  361. * @}
  362. */
  363. /* Private macros -----------------------------------------------------------*/
  364. /** @defgroup SPI_Private_Macros SPI Private Macros
  365. * @{
  366. */
  367. /** @brief Checks if SPI Mode parameter is in allowed range.
  368. * @param __MODE__: specifies the SPI Mode.
  369. * This parameter can be a value of @ref SPI_mode
  370. * @retval None
  371. */
  372. #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || ((__MODE__) == SPI_MODE_MASTER))
  373. /** @brief Checks if SPI Direction Mode parameter is in allowed range.
  374. * @param __MODE__: specifies the SPI Direction Mode.
  375. * This parameter can be a value of @ref SPI_Direction_mode
  376. * @retval None
  377. */
  378. #define IS_SPI_DIRECTION_MODE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
  379. ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
  380. ((__MODE__) == SPI_DIRECTION_1LINE))
  381. /** @brief Checks if SPI Direction Mode parameter is 1 or 2 lines.
  382. * @param __MODE__: specifies the SPI Direction Mode.
  383. * @retval None
  384. */
  385. #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
  386. ((__MODE__) == SPI_DIRECTION_1LINE))
  387. /** @brief Checks if SPI Direction Mode parameter is 2 lines.
  388. * @param __MODE__: specifies the SPI Direction Mode.
  389. * @retval None
  390. */
  391. #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)
  392. /** @brief Checks if SPI Data Size parameter is in allowed range.
  393. * @param __DATASIZE__: specifies the SPI Data Size.
  394. * This parameter can be a value of @ref SPI_data_size
  395. * @retval None
  396. */
  397. #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \
  398. ((__DATASIZE__) == SPI_DATASIZE_8BIT))
  399. /** @brief Checks if SPI Serial clock steady state parameter is in allowed range.
  400. * @param __CPOL__: specifies the SPI serial clock steady state.
  401. * This parameter can be a value of @ref SPI_Clock_Polarity
  402. * @retval None
  403. */
  404. #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
  405. ((__CPOL__) == SPI_POLARITY_HIGH))
  406. /** @brief Checks if SPI Clock Phase parameter is in allowed range.
  407. * @param __CPHA__: specifies the SPI Clock Phase.
  408. * This parameter can be a value of @ref SPI_Clock_Phase
  409. * @retval None
  410. */
  411. #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
  412. ((__CPHA__) == SPI_PHASE_2EDGE))
  413. /** @brief Checks if SPI Slave select parameter is in allowed range.
  414. * @param __NSS__: specifies the SPI Slave Slelect management parameter.
  415. * This parameter can be a value of @ref SPI_Slave_Select_management
  416. * @retval None
  417. */
  418. #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT) || \
  419. ((__NSS__) == SPI_NSS_HARD_INPUT) || \
  420. ((__NSS__) == SPI_NSS_HARD_OUTPUT))
  421. /** @brief Checks if SPI Baudrate prescaler parameter is in allowed range.
  422. * @param __PRESCALER__: specifies the SPI Baudrate prescaler.
  423. * This parameter can be a value of @ref SPI_BaudRate_Prescaler
  424. * @retval None
  425. */
  426. #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2) || \
  427. ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4) || \
  428. ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8) || \
  429. ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16) || \
  430. ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32) || \
  431. ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64) || \
  432. ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \
  433. ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))
  434. /** @brief Checks if SPI MSB LSB transmission parameter is in allowed range.
  435. * @param __BIT__: specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit).
  436. * This parameter can be a value of @ref SPI_MSB_LSB_transmission
  437. * @retval None
  438. */
  439. #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \
  440. ((__BIT__) == SPI_FIRSTBIT_LSB))
  441. /** @brief Checks if SPI TI mode parameter is in allowed range.
  442. * @param __MODE__: specifies the SPI TI mode.
  443. * This parameter can be a value of @ref SPI_TI_mode
  444. * @retval None
  445. */
  446. #define IS_SPI_TIMODE(__MODE__) ((__MODE__) == SPI_TIMODE_DISABLE)
  447. /** @brief Checks if SPI CRC calculation enabled state is in allowed range.
  448. * @param __CALCULATION__: specifies the SPI CRC calculation enable state.
  449. * This parameter can be a value of @ref SPI_CRC_Calculation
  450. * @retval None
  451. */
  452. #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \
  453. ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))
  454. /** @brief Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range.
  455. * @param __POLYNOMIAL__: specifies the SPI polynomial value to be used for the CRC calculation.
  456. * This parameter must be a number between Min_Data = 0 and Max_Data = 65535
  457. * @retval None
  458. */
  459. #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1) && ((__POLYNOMIAL__) <= 0xFFFF))
  460. /** @brief Sets the SPI transmit-only mode.
  461. * @param __HANDLE__: specifies the SPI Handle.
  462. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  463. * @retval None
  464. */
  465. #define SPI_1LINE_TX(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
  466. /** @brief Sets the SPI receive-only mode.
  467. * @param __HANDLE__: specifies the SPI Handle.
  468. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  469. * @retval None
  470. */
  471. #define SPI_1LINE_RX(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
  472. /** @brief Resets the CRC calculation of the SPI.
  473. * @param __HANDLE__: specifies the SPI Handle.
  474. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
  475. * @retval None
  476. */
  477. #define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
  478. SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0)
  479. /**
  480. * @}
  481. */
  482. /* Exported functions --------------------------------------------------------*/
  483. /** @addtogroup SPI_Exported_Functions
  484. * @{
  485. */
  486. /* Initialization/de-initialization functions **********************************/
  487. /** @addtogroup SPI_Exported_Functions_Group1
  488. * @{
  489. */
  490. HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
  491. HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
  492. void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
  493. void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
  494. /**
  495. * @}
  496. */
  497. /* I/O operation functions *****************************************************/
  498. /** @addtogroup SPI_Exported_Functions_Group2
  499. * @{
  500. */
  501. HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  502. HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  503. HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
  504. HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
  505. HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
  506. HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
  507. HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
  508. HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
  509. HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
  510. HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
  511. HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
  512. HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
  513. void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
  514. void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
  515. void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
  516. void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
  517. void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
  518. void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
  519. void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
  520. void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
  521. /**
  522. * @}
  523. */
  524. /* Peripheral State and Control functions **************************************/
  525. /** @addtogroup SPI_Exported_Functions_Group3
  526. * @{
  527. */
  528. HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
  529. uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
  530. /**
  531. * @}
  532. */
  533. /**
  534. * @}
  535. */
  536. /* Private functions --------------------------------------------------------*/
  537. /** @addtogroup SPI_Private_Functions
  538. * @{
  539. */
  540. uint8_t SPI_ISCRCErrorValid(SPI_HandleTypeDef *hspi);
  541. /**
  542. * @}
  543. */
  544. /**
  545. * @}
  546. */
  547. /**
  548. * @}
  549. */
  550. #ifdef __cplusplus
  551. }
  552. #endif
  553. #endif /* __STM32F1xx_HAL_SPI_H */
  554. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/