stm32f1xx_hal_cec.c 31 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_cec.c
  4. * @author MCD Application Team
  5. * @version V1.0.4
  6. * @date 29-April-2016
  7. * @brief CEC HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the High Definition Multimedia Interface
  10. * Consumer Electronics Control Peripheral (CEC).
  11. * + Initialization and de-initialization functions
  12. * + IO operation functions
  13. * + Peripheral Control functions
  14. *
  15. * @verbatim
  16. ==============================================================================
  17. ##### How to use this driver #####
  18. ==============================================================================
  19. [..]
  20. The CEC HAL driver can be used as follows:
  21. (#) Declare a CEC_HandleTypeDef handle structure.
  22. (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API:
  23. (##) Enable the CEC interface clock.
  24. (##) Enable the clock for the CEC GPIOs.
  25. (##) Configure these CEC pins as alternate function pull-up.
  26. (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT()
  27. and HAL_CEC_Receive_IT() APIs):
  28. (##) Configure the CEC interrupt priority.
  29. (##) Enable the NVIC CEC IRQ handle.
  30. (##) The CEC interrupt is activated/deactivated by the HAL driver
  31. (#) Program the Bit Timing Error Mode and the Bit Period Error Mode in the hcec Init structure.
  32. (#) Initialize the CEC registers by calling the HAL_CEC_Init() API.
  33. (#) This API (HAL_CEC_Init()) configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
  34. by calling the customized HAL_CEC_MspInit() API.
  35. @endverbatim
  36. ******************************************************************************
  37. * @attention
  38. *
  39. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  40. *
  41. * Redistribution and use in source and binary forms, with or without modification,
  42. * are permitted provided that the following conditions are met:
  43. * 1. Redistributions of source code must retain the above copyright notice,
  44. * this list of conditions and the following disclaimer.
  45. * 2. Redistributions in binary form must reproduce the above copyright notice,
  46. * this list of conditions and the following disclaimer in the documentation
  47. * and/or other materials provided with the distribution.
  48. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  49. * may be used to endorse or promote products derived from this software
  50. * without specific prior written permission.
  51. *
  52. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  53. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  54. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  55. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  56. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  57. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  58. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  59. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  60. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  61. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  62. *
  63. ******************************************************************************
  64. */
  65. /* Includes ------------------------------------------------------------------*/
  66. #include "stm32f1xx_hal.h"
  67. #ifdef HAL_CEC_MODULE_ENABLED
  68. #if defined(STM32F100xB) || defined(STM32F100xE)
  69. /** @addtogroup STM32F1xx_HAL_Driver
  70. * @{
  71. */
  72. /** @defgroup CEC CEC
  73. * @brief HAL CEC module driver
  74. * @{
  75. */
  76. /* Private typedef -----------------------------------------------------------*/
  77. /* Private define ------------------------------------------------------------*/
  78. /** @defgroup CEC_Private_Constants CEC Private Constants
  79. * @{
  80. */
  81. #define CEC_CFGR_FIELDS (CEC_CFGR_BTEM | CEC_CFGR_BPEM )
  82. #define CEC_FLAG_TRANSMIT_MASK (CEC_FLAG_TSOM|CEC_FLAG_TEOM|CEC_FLAG_TBTRF)
  83. #define CEC_FLAG_RECEIVE_MASK (CEC_FLAG_RSOM|CEC_FLAG_REOM|CEC_FLAG_RBTF)
  84. #define CEC_ESR_ALL_ERROR (CEC_ESR_BTE|CEC_ESR_BPE|CEC_ESR_RBTFE|CEC_ESR_SBE|CEC_ESR_ACKE|CEC_ESR_LINE|CEC_ESR_TBTFE)
  85. #define CEC_RXXFERSIZE_INITIALIZE 0xFFFF /*!< Value used to initialise the RxXferSize of the handle */
  86. /**
  87. * @}
  88. */
  89. /* Private macro -------------------------------------------------------------*/
  90. /* Private variables ---------------------------------------------------------*/
  91. /* Private function prototypes -----------------------------------------------*/
  92. /** @defgroup CEC_Private_Functions CEC Private Functions
  93. * @{
  94. */
  95. static HAL_StatusTypeDef CEC_Transmit_IT(CEC_HandleTypeDef *hcec);
  96. static HAL_StatusTypeDef CEC_Receive_IT(CEC_HandleTypeDef *hcec);
  97. /**
  98. * @}
  99. */
  100. /* Exported functions ---------------------------------------------------------*/
  101. /** @defgroup CEC_Exported_Functions CEC Exported Functions
  102. * @{
  103. */
  104. /** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
  105. * @brief Initialization and Configuration functions
  106. *
  107. @verbatim
  108. ===============================================================================
  109. ##### Initialization and Configuration functions #####
  110. ===============================================================================
  111. [..]
  112. This subsection provides a set of functions allowing to initialize the CEC
  113. (+) The following parameters need to be configured:
  114. (++) TimingErrorFree
  115. (++) PeriodErrorFree
  116. (++) InitiatorAddress
  117. @endverbatim
  118. * @{
  119. */
  120. /**
  121. * @brief Initializes the CEC mode according to the specified
  122. * parameters in the CEC_InitTypeDef and creates the associated handle .
  123. * @param hcec: CEC handle
  124. * @retval HAL status
  125. */
  126. HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
  127. {
  128. /* Check the CEC handle allocation */
  129. if(hcec == NULL)
  130. {
  131. return HAL_ERROR;
  132. }
  133. /* Check the parameters */
  134. assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
  135. assert_param(IS_CEC_BIT_TIMING_ERROR_MODE(hcec->Init.TimingErrorFree));
  136. assert_param(IS_CEC_BIT_PERIOD_ERROR_MODE(hcec->Init.PeriodErrorFree));
  137. assert_param(IS_CEC_ADDRESS(hcec->Init.InitiatorAddress));
  138. if(hcec->State == HAL_CEC_STATE_RESET)
  139. {
  140. /* Allocate lock resource and initialize it */
  141. hcec->Lock = HAL_UNLOCKED;
  142. /* Init the low level hardware : GPIO, CLOCK */
  143. HAL_CEC_MspInit(hcec);
  144. }
  145. hcec->State = HAL_CEC_STATE_BUSY;
  146. /* Disable the Peripheral */
  147. __HAL_CEC_DISABLE(hcec);
  148. /* Write to CEC Control Register */
  149. MODIFY_REG(hcec->Instance->CFGR, CEC_CFGR_FIELDS, hcec->Init.TimingErrorFree|hcec->Init.PeriodErrorFree);
  150. /* Write to CEC Own Address Register */
  151. MODIFY_REG(hcec->Instance->OAR, CEC_OAR_OA, hcec->Init.InitiatorAddress);
  152. /* Configure the prescaler to generate the required 50 microseconds time base.*/
  153. MODIFY_REG(hcec->Instance->PRES, CEC_PRES_PRES, 50*(HAL_RCC_GetPCLK1Freq()/1000000)-1);
  154. /* Enable the Peripheral */
  155. __HAL_CEC_ENABLE(hcec);
  156. hcec->State = HAL_CEC_STATE_READY;
  157. return HAL_OK;
  158. }
  159. /**
  160. * @brief DeInitializes the CEC peripheral
  161. * @param hcec: CEC handle
  162. * @retval HAL status
  163. */
  164. HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
  165. {
  166. /* Check the CEC handle allocation */
  167. if(hcec == NULL)
  168. {
  169. return HAL_ERROR;
  170. }
  171. /* Check the parameters */
  172. assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
  173. hcec->State = HAL_CEC_STATE_BUSY;
  174. /* Set peripheral to reset state */
  175. hcec->Instance->CFGR = 0x0;
  176. hcec->Instance->OAR = 0x0;
  177. hcec->Instance->PRES = 0x0;
  178. hcec->Instance->CFGR = 0x0;
  179. hcec->Instance->ESR = 0x0;
  180. hcec->Instance->CSR = 0x0;
  181. hcec->Instance->TXD = 0x0;
  182. hcec->Instance->RXD = 0x0;
  183. /* Disable the Peripheral */
  184. __HAL_CEC_DISABLE(hcec);
  185. /* DeInit the low level hardware */
  186. HAL_CEC_MspDeInit(hcec);
  187. hcec->ErrorCode = HAL_CEC_ERROR_NONE;
  188. hcec->State = HAL_CEC_STATE_RESET;
  189. /* Process Unlock */
  190. __HAL_UNLOCK(hcec);
  191. return HAL_OK;
  192. }
  193. /**
  194. * @brief CEC MSP Init
  195. * @param hcec: CEC handle
  196. * @retval None
  197. */
  198. __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
  199. {
  200. /* Prevent unused argument(s) compilation warning */
  201. UNUSED(hcec);
  202. /* NOTE : This function should not be modified, when the callback is needed,
  203. the HAL_CEC_MspInit can be implemented in the user file
  204. */
  205. }
  206. /**
  207. * @brief CEC MSP DeInit
  208. * @param hcec: CEC handle
  209. * @retval None
  210. */
  211. __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
  212. {
  213. /* Prevent unused argument(s) compilation warning */
  214. UNUSED(hcec);
  215. /* NOTE : This function should not be modified, when the callback is needed,
  216. the HAL_CEC_MspDeInit can be implemented in the user file
  217. */
  218. }
  219. /**
  220. * @}
  221. */
  222. /** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions
  223. * @brief CEC Transmit/Receive functions
  224. *
  225. @verbatim
  226. ===============================================================================
  227. ##### IO operation functions #####
  228. ===============================================================================
  229. [..]
  230. This subsection provides a set of functions allowing to manage the CEC data transfers.
  231. (#) There are two modes of transfer:
  232. (##) Blocking mode: The communication is performed in polling mode.
  233. The HAL status of all data processing is returned by the same function
  234. after finishing transfer.
  235. (##) No-Blocking mode: The communication is performed using Interrupts.
  236. These API's return the HAL status.
  237. The end of the data processing will be indicated through the
  238. dedicated CEC IRQ when using Interrupt mode.
  239. The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks
  240. will be executed respectivelly at the end of the Transmit or Receive process.
  241. The HAL_CEC_ErrorCallback()user callback will be executed when a communication
  242. error is detected
  243. (#) Blocking mode API's are :
  244. (##) HAL_CEC_Transmit()
  245. (##) HAL_CEC_Receive()
  246. (#) Non-Blocking mode API's with Interrupt are :
  247. (##) HAL_CEC_Transmit_IT()
  248. (##) HAL_CEC_Receive_IT()
  249. (##) HAL_CEC_IRQHandler()
  250. (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
  251. (##) HAL_CEC_TxCpltCallback()
  252. (##) HAL_CEC_RxCpltCallback()
  253. (##) HAL_CEC_ErrorCallback()
  254. @endverbatim
  255. * @{
  256. */
  257. /**
  258. * @brief Send data in blocking mode
  259. * @param hcec: CEC handle
  260. * @param DestinationAddress: destination logical address
  261. * @param pData: pointer to input byte data buffer
  262. * @param Size: amount of data to be sent in bytes (without counting the header).
  263. * 0 means only the header is sent (ping operation).
  264. * Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
  265. * @param Timeout: Timeout duration.
  266. * @retval HAL status
  267. */
  268. HAL_StatusTypeDef HAL_CEC_Transmit(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size, uint32_t Timeout)
  269. {
  270. uint8_t temp = 0;
  271. uint32_t tickstart = 0;
  272. /* If the IP is ready */
  273. if((hcec->State == HAL_CEC_STATE_READY)
  274. && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET))
  275. {
  276. /* Basic check on pData pointer */
  277. if(((pData == NULL) && (Size > 0)) || (! IS_CEC_MSGSIZE(Size)))
  278. {
  279. return HAL_ERROR;
  280. }
  281. assert_param(IS_CEC_ADDRESS(DestinationAddress));
  282. /* Process Locked */
  283. __HAL_LOCK(hcec);
  284. /* Enter the transmit mode */
  285. hcec->State = HAL_CEC_STATE_BUSY_TX;
  286. hcec->ErrorCode = HAL_CEC_ERROR_NONE;
  287. /* Initialize the number of bytes to send,
  288. * 0 means only one header is sent (ping operation) */
  289. hcec->TxXferCount = Size;
  290. /* Send header block */
  291. temp = (uint8_t)((uint32_t)(hcec->Init.InitiatorAddress) << CEC_INITIATOR_LSB_POS) | DestinationAddress;
  292. hcec->Instance->TXD = temp;
  293. /* In case no data to be sent, sender is only pinging the system */
  294. if (Size != 0)
  295. {
  296. /* Set TX Start of Message (TXSOM) bit */
  297. hcec->Instance->CSR = CEC_FLAG_TSOM;
  298. }
  299. else
  300. {
  301. /* Send a ping command */
  302. hcec->Instance->CSR = CEC_FLAG_TEOM|CEC_FLAG_TSOM;
  303. }
  304. /* Polling TBTRF bit with timeout handling*/
  305. while (hcec->TxXferCount > 0)
  306. {
  307. /* Decreasing of the number of remaining data to receive */
  308. hcec->TxXferCount--;
  309. /* Timeout handling */
  310. tickstart = HAL_GetTick();
  311. /* Waiting for the next data transmission */
  312. while(HAL_IS_BIT_CLR(hcec->Instance->CSR, CEC_FLAG_TBTRF))
  313. {
  314. /* Timeout handling */
  315. if(Timeout != HAL_MAX_DELAY)
  316. {
  317. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  318. {
  319. hcec->State = HAL_CEC_STATE_READY;
  320. /* Process Unlocked */
  321. __HAL_UNLOCK(hcec);
  322. return HAL_TIMEOUT;
  323. }
  324. }
  325. /* Check if an error occured */
  326. if(HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_TERR) || HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_RERR))
  327. {
  328. /* Copy ESR for error handling purposes */
  329. hcec->ErrorCode = READ_BIT(hcec->Instance->ESR, CEC_ESR_ALL_ERROR);
  330. /* Acknowledgement of the error */
  331. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TERR);
  332. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RERR);
  333. hcec->State = HAL_CEC_STATE_READY;
  334. __HAL_UNLOCK(hcec);
  335. return HAL_ERROR;
  336. }
  337. }
  338. /* Write the next data to TX buffer */
  339. hcec->Instance->TXD = *pData++;
  340. /* If this is the last byte of the ongoing transmission */
  341. if (hcec->TxXferCount == 0)
  342. {
  343. /* Acknowledge byte request and signal end of message */
  344. MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, CEC_FLAG_TEOM);
  345. }
  346. else
  347. {
  348. /* Acknowledge byte request by writing 0x00 */
  349. MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, 0x00);
  350. }
  351. }
  352. /* Timeout handling */
  353. tickstart = HAL_GetTick();
  354. /* Wait for message transmission completion (TBTRF is set) */
  355. while (HAL_IS_BIT_CLR(hcec->Instance->CSR, CEC_FLAG_TBTRF))
  356. {
  357. /* Timeout handling */
  358. if(Timeout != HAL_MAX_DELAY)
  359. {
  360. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  361. {
  362. hcec->State = HAL_CEC_STATE_READY;
  363. __HAL_UNLOCK(hcec);
  364. return HAL_TIMEOUT;
  365. }
  366. }
  367. /* Check of error during transmission of the last byte */
  368. if(HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_TERR) || HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_RERR))
  369. {
  370. /* Copy ESR for error handling purposes */
  371. hcec->ErrorCode = READ_BIT(hcec->Instance->ESR, CEC_ESR_ALL_ERROR);
  372. /* Acknowledgement of the error */
  373. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TERR);
  374. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RERR);
  375. hcec->State = HAL_CEC_STATE_READY;
  376. __HAL_UNLOCK(hcec);
  377. return HAL_ERROR;
  378. }
  379. }
  380. /* Check of error after the last byte transmission */
  381. if(HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_TERR) || HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_RERR))
  382. {
  383. /* Copy ESR for error handling purposes */
  384. hcec->ErrorCode = READ_BIT(hcec->Instance->ESR, CEC_ESR_ALL_ERROR);
  385. /* Acknowledgement of the error */
  386. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TERR);
  387. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RERR);
  388. hcec->State = HAL_CEC_STATE_READY;
  389. __HAL_UNLOCK(hcec);
  390. return HAL_ERROR;
  391. }
  392. /* Acknowledge successful completion by writing 0x00 */
  393. MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, 0x00);
  394. hcec->State = HAL_CEC_STATE_READY;
  395. __HAL_UNLOCK(hcec);
  396. return HAL_OK;
  397. }
  398. else
  399. {
  400. return HAL_BUSY;
  401. }
  402. }
  403. /**
  404. * @brief Receive data in blocking mode.
  405. * @param hcec: CEC handle
  406. * @param pData: pointer to received data buffer.
  407. * @param Timeout: Timeout duration.
  408. * @note The received data size is not known beforehand, the latter is known
  409. * when the reception is complete and is stored in hcec->RxXferSize.
  410. * hcec->RxXferSize is the sum of opcodes + operands (0 to 14 operands max).
  411. * If only a header is received, hcec->RxXferSize = 0
  412. * @retval HAL status
  413. */
  414. HAL_StatusTypeDef HAL_CEC_Receive(CEC_HandleTypeDef *hcec, uint8_t *pData, uint32_t Timeout)
  415. {
  416. uint32_t temp = 0;
  417. uint32_t tickstart = 0;
  418. if(hcec->State == HAL_CEC_STATE_READY)
  419. {
  420. if(pData == NULL)
  421. {
  422. return HAL_ERROR;
  423. }
  424. /* When a ping is received, RxXferSize is 0*/
  425. /* When a message is received, RxXferSize contains the number of received bytes */
  426. hcec->RxXferSize = CEC_RXXFERSIZE_INITIALIZE;
  427. /* Process Locked */
  428. __HAL_LOCK(hcec);
  429. hcec->ErrorCode = HAL_CEC_ERROR_NONE;
  430. /* Continue the reception until the End Of Message is received (CEC_FLAG_REOM) */
  431. do
  432. {
  433. /* Timeout handling */
  434. tickstart = HAL_GetTick();
  435. /* Wait for next byte to be received */
  436. while (HAL_IS_BIT_CLR(hcec->Instance->CSR, CEC_FLAG_RBTF))
  437. {
  438. /* Timeout handling */
  439. if(Timeout != HAL_MAX_DELAY)
  440. {
  441. if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
  442. {
  443. hcec->State = HAL_CEC_STATE_READY;
  444. __HAL_UNLOCK(hcec);
  445. return HAL_TIMEOUT;
  446. }
  447. }
  448. /* Check if an error occured during the reception */
  449. if(HAL_IS_BIT_SET(hcec->Instance->CSR, CEC_FLAG_RERR))
  450. {
  451. /* Copy ESR for error handling purposes */
  452. hcec->ErrorCode = READ_BIT(hcec->Instance->ESR, CEC_ESR_ALL_ERROR);
  453. /* Acknowledgement of the error */
  454. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RERR);
  455. hcec->State = HAL_CEC_STATE_READY;
  456. __HAL_UNLOCK(hcec);
  457. return HAL_ERROR;
  458. }
  459. }
  460. /* Keep the value of CSR register as the register is cleared during reception process */
  461. temp = hcec->Instance->CSR;
  462. /* Read received data */
  463. *pData++ = hcec->Instance->RXD;
  464. /* Acknowledge received byte by writing 0x00 */
  465. CLEAR_BIT(hcec->Instance->CSR, CEC_FLAG_RECEIVE_MASK);
  466. /* Increment the number of received data */
  467. if(hcec->RxXferSize == CEC_RXXFERSIZE_INITIALIZE)
  468. {
  469. hcec->RxXferSize = 0;
  470. }
  471. else
  472. {
  473. hcec->RxXferSize++;
  474. }
  475. }while (HAL_IS_BIT_CLR(temp, CEC_FLAG_REOM));
  476. hcec->State = HAL_CEC_STATE_READY;
  477. __HAL_UNLOCK(hcec);
  478. if(IS_CEC_MSGSIZE(hcec->RxXferSize))
  479. {
  480. return HAL_OK;
  481. }
  482. else
  483. {
  484. return HAL_ERROR;
  485. }
  486. }
  487. else
  488. {
  489. return HAL_BUSY;
  490. }
  491. }
  492. /**
  493. * @brief Send data in interrupt mode
  494. * @param hcec: CEC handle
  495. * @param DestinationAddress: destination logical address
  496. * @param pData: pointer to input byte data buffer
  497. * @param Size: amount of data to be sent in bytes (without counting the header).
  498. * 0 means only the header is sent (ping operation).
  499. * Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
  500. * @retval HAL status
  501. */
  502. HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size)
  503. {
  504. uint8_t temp = 0;
  505. uint32_t tmp_state = 0;
  506. tmp_state = hcec->State;
  507. if(((tmp_state == HAL_CEC_STATE_READY) || (tmp_state == HAL_CEC_STATE_BUSY_RX))
  508. && (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) == RESET))
  509. {
  510. /* Basic check on pData pointer */
  511. if(((pData == NULL) && (Size > 0)) || (! IS_CEC_MSGSIZE(Size)))
  512. {
  513. return HAL_ERROR;
  514. }
  515. assert_param(IS_CEC_ADDRESS(DestinationAddress));
  516. /* Process Locked */
  517. __HAL_LOCK(hcec);
  518. hcec->pTxBuffPtr = pData;
  519. /* Check if a receive process is ongoing or not */
  520. if(hcec->State == HAL_CEC_STATE_BUSY_RX)
  521. {
  522. hcec->State = HAL_CEC_STATE_BUSY_TX_RX;
  523. /* Interrupt are not enabled here because they are already enabled in the Reception process */
  524. }
  525. else
  526. {
  527. hcec->State = HAL_CEC_STATE_BUSY_TX;
  528. /* Enable the CEC interrupt */
  529. __HAL_CEC_ENABLE_IT(hcec, CEC_IT_IE);
  530. }
  531. hcec->ErrorCode = HAL_CEC_ERROR_NONE;
  532. /* initialize the number of bytes to send,
  533. * 0 means only one header is sent (ping operation) */
  534. hcec->TxXferCount = Size;
  535. /* send header block */
  536. temp = (uint8_t)((uint32_t)(hcec->Init.InitiatorAddress) << CEC_INITIATOR_LSB_POS) | DestinationAddress;
  537. hcec->Instance->TXD = temp;
  538. /* Process Unlocked */
  539. __HAL_UNLOCK(hcec);
  540. /* case no data to be sent, sender is only pinging the system */
  541. if (Size != 0)
  542. {
  543. /* Set TX Start of Message (TXSOM) bit */
  544. MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, CEC_FLAG_TSOM);
  545. }
  546. else
  547. {
  548. /* Send a ping command */
  549. MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, CEC_FLAG_TEOM|CEC_FLAG_TSOM);
  550. }
  551. return HAL_OK;
  552. }
  553. else
  554. {
  555. return HAL_BUSY;
  556. }
  557. }
  558. /**
  559. * @brief Receive data in interrupt mode.
  560. * @param hcec: CEC handle
  561. * @param pData: pointer to received data buffer.
  562. * @note The received data size is not known beforehand, the latter is known
  563. * when the reception is complete and is stored in hcec->RxXferSize.
  564. * hcec->RxXferSize is the sum of opcodes + operands (0 to 14 operands max).
  565. * If only a header is received, hcec->RxXferSize = 0
  566. * @retval HAL status
  567. */
  568. HAL_StatusTypeDef HAL_CEC_Receive_IT(CEC_HandleTypeDef *hcec, uint8_t *pData)
  569. {
  570. uint32_t tmp_state = 0;
  571. tmp_state = hcec->State;
  572. if((tmp_state == HAL_CEC_STATE_READY) || (tmp_state == HAL_CEC_STATE_BUSY_TX))
  573. {
  574. if(pData == NULL)
  575. {
  576. return HAL_ERROR;
  577. }
  578. /* When a ping is received, RxXferSize is 0 */
  579. /* When a message is received, RxXferSize contains the number of received bytes */
  580. hcec->RxXferSize = CEC_RXXFERSIZE_INITIALIZE;
  581. /* Process Locked */
  582. __HAL_LOCK(hcec);
  583. hcec->pRxBuffPtr = pData;
  584. hcec->ErrorCode = HAL_CEC_ERROR_NONE;
  585. /* Process Unlocked */
  586. __HAL_UNLOCK(hcec);
  587. /* Check if a transmit process is ongoing or not */
  588. if(hcec->State == HAL_CEC_STATE_BUSY_TX)
  589. {
  590. hcec->State = HAL_CEC_STATE_BUSY_TX_RX;
  591. }
  592. else
  593. {
  594. hcec->State = HAL_CEC_STATE_BUSY_RX;
  595. /* Enable CEC interrupt */
  596. __HAL_CEC_ENABLE_IT(hcec, CEC_IT_IE);
  597. }
  598. return HAL_OK;
  599. }
  600. else
  601. {
  602. return HAL_BUSY;
  603. }
  604. }
  605. /**
  606. * @brief Get size of the received frame.
  607. * @param hcec: CEC handle
  608. * @retval Frame size
  609. */
  610. uint32_t HAL_CEC_GetReceivedFrameSize(CEC_HandleTypeDef *hcec)
  611. {
  612. return hcec->RxXferSize;
  613. }
  614. /**
  615. * @brief This function handles CEC interrupt requests.
  616. * @param hcec: CEC handle
  617. * @retval None
  618. */
  619. void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
  620. {
  621. /* Save error status register for further error handling purposes */
  622. hcec->ErrorCode = READ_BIT(hcec->Instance->ESR, CEC_ESR_ALL_ERROR);
  623. /* Transmit error */
  624. if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TERR) != RESET))
  625. {
  626. /* Acknowledgement of the error */
  627. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TERR);
  628. /* Check if a receive process is ongoing or not */
  629. if(hcec->State == HAL_CEC_STATE_BUSY_TX_RX)
  630. {
  631. /* Interrupts are not disabled due to reception still ongoing */
  632. hcec->State = HAL_CEC_STATE_BUSY_RX;
  633. }
  634. else
  635. {
  636. /* Disable the CEC Transmission Interrupts */
  637. __HAL_CEC_DISABLE_IT(hcec, CEC_IT_IE);
  638. hcec->State = HAL_CEC_STATE_READY;
  639. }
  640. }
  641. /* Receive error */
  642. if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RERR) != RESET))
  643. {
  644. /* Acknowledgement of the error */
  645. __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RERR);
  646. /* Check if a transmit process is ongoing or not */
  647. if(hcec->State == HAL_CEC_STATE_BUSY_TX_RX)
  648. {
  649. /* Interrupts are not disabled due to reception still ongoing */
  650. hcec->State = HAL_CEC_STATE_BUSY_TX;
  651. }
  652. else
  653. {
  654. /* Disable the CEC Transmission Interrupts */
  655. __HAL_CEC_DISABLE_IT(hcec, CEC_IT_IE);
  656. hcec->State = HAL_CEC_STATE_READY;
  657. }
  658. }
  659. if ((hcec->ErrorCode & CEC_ESR_ALL_ERROR) != 0)
  660. {
  661. HAL_CEC_ErrorCallback(hcec);
  662. }
  663. /* Transmit byte request or block transfer finished */
  664. if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_TBTRF) != RESET))
  665. {
  666. CEC_Transmit_IT(hcec);
  667. }
  668. /* Receive byte or block transfer finished */
  669. if((__HAL_CEC_GET_FLAG(hcec, CEC_FLAG_RBTF) != RESET))
  670. {
  671. CEC_Receive_IT(hcec);
  672. }
  673. }
  674. /**
  675. * @brief Tx Transfer completed callback
  676. * @param hcec: CEC handle
  677. * @retval None
  678. */
  679. __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
  680. {
  681. /* Prevent unused argument(s) compilation warning */
  682. UNUSED(hcec);
  683. /* NOTE : This function should not be modified, when the callback is needed,
  684. the HAL_CEC_TxCpltCallback can be implemented in the user file
  685. */
  686. }
  687. /**
  688. * @brief Rx Transfer completed callback
  689. * @param hcec: CEC handle
  690. * @retval None
  691. */
  692. __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec)
  693. {
  694. /* Prevent unused argument(s) compilation warning */
  695. UNUSED(hcec);
  696. /* NOTE : This function should not be modified, when the callback is needed,
  697. the HAL_CEC_RxCpltCallback can be implemented in the user file
  698. */
  699. }
  700. /**
  701. * @brief CEC error callbacks
  702. * @param hcec: CEC handle
  703. * @retval None
  704. */
  705. __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
  706. {
  707. /* Prevent unused argument(s) compilation warning */
  708. UNUSED(hcec);
  709. /* NOTE : This function should not be modified, when the callback is needed,
  710. the HAL_CEC_ErrorCallback can be implemented in the user file
  711. */
  712. }
  713. /**
  714. * @}
  715. */
  716. /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control functions
  717. * @brief CEC control functions
  718. *
  719. @verbatim
  720. ===============================================================================
  721. ##### Peripheral Control functions #####
  722. ===============================================================================
  723. [..]
  724. This subsection provides a set of functions allowing to control the CEC.
  725. (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral.
  726. (+) HAL_CEC_GetError() API can be helpful to get the error code of a failed transmission or reception.
  727. @endverbatim
  728. * @{
  729. */
  730. /**
  731. * @brief return the CEC state
  732. * @param hcec: CEC handle
  733. * @retval HAL state
  734. */
  735. HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
  736. {
  737. return hcec->State;
  738. }
  739. /**
  740. * @brief Return the CEC error code
  741. * @param hcec : pointer to a CEC_HandleTypeDef structure that contains
  742. * the configuration information for the specified CEC.
  743. * @retval CEC Error Code
  744. */
  745. uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
  746. {
  747. return hcec->ErrorCode;
  748. }
  749. /**
  750. * @}
  751. */
  752. /**
  753. * @}
  754. */
  755. /** @addtogroup CEC_Private_Functions
  756. * @{
  757. */
  758. /**
  759. * @brief Send data in interrupt mode
  760. * @param hcec: CEC handle.
  761. * Function called under interruption only, once
  762. * interruptions have been enabled by HAL_CEC_Transmit_IT()
  763. * @retval HAL status
  764. */
  765. static HAL_StatusTypeDef CEC_Transmit_IT(CEC_HandleTypeDef *hcec)
  766. {
  767. uint32_t tmp_state = 0;
  768. tmp_state = hcec->State;
  769. /* if the IP is already busy or if there is a previous transmission
  770. already pending due to arbitration loss */
  771. if(((tmp_state == HAL_CEC_STATE_BUSY_TX) || (tmp_state == HAL_CEC_STATE_BUSY_TX_RX))
  772. || (__HAL_CEC_GET_TRANSMISSION_START_FLAG(hcec) != RESET))
  773. {
  774. /* if all data have been sent */
  775. if(hcec->TxXferCount == 0)
  776. {
  777. /* Acknowledge successful completion by writing 0x00 */
  778. MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, 0x00);
  779. /* Check if a receive process is ongoing or not */
  780. if(hcec->State == HAL_CEC_STATE_BUSY_TX_RX)
  781. {
  782. /* Interrupts are not disabled due to reception still ongoing */
  783. hcec->State = HAL_CEC_STATE_BUSY_RX;
  784. }
  785. else
  786. {
  787. /* Disable the CEC Transmission Interrupts */
  788. __HAL_CEC_DISABLE_IT(hcec, CEC_IT_IE);
  789. hcec->State = HAL_CEC_STATE_READY;
  790. }
  791. HAL_CEC_TxCpltCallback(hcec);
  792. return HAL_OK;
  793. }
  794. else
  795. {
  796. /* Reduce the number of bytes to transfer by one */
  797. hcec->TxXferCount--;
  798. /* Write data to TX buffer*/
  799. hcec->Instance->TXD = *hcec->pTxBuffPtr++;
  800. /* If this is the last byte of the ongoing transmission */
  801. if (hcec->TxXferCount == 0)
  802. {
  803. /* Acknowledge byte request and signal end of message */
  804. MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, CEC_FLAG_TEOM);
  805. }
  806. else
  807. {
  808. /* Acknowledge byte request by writing 0x00 */
  809. MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_TRANSMIT_MASK, 0x00);
  810. }
  811. return HAL_OK;
  812. }
  813. }
  814. else
  815. {
  816. return HAL_BUSY;
  817. }
  818. }
  819. /**
  820. * @brief Receive data in interrupt mode.
  821. * @param hcec: CEC handle.
  822. * Function called under interruption only, once
  823. * interruptions have been enabled by HAL_CEC_Receive_IT()
  824. * @retval HAL status
  825. */
  826. static HAL_StatusTypeDef CEC_Receive_IT(CEC_HandleTypeDef *hcec)
  827. {
  828. static uint32_t temp;
  829. uint32_t tmp_state = 0;
  830. tmp_state = hcec->State;
  831. if((tmp_state == HAL_CEC_STATE_BUSY_RX) || (tmp_state == HAL_CEC_STATE_BUSY_TX_RX))
  832. {
  833. temp = hcec->Instance->CSR;
  834. /* Store received data */
  835. *hcec->pRxBuffPtr++ = hcec->Instance->RXD;
  836. /* Acknowledge received byte by writing 0x00 */
  837. MODIFY_REG(hcec->Instance->CSR, CEC_FLAG_RECEIVE_MASK, 0x00);
  838. /* Increment the number of received data */
  839. if(hcec->RxXferSize == CEC_RXXFERSIZE_INITIALIZE)
  840. {
  841. hcec->RxXferSize = 0;
  842. }
  843. else
  844. {
  845. hcec->RxXferSize++;
  846. }
  847. /* If the End Of Message is reached */
  848. if(HAL_IS_BIT_SET(temp, CEC_FLAG_REOM))
  849. {
  850. if(hcec->State == HAL_CEC_STATE_BUSY_TX_RX)
  851. {
  852. /* Interrupts are not disabled due to transmission still ongoing */
  853. hcec->State = HAL_CEC_STATE_BUSY_TX;
  854. }
  855. else
  856. {
  857. /* Disable the CEC Transmission Interrupts */
  858. __HAL_CEC_DISABLE_IT(hcec, CEC_IT_IE);
  859. hcec->State = HAL_CEC_STATE_READY;
  860. }
  861. HAL_CEC_RxCpltCallback(hcec);
  862. return HAL_OK;
  863. }
  864. else
  865. {
  866. return HAL_BUSY;
  867. }
  868. }
  869. else
  870. {
  871. return HAL_BUSY;
  872. }
  873. }
  874. /**
  875. * @}
  876. */
  877. /**
  878. * @}
  879. */
  880. #endif /* defined(STM32F100xB) || defined(STM32F100xE) */
  881. #endif /* HAL_CEC_MODULE_ENABLED */
  882. /**
  883. * @}
  884. */
  885. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/