stm32f1xx_hal_dma.c 23 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_dma.c
  4. * @author MCD Application Team
  5. * @version V1.0.4
  6. * @date 29-April-2016
  7. * @brief DMA HAL module driver.
  8. *
  9. * This file provides firmware functions to manage the following
  10. * functionalities of the Direct Memory Access (DMA) peripheral:
  11. * + Initialization and de-initialization functions
  12. * + IO operation functions
  13. * + Peripheral State and errors functions
  14. @verbatim
  15. ==============================================================================
  16. ##### How to use this driver #####
  17. ==============================================================================
  18. [..]
  19. (#) Enable and configure the peripheral to be connected to the DMA Channel
  20. (except for internal SRAM / FLASH memories: no initialization is
  21. necessary) please refer to Reference manual for connection between peripherals
  22. and DMA requests.
  23. (#) For a given Channel, program the required configuration through the following parameters:
  24. Transfer Direction, Source and Destination data formats,
  25. Circular or Normal mode, Channel Priority level, Source and Destination Increment mode,
  26. using HAL_DMA_Init() function.
  27. (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of error
  28. detection.
  29. (#) Use HAL_DMA_Abort() function to abort the current transfer
  30. -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
  31. *** Polling mode IO operation ***
  32. =================================
  33. [..]
  34. (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
  35. address and destination address and the Length of data to be transferred
  36. (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
  37. case a fixed Timeout can be configured by User depending from his application.
  38. *** Interrupt mode IO operation ***
  39. ===================================
  40. [..]
  41. (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
  42. (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
  43. (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
  44. Source address and destination address and the Length of data to be transferred.
  45. In this case the DMA interrupt is configured
  46. (+) Use HAL_DMAy_Channelx_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
  47. (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
  48. add his own function by customization of function pointer XferCpltCallback and
  49. XferErrorCallback (i.e a member of DMA handle structure).
  50. *** DMA HAL driver macros list ***
  51. =============================================
  52. [..]
  53. Below the list of most used macros in DMA HAL driver.
  54. (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
  55. (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
  56. (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
  57. (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
  58. (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
  59. (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
  60. (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt has occurred or not.
  61. [..]
  62. (@) You can refer to the DMA HAL driver header file for more useful macros
  63. @endverbatim
  64. ******************************************************************************
  65. * @attention
  66. *
  67. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  68. *
  69. * Redistribution and use in source and binary forms, with or without modification,
  70. * are permitted provided that the following conditions are met:
  71. * 1. Redistributions of source code must retain the above copyright notice,
  72. * this list of conditions and the following disclaimer.
  73. * 2. Redistributions in binary form must reproduce the above copyright notice,
  74. * this list of conditions and the following disclaimer in the documentation
  75. * and/or other materials provided with the distribution.
  76. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  77. * may be used to endorse or promote products derived from this software
  78. * without specific prior written permission.
  79. *
  80. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  81. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  82. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  83. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  84. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  85. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  86. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  87. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  88. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  89. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  90. *
  91. ******************************************************************************
  92. */
  93. /* Includes ------------------------------------------------------------------*/
  94. #include "stm32f1xx_hal.h"
  95. /** @addtogroup STM32F1xx_HAL_Driver
  96. * @{
  97. */
  98. /** @defgroup DMA DMA
  99. * @brief DMA HAL module driver
  100. * @{
  101. */
  102. #ifdef HAL_DMA_MODULE_ENABLED
  103. /* Private typedef -----------------------------------------------------------*/
  104. /* Private define ------------------------------------------------------------*/
  105. /** @defgroup DMA_Private_Constants DMA Private Constants
  106. * @{
  107. */
  108. #define HAL_TIMEOUT_DMA_ABORT ((uint32_t)1000) /* 1s */
  109. /**
  110. * @}
  111. */
  112. /* Private macro -------------------------------------------------------------*/
  113. /* Private variables ---------------------------------------------------------*/
  114. /* Private function prototypes -----------------------------------------------*/
  115. /** @defgroup DMA_Private_Functions DMA Private Functions
  116. * @{
  117. */
  118. static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
  119. /**
  120. * @}
  121. */
  122. /* Exported functions ---------------------------------------------------------*/
  123. /** @defgroup DMA_Exported_Functions DMA Exported Functions
  124. * @{
  125. */
  126. /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
  127. * @brief Initialization and de-initialization functions
  128. *
  129. @verbatim
  130. ===============================================================================
  131. ##### Initialization and de-initialization functions #####
  132. ===============================================================================
  133. [..]
  134. This section provides functions allowing to initialize the DMA Channel source
  135. and destination addresses, incrementation and data sizes, transfer direction,
  136. circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
  137. [..]
  138. The HAL_DMA_Init() function follows the DMA configuration procedures as described in
  139. reference manual.
  140. @endverbatim
  141. * @{
  142. */
  143. /**
  144. * @brief Initializes the DMA according to the specified
  145. * parameters in the DMA_InitTypeDef and create the associated handle.
  146. * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
  147. * the configuration information for the specified DMA Channel.
  148. * @retval HAL status
  149. */
  150. HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
  151. {
  152. uint32_t tmp = 0;
  153. /* Check the DMA handle allocation */
  154. if(hdma == NULL)
  155. {
  156. return HAL_ERROR;
  157. }
  158. /* Check the parameters */
  159. assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
  160. assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
  161. assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
  162. assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
  163. assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
  164. assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
  165. assert_param(IS_DMA_MODE(hdma->Init.Mode));
  166. assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
  167. if(hdma->State == HAL_DMA_STATE_RESET)
  168. {
  169. /* Allocate lock resource and initialize it */
  170. hdma->Lock = HAL_UNLOCKED;
  171. }
  172. /* Change DMA peripheral state */
  173. hdma->State = HAL_DMA_STATE_BUSY;
  174. /* Get the CR register value */
  175. tmp = hdma->Instance->CCR;
  176. /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */
  177. tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
  178. DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
  179. DMA_CCR_DIR));
  180. /* Prepare the DMA Channel configuration */
  181. tmp |= hdma->Init.Direction |
  182. hdma->Init.PeriphInc | hdma->Init.MemInc |
  183. hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
  184. hdma->Init.Mode | hdma->Init.Priority;
  185. /* Write to DMA Channel CR register */
  186. hdma->Instance->CCR = tmp;
  187. /* Initialise the error code */
  188. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  189. /* Initialize the DMA state*/
  190. hdma->State = HAL_DMA_STATE_READY;
  191. return HAL_OK;
  192. }
  193. /**
  194. * @brief DeInitializes the DMA peripheral
  195. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  196. * the configuration information for the specified DMA Channel.
  197. * @retval HAL status
  198. */
  199. HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
  200. {
  201. /* Check the DMA handle allocation */
  202. if(hdma == NULL)
  203. {
  204. return HAL_ERROR;
  205. }
  206. /* Check the parameters */
  207. assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
  208. /* Check the DMA peripheral state */
  209. if(hdma->State == HAL_DMA_STATE_BUSY)
  210. {
  211. return HAL_ERROR;
  212. }
  213. /* Disable the selected DMA Channelx */
  214. __HAL_DMA_DISABLE(hdma);
  215. /* Reset DMA Channel control register */
  216. hdma->Instance->CCR = 0;
  217. /* Reset DMA Channel Number of Data to Transfer register */
  218. hdma->Instance->CNDTR = 0;
  219. /* Reset DMA Channel peripheral address register */
  220. hdma->Instance->CPAR = 0;
  221. /* Reset DMA Channel memory address register */
  222. hdma->Instance->CMAR = 0;
  223. /* Clear all flags */
  224. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
  225. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
  226. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
  227. /* Initialize the error code */
  228. hdma->ErrorCode = HAL_DMA_ERROR_NONE;
  229. /* Initialize the DMA state */
  230. hdma->State = HAL_DMA_STATE_RESET;
  231. /* Release Lock */
  232. __HAL_UNLOCK(hdma);
  233. return HAL_OK;
  234. }
  235. /**
  236. * @}
  237. */
  238. /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
  239. * @brief I/O operation functions
  240. *
  241. @verbatim
  242. ===============================================================================
  243. ##### IO operation functions #####
  244. ===============================================================================
  245. [..] This section provides functions allowing to:
  246. (+) Configure the source, destination address and data length and Start DMA transfer
  247. (+) Configure the source, destination address and data length and
  248. Start DMA transfer with interrupt
  249. (+) Abort DMA transfer
  250. (+) Poll for transfer complete
  251. (+) Handle DMA interrupt request
  252. @endverbatim
  253. * @{
  254. */
  255. /**
  256. * @brief Starts the DMA Transfer.
  257. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
  258. * the configuration information for the specified DMA Channel.
  259. * @param SrcAddress: The source memory Buffer address
  260. * @param DstAddress: The destination memory Buffer address
  261. * @param DataLength: The length of data to be transferred from source to destination
  262. * @retval HAL status
  263. */
  264. HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  265. {
  266. /* Process locked */
  267. __HAL_LOCK(hdma);
  268. /* Change DMA peripheral state */
  269. hdma->State = HAL_DMA_STATE_BUSY;
  270. /* Check the parameters */
  271. assert_param(IS_DMA_BUFFER_SIZE(DataLength));
  272. /* Disable the peripheral */
  273. __HAL_DMA_DISABLE(hdma);
  274. /* Configure the source, destination address and the data length */
  275. DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
  276. /* Enable the Peripheral */
  277. __HAL_DMA_ENABLE(hdma);
  278. return HAL_OK;
  279. }
  280. /**
  281. * @brief Start the DMA Transfer with interrupt enabled.
  282. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  283. * the configuration information for the specified DMA Channel.
  284. * @param SrcAddress: The source memory Buffer address
  285. * @param DstAddress: The destination memory Buffer address
  286. * @param DataLength: The length of data to be transferred from source to destination
  287. * @retval HAL status
  288. */
  289. HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  290. {
  291. /* Process locked */
  292. __HAL_LOCK(hdma);
  293. /* Change DMA peripheral state */
  294. hdma->State = HAL_DMA_STATE_BUSY;
  295. /* Check the parameters */
  296. assert_param(IS_DMA_BUFFER_SIZE(DataLength));
  297. /* Disable the peripheral */
  298. __HAL_DMA_DISABLE(hdma);
  299. /* Configure the source, destination address and the data length */
  300. DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
  301. /* Enable the transfer complete interrupt */
  302. __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC);
  303. /* Enable the Half transfer complete interrupt */
  304. __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT);
  305. /* Enable the transfer Error interrupt */
  306. __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE);
  307. /* Enable the Peripheral */
  308. __HAL_DMA_ENABLE(hdma);
  309. return HAL_OK;
  310. }
  311. /**
  312. * @brief Aborts the DMA Transfer.
  313. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
  314. * the configuration information for the specified DMA Channel.
  315. *
  316. * @note After disabling a DMA Channel, a check for wait until the DMA Channel is
  317. * effectively disabled is added. If a Channel is disabled
  318. * while a data transfer is ongoing, the current data will be transferred
  319. * and the Channel will be effectively disabled only after the transfer of
  320. * this single data is finished.
  321. * @retval HAL status
  322. */
  323. HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
  324. {
  325. uint32_t tickstart = 0x00;
  326. /* Disable the channel */
  327. __HAL_DMA_DISABLE(hdma);
  328. /* Get tick */
  329. tickstart = HAL_GetTick();
  330. /* Check if the DMA Channel is effectively disabled */
  331. while((hdma->Instance->CCR & DMA_CCR_EN) != 0)
  332. {
  333. /* Check for the Timeout */
  334. if((HAL_GetTick() - tickstart) > HAL_TIMEOUT_DMA_ABORT)
  335. {
  336. /* Update error code */
  337. SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT);
  338. /* Change the DMA state */
  339. hdma->State = HAL_DMA_STATE_TIMEOUT;
  340. /* Process Unlocked */
  341. __HAL_UNLOCK(hdma);
  342. return HAL_TIMEOUT;
  343. }
  344. }
  345. /* Change the DMA state */
  346. hdma->State = HAL_DMA_STATE_READY;
  347. /* Process Unlocked */
  348. __HAL_UNLOCK(hdma);
  349. return HAL_OK;
  350. }
  351. /**
  352. * @brief Polling for transfer complete.
  353. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  354. * the configuration information for the specified DMA Channel.
  355. * @param CompleteLevel: Specifies the DMA level complete.
  356. * @param Timeout: Timeout duration.
  357. * @retval HAL status
  358. */
  359. HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout)
  360. {
  361. uint32_t temp;
  362. uint32_t tickstart = 0x00;
  363. /* Get the level transfer complete flag */
  364. if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
  365. {
  366. /* Transfer Complete flag */
  367. temp = __HAL_DMA_GET_TC_FLAG_INDEX(hdma);
  368. }
  369. else
  370. {
  371. /* Half Transfer Complete flag */
  372. temp = __HAL_DMA_GET_HT_FLAG_INDEX(hdma);
  373. }
  374. /* Get tick */
  375. tickstart = HAL_GetTick();
  376. while(__HAL_DMA_GET_FLAG(hdma, temp) == RESET)
  377. {
  378. if((__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET))
  379. {
  380. /* Clear the transfer error flags */
  381. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
  382. /* Update error code */
  383. SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE);
  384. /* Change the DMA state */
  385. hdma->State= HAL_DMA_STATE_ERROR;
  386. /* Process Unlocked */
  387. __HAL_UNLOCK(hdma);
  388. return HAL_ERROR;
  389. }
  390. /* Check for the Timeout */
  391. if(Timeout != HAL_MAX_DELAY)
  392. {
  393. if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout))
  394. {
  395. /* Update error code */
  396. SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TIMEOUT);
  397. /* Change the DMA state */
  398. hdma->State = HAL_DMA_STATE_TIMEOUT;
  399. /* Process Unlocked */
  400. __HAL_UNLOCK(hdma);
  401. return HAL_TIMEOUT;
  402. }
  403. }
  404. }
  405. if(CompleteLevel == HAL_DMA_FULL_TRANSFER)
  406. {
  407. /* Clear the transfer complete flag */
  408. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
  409. /* The selected Channelx EN bit is cleared (DMA is disabled and
  410. all transfers are complete) */
  411. hdma->State = HAL_DMA_STATE_READY;
  412. }
  413. else
  414. {
  415. /* Clear the half transfer complete flag */
  416. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
  417. /* The selected Channelx EN bit is cleared (DMA is disabled and
  418. all transfers of half buffer are complete) */
  419. hdma->State = HAL_DMA_STATE_READY_HALF;
  420. }
  421. /* Process unlocked */
  422. __HAL_UNLOCK(hdma);
  423. return HAL_OK;
  424. }
  425. /**
  426. * @brief Handles DMA interrupt request.
  427. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  428. * the configuration information for the specified DMA Channel.
  429. * @retval None
  430. */
  431. void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
  432. {
  433. /* Transfer Error Interrupt management ***************************************/
  434. if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)) != RESET)
  435. {
  436. if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
  437. {
  438. /* Disable the transfer error interrupt */
  439. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE);
  440. /* Clear the transfer error flag */
  441. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
  442. /* Update error code */
  443. SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_TE);
  444. /* Change the DMA state */
  445. hdma->State = HAL_DMA_STATE_ERROR;
  446. /* Process Unlocked */
  447. __HAL_UNLOCK(hdma);
  448. if (hdma->XferErrorCallback != NULL)
  449. {
  450. /* Transfer error callback */
  451. hdma->XferErrorCallback(hdma);
  452. }
  453. }
  454. }
  455. /* Half Transfer Complete Interrupt management ******************************/
  456. if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)) != RESET)
  457. {
  458. if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
  459. {
  460. /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
  461. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
  462. {
  463. /* Disable the half transfer interrupt */
  464. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
  465. }
  466. /* Clear the half transfer complete flag */
  467. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
  468. /* Change DMA peripheral state */
  469. hdma->State = HAL_DMA_STATE_READY_HALF;
  470. if(hdma->XferHalfCpltCallback != NULL)
  471. {
  472. /* Half transfer callback */
  473. hdma->XferHalfCpltCallback(hdma);
  474. }
  475. }
  476. }
  477. /* Transfer Complete Interrupt management ***********************************/
  478. if(__HAL_DMA_GET_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)) != RESET)
  479. {
  480. if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
  481. {
  482. if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0)
  483. {
  484. /* Disable the transfer complete interrupt */
  485. __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TC);
  486. }
  487. /* Clear the transfer complete flag */
  488. __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
  489. /* Update error code */
  490. SET_BIT(hdma->ErrorCode, HAL_DMA_ERROR_NONE);
  491. /* Change the DMA state */
  492. hdma->State = HAL_DMA_STATE_READY;
  493. /* Process Unlocked */
  494. __HAL_UNLOCK(hdma);
  495. if(hdma->XferCpltCallback != NULL)
  496. {
  497. /* Transfer complete callback */
  498. hdma->XferCpltCallback(hdma);
  499. }
  500. }
  501. }
  502. }
  503. /**
  504. * @}
  505. */
  506. /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions
  507. * @brief Peripheral State functions
  508. *
  509. @verbatim
  510. ===============================================================================
  511. ##### State and Errors functions #####
  512. ===============================================================================
  513. [..]
  514. This subsection provides functions allowing to
  515. (+) Check the DMA state
  516. (+) Get error code
  517. @endverbatim
  518. * @{
  519. */
  520. /**
  521. * @brief Returns the DMA state.
  522. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  523. * the configuration information for the specified DMA Channel.
  524. * @retval HAL state
  525. */
  526. HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
  527. {
  528. return hdma->State;
  529. }
  530. /**
  531. * @brief Return the DMA error code
  532. * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
  533. * the configuration information for the specified DMA Channel.
  534. * @retval DMA Error Code
  535. */
  536. uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
  537. {
  538. return hdma->ErrorCode;
  539. }
  540. /**
  541. * @}
  542. */
  543. /**
  544. * @}
  545. */
  546. /** @addtogroup DMA_Private_Functions DMA Private Functions
  547. * @{
  548. */
  549. /**
  550. * @brief Sets the DMA Transfer parameter.
  551. * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
  552. * the configuration information for the specified DMA Channel.
  553. * @param SrcAddress: The source memory Buffer address
  554. * @param DstAddress: The destination memory Buffer address
  555. * @param DataLength: The length of data to be transferred from source to destination
  556. * @retval HAL status
  557. */
  558. static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
  559. {
  560. /* Configure DMA Channel data length */
  561. hdma->Instance->CNDTR = DataLength;
  562. /* Peripheral to Memory */
  563. if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
  564. {
  565. /* Configure DMA Channel destination address */
  566. hdma->Instance->CPAR = DstAddress;
  567. /* Configure DMA Channel source address */
  568. hdma->Instance->CMAR = SrcAddress;
  569. }
  570. /* Memory to Peripheral */
  571. else
  572. {
  573. /* Configure DMA Channel source address */
  574. hdma->Instance->CPAR = SrcAddress;
  575. /* Configure DMA Channel destination address */
  576. hdma->Instance->CMAR = DstAddress;
  577. }
  578. }
  579. /**
  580. * @}
  581. */
  582. #endif /* HAL_DMA_MODULE_ENABLED */
  583. /**
  584. * @}
  585. */
  586. /**
  587. * @}
  588. */
  589. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/