|
@@ -6,7 +6,7 @@
|
|
|
*/
|
|
|
|
|
|
#include "tmag5273.h"
|
|
|
-#include "i2c_analog.h"
|
|
|
+#include <ti/driverlib/dl_i2c.h>
|
|
|
#include "ti_msp_dl_config.h"
|
|
|
|
|
|
#define TMAG5273A1_ADDRESS 0x35
|
|
@@ -43,29 +43,148 @@
|
|
|
|
|
|
TMAG5273_OUT Tmag5273_out;
|
|
|
|
|
|
-void TMAG5273_WriteReg(UBYTE RAddr, UBYTE WData)
|
|
|
+enum I2cControllerStatus {
|
|
|
+ I2C_STATUS_IDLE = 0,
|
|
|
+ I2C_STATUS_TX_STARTED,
|
|
|
+ I2C_STATUS_TX_INPROGRESS,
|
|
|
+ I2C_STATUS_TX_COMPLETE,
|
|
|
+ I2C_STATUS_RX_STARTED,
|
|
|
+ I2C_STATUS_RX_INPROGRESS,
|
|
|
+ I2C_STATUS_RX_COMPLETE,
|
|
|
+ I2C_STATUS_ERROR,
|
|
|
+} gI2cControllerStatus;
|
|
|
+
|
|
|
+void I2C_0_INST_IRQHandler(void)
|
|
|
{
|
|
|
- I2C_Start();
|
|
|
- I2C_SendByte(TMAG5273A1_ADDRESS << 1); // Device Addr + Write (operation)
|
|
|
- I2C_SendByte(RAddr);
|
|
|
- I2C_SendByte(WData);
|
|
|
- I2C_Stop();
|
|
|
+ switch (DL_I2C_getPendingInterrupt(I2C_0_INST)) {
|
|
|
+ case DL_I2C_IIDX_CONTROLLER_RX_DONE:
|
|
|
+ gI2cControllerStatus = I2C_STATUS_RX_COMPLETE;
|
|
|
+ break;
|
|
|
+ case DL_I2C_IIDX_CONTROLLER_TX_DONE:
|
|
|
+ gI2cControllerStatus = I2C_STATUS_TX_COMPLETE;
|
|
|
+ break;
|
|
|
+ case DL_I2C_IIDX_CONTROLLER_RXFIFO_TRIGGER:
|
|
|
+ /* Not used for this example */
|
|
|
+ case DL_I2C_IIDX_CONTROLLER_TXFIFO_TRIGGER:
|
|
|
+ /* Not used for this example */
|
|
|
+ break;
|
|
|
+ case DL_I2C_IIDX_CONTROLLER_ARBITRATION_LOST:
|
|
|
+ case DL_I2C_IIDX_CONTROLLER_NACK:
|
|
|
+ if ((gI2cControllerStatus == I2C_STATUS_RX_STARTED) ||
|
|
|
+ (gI2cControllerStatus == I2C_STATUS_TX_STARTED)) {
|
|
|
+ /* NACK interrupt if I2C Target is disconnected */
|
|
|
+ gI2cControllerStatus = I2C_STATUS_ERROR;
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ case DL_I2C_IIDX_CONTROLLER_RXFIFO_FULL:
|
|
|
+ /* Not used for this example */
|
|
|
+ case DL_I2C_IIDX_CONTROLLER_TXFIFO_EMPTY:
|
|
|
+ /* Not used for this example */
|
|
|
+ case DL_I2C_IIDX_CONTROLLER_START:
|
|
|
+ /* Not used for this example */
|
|
|
+ case DL_I2C_IIDX_CONTROLLER_STOP:
|
|
|
+ /* Not used for this example */
|
|
|
+ break;
|
|
|
+ case DL_I2C_IIDX_CONTROLLER_EVENT1_DMA_DONE:
|
|
|
+ /* I2C DMA Done on TX */
|
|
|
+ /* Do nothing here */
|
|
|
+ break;
|
|
|
+ case DL_I2C_IIDX_CONTROLLER_EVENT2_DMA_DONE:
|
|
|
+ /* I2C DMA Done on RX */
|
|
|
+ /* Do nothing here */
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ break;
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+ULONG gTxLen, gRxLen, gRxCount;
|
|
|
+UBYTE gTxPacket[128];
|
|
|
+UBYTE gRxPacket[128];
|
|
|
+
|
|
|
+void TMAG5273_WriteReg(UBYTE regaddr, UBYTE num, UBYTE *regdata)
|
|
|
+{
|
|
|
+ UWORD i;
|
|
|
+
|
|
|
+ gI2cControllerStatus = I2C_STATUS_IDLE;
|
|
|
+ gTxLen = num + 1;
|
|
|
+
|
|
|
+ gTxPacket[0] = regaddr;
|
|
|
+ for(i=1; i<=num; i++)
|
|
|
+ {
|
|
|
+ gTxPacket[i] = (UBYTE)regdata[i-1];
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Fill the FIFO using DMA */
|
|
|
+ DL_DMA_setSrcAddr(DMA, DMA_CH0_CHAN_ID, (ULONG)(&gTxPacket[0]));
|
|
|
+ DL_DMA_setDestAddr(DMA, DMA_CH0_CHAN_ID, (ULONG)(&I2C_0_INST->MASTER.MTXDATA));
|
|
|
+ DL_DMA_setTransferSize(DMA, DMA_CH0_CHAN_ID, gTxLen);
|
|
|
+ DL_DMA_enableChannel(DMA, DMA_CH0_CHAN_ID);
|
|
|
+
|
|
|
+ gI2cControllerStatus = I2C_STATUS_TX_STARTED;
|
|
|
+ while (!(
|
|
|
+ DL_I2C_getControllerStatus(I2C_0_INST) & DL_I2C_CONTROLLER_STATUS_IDLE))
|
|
|
+ ;
|
|
|
+ DL_I2C_startControllerTransfer(I2C_0_INST, TMAG5273A1_ADDRESS, DL_I2C_CONTROLLER_DIRECTION_TX, gTxLen);
|
|
|
+
|
|
|
+ while ((gI2cControllerStatus != I2C_STATUS_TX_COMPLETE) && (gI2cControllerStatus != I2C_STATUS_ERROR))
|
|
|
+ {
|
|
|
+ __WFE();
|
|
|
+ }
|
|
|
+
|
|
|
+ while (DL_I2C_getControllerStatus(I2C_0_INST) & DL_I2C_CONTROLLER_STATUS_BUSY_BUS);
|
|
|
+
|
|
|
+ while (!(DL_I2C_getControllerStatus(I2C_0_INST) & DL_I2C_CONTROLLER_STATUS_IDLE));
|
|
|
+ delay_cycles(1000);
|
|
|
}
|
|
|
|
|
|
-void TMAG5273_ReadData(UBYTE RAddr, UBYTE Num, UBYTE *RData)
|
|
|
+void TMAG5273_ReadData(UBYTE regaddr, UBYTE num, UBYTE* Read)
|
|
|
{
|
|
|
- UBYTE i;
|
|
|
- I2C_Start();
|
|
|
- I2C_SendByte(TMAG5273A1_ADDRESS << 1); // Device Addr + Write (operation)
|
|
|
- I2C_SendByte(RAddr);
|
|
|
- I2C_Start();
|
|
|
- I2C_SendByte((TMAG5273A1_ADDRESS << 1) + 1); // Device Addr + Write (operation)
|
|
|
- for(i = 0; i < Num; i++)
|
|
|
+ UBYTE data[2], i;
|
|
|
+ data[0] = regaddr;
|
|
|
+
|
|
|
+ /* Fill the FIFO using DMA */
|
|
|
+ DL_DMA_setSrcAddr(DMA, DMA_CH0_CHAN_ID, (ULONG)(&data[0]));
|
|
|
+ DL_DMA_setDestAddr(DMA, DMA_CH0_CHAN_ID, (ULONG)(&I2C_0_INST->MASTER.MTXDATA));
|
|
|
+ DL_DMA_setTransferSize(DMA, DMA_CH0_CHAN_ID, 1);
|
|
|
+ DL_DMA_enableChannel(DMA, DMA_CH0_CHAN_ID);
|
|
|
+
|
|
|
+ gI2cControllerStatus = I2C_STATUS_TX_STARTED;
|
|
|
+ while (!(
|
|
|
+ DL_I2C_getControllerStatus(I2C_0_INST) & DL_I2C_CONTROLLER_STATUS_IDLE))
|
|
|
+ ;
|
|
|
+ DL_I2C_startControllerTransfer(I2C_0_INST, TMAG5273A1_ADDRESS, DL_I2C_CONTROLLER_DIRECTION_TX, 1);
|
|
|
+
|
|
|
+ while ((gI2cControllerStatus != I2C_STATUS_TX_COMPLETE) && (gI2cControllerStatus != I2C_STATUS_ERROR))
|
|
|
{
|
|
|
- *(RData + i) = I2C_RecvByte();
|
|
|
+ __WFE();
|
|
|
}
|
|
|
|
|
|
- I2C_Stop();
|
|
|
+ while (DL_I2C_getControllerStatus(I2C_0_INST) & DL_I2C_CONTROLLER_STATUS_BUSY_BUS);
|
|
|
+
|
|
|
+ while (!(DL_I2C_getControllerStatus(I2C_0_INST) & DL_I2C_CONTROLLER_STATUS_IDLE));
|
|
|
+
|
|
|
+ gRxLen = num;
|
|
|
+ gRxCount = 0;
|
|
|
+ gI2cControllerStatus = I2C_STATUS_RX_STARTED;
|
|
|
+
|
|
|
+ DL_DMA_setSrcAddr(DMA, DMA_CH1_CHAN_ID, (ULONG)(&I2C_0_INST->MASTER.MRXDATA));
|
|
|
+ DL_DMA_setDestAddr(DMA, DMA_CH1_CHAN_ID, (uint32_t)(&gRxPacket[0]));
|
|
|
+ DL_DMA_setTransferSize(DMA, DMA_CH1_CHAN_ID, gRxLen);
|
|
|
+ DL_DMA_enableChannel(DMA, DMA_CH1_CHAN_ID);
|
|
|
+
|
|
|
+ DL_I2C_startControllerTransfer(I2C_0_INST, TMAG5273A1_ADDRESS, DL_I2C_CONTROLLER_DIRECTION_RX, gRxLen);
|
|
|
+
|
|
|
+ while (gI2cControllerStatus != I2C_STATUS_RX_COMPLETE)
|
|
|
+ {
|
|
|
+ __WFE();
|
|
|
+ }
|
|
|
+ while (DL_I2C_getControllerStatus(I2C_0_INST) & DL_I2C_CONTROLLER_STATUS_BUSY_BUS);
|
|
|
+
|
|
|
+ for(i=0; i<num; i++)
|
|
|
+ {
|
|
|
+ Read[i] = gRxPacket[i];
|
|
|
+ }
|
|
|
}
|
|
|
|
|
|
UBYTE tmag5273_GetDevID(void)
|
|
@@ -89,21 +208,20 @@ UWORD tmag5273_GetMANUFACTURER_ID(void)
|
|
|
|
|
|
SBYTE tmag5273_Init(void)
|
|
|
{
|
|
|
- UBYTE tmp;
|
|
|
-
|
|
|
- I2C_Init();
|
|
|
- tmp = 0x00;
|
|
|
- TMAG5273_WriteReg(DEVICE_CONFIG_1, tmp);
|
|
|
- tmp = 0x02;
|
|
|
- TMAG5273_WriteReg(DEVICE_CONFIG_2, tmp);
|
|
|
- tmp = 0x7C;
|
|
|
- TMAG5273_WriteReg(SENSOR_CONFIG_1, tmp);
|
|
|
- tmp = 0x14; //Ax < Ay
|
|
|
- TMAG5273_WriteReg(SENSOR_CONFIG_2, tmp);
|
|
|
- tmp = 196; //Ax = 20.623mT, Ay = 26.873mT, Ax / Ay * 256
|
|
|
- TMAG5273_WriteReg(MAG_GAIN_CONFIG, tmp);
|
|
|
- tmp = 0x01;
|
|
|
- TMAG5273_WriteReg(T_CONFIG, tmp);
|
|
|
+ UBYTE tmp[2];
|
|
|
+
|
|
|
+ tmp[0] = 0x00;
|
|
|
+ TMAG5273_WriteReg(DEVICE_CONFIG_1, 1, tmp);
|
|
|
+ tmp[0] = 0x02;
|
|
|
+ TMAG5273_WriteReg(DEVICE_CONFIG_2, 1, tmp);
|
|
|
+ tmp[0] = 0x7C;
|
|
|
+ TMAG5273_WriteReg(SENSOR_CONFIG_1, 1, tmp);
|
|
|
+ tmp[0] = 0x14; //Ax < Ay
|
|
|
+ TMAG5273_WriteReg(SENSOR_CONFIG_2, 1, tmp);
|
|
|
+ tmp[0] = 196; //Ax = 20.623mT, Ay = 26.873mT, Ax / Ay * 256
|
|
|
+ TMAG5273_WriteReg(MAG_GAIN_CONFIG, 1, tmp);
|
|
|
+ tmp[0] = 0x01;
|
|
|
+ TMAG5273_WriteReg(T_CONFIG, 1, tmp);
|
|
|
|
|
|
return 0;
|
|
|
}
|