hwsetup.c 45 KB

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  1. /************************************************************************
  2. Project: Welling Motor Control Paltform
  3. Filename: hwsetup.c
  4. Partner Filename: hwsetup.h
  5. Description: Hardware setup
  6. Complier: IAR Embedded Workbench for ARM 7.80.4
  7. CPU TYPE : STM32F30x
  8. *************************************************************************
  9. Copyright (c) 2018 Welling Motor Technology(Shanghai) Co. Ltd.
  10. All rights reserved.
  11. *************************************************************************
  12. *************************************************************************
  13. Revising History (ECL of this file):
  14. ************************************************************************/
  15. /************************************************************************
  16. Beginning of File, do not put anything above here except notes
  17. Compiler Directives:
  18. *************************************************************************/
  19. #ifndef _HWSETUP_C_
  20. #define _HWSETUP_C_
  21. #endif
  22. /************************************************************************
  23. Included File
  24. *************************************************************************/
  25. #include "syspar.h"
  26. #include "user.h"
  27. #include "FuncLayerAPI.h"
  28. //#include "at32f421_wk_config.h"
  29. //#include "at32f421_misc.h"
  30. #include "ti_msp_dl_config.h"
  31. /************************************************************************
  32. Constant Table (N/A)
  33. *************************************************************************/
  34. //#define UART_HMI_BAUD_RATE (1200)
  35. #define UART_HMI_IBRD_36_MHZ_1200_BAUD (1875)
  36. #define UART_HMI_FBRD_36_MHZ_1200_BAUD (0)
  37. /*************************************************************************
  38. Exported Functions:
  39. *************************************************************************/
  40. /*************************************************************************
  41. Function: hw_voHardwareSetup;
  42. Description: Hardware Setup function.
  43. Call by: main();
  44. Input Variables: All HW registers
  45. Output/Return Variables: All HW registers
  46. Subroutine Call: ...;
  47. Reference: N/A
  48. *************************************************************************/
  49. void hw_voHardwareSetup1(void)
  50. {
  51. // Initialize System Control registers, WatchDog to a know state
  52. hw_voInitSysCtrl();
  53. // Select GPIO for the device or for the specific application:
  54. // wk_gpio_config();//
  55. hw_voInitGPIO();
  56. }
  57. void hw_voHardwareSetup2(void)
  58. {
  59. // Initialize all the Device Peripherals to a known state:外设配置
  60. hw_voInitPeri();
  61. // Initialize interrupt priority of peripherals: 中断优先级
  62. hw_voInitInt();
  63. }
  64. /*************************************************************************
  65. Local Functions (N/A)
  66. *************************************************************************/
  67. /*************************************************************************
  68. Function: hw_voInitPWM;
  69. Description: MTU Setup function.
  70. Call by: main();
  71. Input Variables: MTU HW registers
  72. Output/Return Variables: MTU HW registers
  73. Subroutine Call: ...;
  74. Reference: N/A
  75. *************************************************************************/
  76. void hw_voInitPeri(void)
  77. {
  78. // Initialize DMA
  79. hw_voInitDMA();
  80. // Initialize ADC
  81. hw_voInitADC();
  82. // Initialize Timer1
  83. hw_voInitTim1();
  84. /* init cmp function. */
  85. // wk_cmp_init();
  86. /* init tmr3 function. */
  87. // wk_tmr3_init();
  88. /* init tmr6 function. */
  89. // wk_tmr6_init();
  90. /* init tmr16 function. */
  91. // wk_tmr16_init();
  92. /* init tmr17 function. */
  93. // wk_tmr17_init();
  94. // Initialize SysTick
  95. hw_voInitSysTick();
  96. /* init usart1 function. */
  97. hw_voInitUART1();
  98. /* init exint function. */
  99. #if(EMCDEAL_EN==0)
  100. // wk_exint_config();
  101. #endif
  102. #if (UART_ID == 3)
  103. DL_UART_Main_setBaudRateDivisor(UART_HMI_INST, UART_HMI_IBRD_36_MHZ_1200_BAUD, UART_HMI_FBRD_36_MHZ_1200_BAUD);
  104. #endif
  105. }
  106. /*************************************************************************
  107. Function:
  108. Description:
  109. Call by:
  110. Input Variables:
  111. Output/Return Variables:
  112. Subroutine Call:
  113. Reference:
  114. *************************************************************************/
  115. void hw_voInitSysCtrl(void)
  116. {
  117. //system clock config program
  118. // wk_system_clock_config();
  119. //config periph clock
  120. // wk_periph_clock_config();
  121. /* config systick clock source */
  122. // systick_clock_source_config(SYSTICK_CLOCK_SOURCE_AHBCLK_DIV8);
  123. }
  124. /*************************************************************************
  125. Function:
  126. Description:
  127. Call by:
  128. Input Variables:
  129. Output/Return Variables:
  130. Subroutine Call:
  131. Reference:
  132. *************************************************************************/
  133. void hw_voInitGPIO(void)
  134. {
  135. // gpio_init_type gpio_init_struct;
  136. //
  137. //
  138. // gpio_default_para_init(&gpio_init_struct);
  139. //
  140. // /* add user code begin tmr1_init 1 */
  141. //
  142. // /* add user code end tmr1_init 1 */
  143. //
  144. // /* configure the tmr1 CH1 pin */
  145. // gpio_init_struct.gpio_pins = PWM_AH_PIN;
  146. // gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
  147. // gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
  148. // gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
  149. // gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
  150. // gpio_init(PWM_AH_GPIO_PORT, &gpio_init_struct);
  151. //
  152. // gpio_pin_mux_config(PWM_AH_GPIO_PORT, GPIO_PINS_SOURCE8, GPIO_MUX_2);
  153. //
  154. // /* configure the tmr1 CH1C pin */
  155. // gpio_init_struct.gpio_pins = PWM_AL_PIN;
  156. // gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
  157. // gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
  158. // gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
  159. // gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
  160. // gpio_init(PWM_AL_GPIO_PORT, &gpio_init_struct);
  161. //
  162. // gpio_pin_mux_config(PWM_AL_GPIO_PORT, GPIO_PINS_SOURCE13, GPIO_MUX_2);
  163. //
  164. // /* configure the tmr1 CH2 pin */
  165. // gpio_init_struct.gpio_pins = PWM_BH_PIN;
  166. // gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
  167. // gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
  168. // gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
  169. // gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
  170. // gpio_init(PWM_BH_GPIO_PORT, &gpio_init_struct);
  171. //
  172. // gpio_pin_mux_config(PWM_BH_GPIO_PORT, GPIO_PINS_SOURCE9, GPIO_MUX_2);
  173. //
  174. // /* configure the tmr1 CH2C pin */
  175. // gpio_init_struct.gpio_pins = PWM_BL_PIN;
  176. // gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
  177. // gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
  178. // gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
  179. // gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
  180. // gpio_init(PWM_BL_GPIO_PORT, &gpio_init_struct);
  181. //
  182. // gpio_pin_mux_config(PWM_BL_GPIO_PORT, GPIO_PINS_SOURCE14, GPIO_MUX_2);
  183. //
  184. // /* configure the tmr1 CH3 pin */
  185. // gpio_init_struct.gpio_pins = PWM_CH_PIN;
  186. // gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
  187. // gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
  188. // gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
  189. // gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
  190. // gpio_init(PWM_CH_GPIO_PORT, &gpio_init_struct);
  191. //
  192. // gpio_pin_mux_config(PWM_CH_GPIO_PORT, GPIO_PINS_SOURCE10, GPIO_MUX_2);
  193. //
  194. // /* configure the tmr1 CH3C pin */
  195. // gpio_init_struct.gpio_pins = PWM_CL_PIN;
  196. // gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
  197. // gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
  198. // gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
  199. // gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
  200. // gpio_init(PWM_CL_GPIO_PORT, &gpio_init_struct);
  201. //
  202. // gpio_pin_mux_config(PWM_CL_GPIO_PORT, GPIO_PINS_SOURCE15, GPIO_MUX_2);
  203. //
  204. // /* configure the tmr1 CH4 pin */
  205. // gpio_init_struct.gpio_pins = GPIO_PINS_11;
  206. // gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
  207. // gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
  208. // gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
  209. // gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_MODERATE;
  210. // gpio_init(GPIOA, &gpio_init_struct);
  211. // gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE11, GPIO_MUX_2);
  212. }
  213. /*************************************************************************
  214. Function:
  215. Description:
  216. Call by:
  217. Input Variables:
  218. Output/Return Variables:
  219. Subroutine Call:
  220. Reference:
  221. *************************************************************************/
  222. void hw_voInitDMA(void)
  223. {
  224. // /*=======================================================================
  225. // DMA1 Ch5 for Timer1
  226. // =======================================================================*/
  227. // // DMA_InitTypeDef DMA_InitStructure;
  228. //
  229. //// DMA_DeInit(DMA1_Channel5);
  230. //// DMA_InitStructure.DMA_PeripheralBaseAddr = (ULONG)(&TIM1->DMAR); //澶栬鍦板潃
  231. //// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
  232. //// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; //涓嶆墽琛屽璁惧湴鍧�澧為噺鎿嶄綔
  233. //// DMA_InitStructure.DMA_MemoryBaseAddr = (ULONG)hw_uwPWMCmpr;//(pwm_stGenOut.uwNewTIM1COMPR); // 鍐呭瓨鍦板潃
  234. //// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
  235. //// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; //鎵ц瀛樺偍鍣ㄥ湴鍧�澧為噺鎿嶄綔
  236. //// DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;//浠庡瓨鍌ㄥ櫒鍒板璁�
  237. //// DMA_InitStructure.DMA_BufferSize = TIM1_DMA_NUM; //6閫氶亾
  238. //// DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; //鎵ц寰幆鎿嶄綔
  239. //// DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; //浼樺厛绾ф渶楂�
  240. //// DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; //
  241. //// DMA_Init(DMA1_Channel5, &DMA_InitStructure);
  242. //// /* Enable DMA1 Channel 5 */
  243. //// //DMA_Cmd(DMA1_Channel5, ENABLE);
  244. //
  245. // wk_dma1_channel5_init();
  246. // wk_dma_channel_config(DMA1_CHANNEL5,(uint32_t)&TMR1->dmadt, (uint32_t)hw_uwPWMCmpr, TIM1_DMA_NUM);
  247. //
  248. // /*=======================================================================
  249. // DMA1 Ch1 for ADC1
  250. // =======================================================================*/
  251. //// DMA_DeInit(DMA1_Channel1);
  252. ////
  253. //// DMA_InitStructure.DMA_PeripheralBaseAddr = (ULONG)(&ADC1->DR);
  254. //// DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
  255. //// DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
  256. //// DMA_InitStructure.DMA_MemoryBaseAddr = (ULONG)(hw_uwADC1);
  257. //// DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
  258. //// DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
  259. //// DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
  260. //// DMA_InitStructure.DMA_BufferSize = ADC1_DMA_NUM;
  261. //// DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
  262. //// DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
  263. //// DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
  264. //// DMA_Init(DMA1_Channel1, &DMA_InitStructure);
  265. //// /* Enable DMA1 Channel1 */
  266. //// DMA_Cmd(DMA1_Channel1, ENABLE);
  267. //wk_dma1_channel1_init();
  268. //wk_dma_channel_config(DMA1_CHANNEL1, (uint32_t)&ADC1->odt, (uint32_t)(hw_uwADC1), ADC1_DMA_NUM);
  269. //dma_channel_enable(DMA1_CHANNEL1, TRUE);
  270. /*=======================================================================
  271. DMA1 Ch3 for UART3 receive
  272. =======================================================================*/
  273. /*=======================================================================
  274. DMA1 Ch2 for UART3 transmission
  275. =======================================================================*/
  276. // DMA_Cmd(DMA1_Channel2, ENABLE);
  277. }
  278. /*************************************************************************
  279. Function:
  280. Description:
  281. Call by:
  282. Input Variables:
  283. Output/Return Variables:
  284. Subroutine Call:
  285. Reference:
  286. *************************************************************************/
  287. void hw_voInitADC(void)
  288. {
  289. // wk_adc1_init();
  290. }
  291. void hw_SetIphaseSample(void)
  292. {
  293. // ADC1->psq_bit.pclen =3-1; //adc_preempt_channel_length_set(ADC1, 3);
  294. //
  295. // ADC1->psq_bit.psn2 = ADC_CHANNEL_0; //閲囨牱閫氶亾1
  296. // ADC1->psq_bit.psn3 = ADC_CHANNEL_1; //閲囨牱閫氶亾2
  297. // ADC1->psq_bit.psn4 = ADC_CHANNEL_3; //閲囨牱閫氶亾3
  298. // adc_preempt_channel_length_set(ADC1, 3);
  299. // adc_preempt_channel_set(ADC1, ADC_CHANNEL_0, 1, ADC_SAMPLETIME_1_5);
  300. // adc_preempt_offset_value_set(ADC1, ADC_PREEMPT_CHANNEL_1, 0x0);
  301. // adc_preempt_channel_set(ADC1, ADC_CHANNEL_1, 2, ADC_SAMPLETIME_1_5);
  302. // adc_preempt_offset_value_set(ADC1, ADC_PREEMPT_CHANNEL_2, 0x0);
  303. // adc_preempt_channel_set(ADC1, ADC_CHANNEL_3, 3, ADC_SAMPLETIME_1_5);
  304. // adc_preempt_offset_value_set(ADC1, ADC_PREEMPT_CHANNEL_3, 0x0);
  305. }
  306. //void hw_SetRdsonSample(adc_channel_select_type adc_channel)
  307. //{
  308. // ADC1->psq_bit.pclen =2-1;//adc_preempt_channel_length_set(ADC1, 2);
  309. //
  310. // ADC1->psq_bit.psn3 = adc_channel; //閲囨牱閫氶亾1
  311. // ADC1->psq_bit.psn4 = ADC_CHANNEL_6; //閲囨牱閫氶亾2 姣嶇嚎鐢垫祦鍊�
  312. //
  313. // adc_preempt_channel_length_set(ADC1, 3);
  314. // adc_preempt_channel_set(ADC1, ADC_CHANNEL_6, 1, ADC_SAMPLETIME_1_5);
  315. // adc_preempt_offset_value_set(ADC1, ADC_PREEMPT_CHANNEL_1, 0x0);
  316. // adc_preempt_channel_set(ADC1, ADC_CHANNEL_0, 2, ADC_SAMPLETIME_1_5);
  317. // adc_preempt_offset_value_set(ADC1, ADC_PREEMPT_CHANNEL_2, 0x0);
  318. // adc_preempt_channel_set(ADC1, ADC_CHANNEL_1, 3, ADC_SAMPLETIME_1_5);
  319. // adc_preempt_offset_value_set(ADC1, ADC_PREEMPT_CHANNEL_3, 0x0);
  320. //}
  321. /*************************************************************************
  322. Function:
  323. Description:OBC
  324. Call by:
  325. Input Variables:
  326. Output/Return Variables:
  327. Subroutine Call:
  328. Reference:
  329. *************************************************************************/
  330. void hw_voInitUART1()
  331. {
  332. // gpio_init_type gpio_init_struct;
  333. //
  334. // /* enable the usart1 and gpio clock */
  335. // crm_periph_clock_enable(CRM_USART1_PERIPH_CLOCK, TRUE);
  336. // crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
  337. //
  338. // gpio_default_para_init(&gpio_init_struct);
  339. //
  340. // /* configure the usart2 tx/rx pin */
  341. // gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
  342. // gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
  343. // gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
  344. // gpio_init_struct.gpio_pins = GPIO_PINS_6 | GPIO_PINS_7;
  345. // gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
  346. // gpio_init(GPIOB, &gpio_init_struct);
  347. //
  348. // /* config usart1 iomux */
  349. // gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE6, GPIO_MUX_0);
  350. // gpio_pin_mux_config(GPIOB, GPIO_PINS_SOURCE7, GPIO_MUX_0);
  351. //
  352. //// nvic_irq_enable(USART1_IRQn, 3, 3);
  353. //
  354. // /* configure usart1 param */
  355. // usart_init(USART1, 9600, USART_DATA_8BITS, USART_STOP_1_BIT);
  356. // usart_transmitter_enable(USART1, TRUE);
  357. // usart_receiver_enable(USART1, TRUE);
  358. //// usart_interrupt_enable(USART1, USART_RDBF_INT, TRUE);
  359. //// usart_interrupt_enable(USART1, USART_TDBE_INT, TRUE);
  360. // usart_enable(USART1, TRUE);
  361. }
  362. /*************************************************************************
  363. Function:
  364. Description:BMS
  365. Call by:
  366. Input Variables:
  367. Output/Return Variables:
  368. Subroutine Call:
  369. Reference:
  370. *************************************************************************/
  371. void hw_voInitUART2()
  372. {
  373. // gpio_init_type gpio_init_struct;
  374. //
  375. // /* enable the usart1 and gpio clock */
  376. // crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
  377. // crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
  378. //
  379. // gpio_default_para_init(&gpio_init_struct);
  380. //
  381. // gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE14, GPIO_MUX_1);
  382. // gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE15, GPIO_MUX_1);
  383. //
  384. // /* configure the usart2 tx/rx pin */
  385. // gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
  386. // gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
  387. // gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
  388. // gpio_init_struct.gpio_pins = GPIO_PINS_14 | GPIO_PINS_15;
  389. // gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
  390. // gpio_init(GPIOA, &gpio_init_struct);
  391. //
  392. // /* config usart1 iomux */
  393. //// gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE14, GPIO_MUX_1);
  394. //// gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE15, GPIO_MUX_1);
  395. //
  396. //// nvic_irq_enable(USART2_IRQn, 3, 3);
  397. //
  398. // /* configure usart1 param */
  399. // usart_init(USART2, 9600, USART_DATA_8BITS, USART_STOP_1_BIT);
  400. // usart_transmitter_enable(USART2, TRUE);
  401. // usart_receiver_enable(USART2, TRUE);
  402. //// usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE);
  403. //// usart_interrupt_enable(USART2, USART_TDBE_INT, TRUE);
  404. // usart_enable(USART2, TRUE);
  405. }
  406. /*************************************************************************
  407. Function:
  408. Description:
  409. Call by:
  410. Input Variables:
  411. Output/Return Variables:
  412. Subroutine Call:
  413. Reference:
  414. *************************************************************************/
  415. void hw_voInitTim1(void)
  416. {
  417. // tmr_output_config_type tmr_output_struct;
  418. // tmr_brkdt_config_type tmr_brkdt_struct;
  419. //
  420. //// TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
  421. //// TIM_OCInitTypeDef TIM_OCInitStructure;
  422. //// TIM_BDTRInitTypeDef TIM_BDTRInitStructure;
  423. ////
  424. //// TIM_DeInit(TIM1);
  425. ////
  426. //// /* Time Base configuration */
  427. //// TIM_TimeBaseStructure.TIM_Prescaler = 0; // TIMx->PSC 鍒嗛
  428. //// TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_CenterAligned3; // TIMx->CR1 bit5~6鍚戜笂鍚戜笅鍧囪璁剧疆
  429. //// TIM_TimeBaseStructure.TIM_Period = HW_HPWM_PERIOD; //鑷姩閲嶈杞藉瘎瀛樺櫒 TIMx->ARR
  430. //// TIM_TimeBaseStructure.TIM_ClockDivision = 0; //TIMx->CR1 bit8~9 鏃堕挓鍒嗛鍥犲瓙
  431. //// TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;// TIMx->RCR 閲嶅璁℃暟瀵勫瓨鍣�
  432. //// TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
  433. ////------------
  434. // /* configure counter settings */
  435. // tmr_base_init(TMR1, 2249, 0);
  436. // tmr_cnt_dir_set(TMR1, TMR_COUNT_TWO_WAY_3);
  437. // tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
  438. // tmr_repetition_counter_set(TMR1, 0);
  439. // // tmr_period_buffer_enable(TMR1, TRUE); //鑷姩閲嶈杞介瑁呰浇鍏佽
  440. //
  441. //
  442. //
  443. ////--------
  444. //
  445. // // TIM1->EGR = 0x0001;//event generation Register,Bit0:UG=1
  446. //
  447. // /* Channel 1, 2,3 Configuration in PWM mode */
  448. //// TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2; //TIMx->CCMR1 bit 4~6 pwm2妯″紡锛�
  449. //// TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Disable;//TIMx->CCER bit0 鍏抽棴锛� OC1绂佹杈撳嚭
  450. //// TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Disable;// TIMx->CCER bit2 TIMx->CCER 鍏抽棴锛� OC1N绂佹杈撳嚭
  451. //// TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;//TIMx->CCER bit1 OC1楂樼數骞虫湁鏁�
  452. //// TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High; //TIMx->CCER bit4 OC1N楂樼數骞虫湁鏁堬紱
  453. //// TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Reset;//TIMx->CR2 bit8 OC1杈撳嚭绌洪棽鐘舵��
  454. //// TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset;//TIMx->CR2 bit9 杈撳嚭绌洪棽鐘舵��
  455. ////
  456. //// TIM_OCInitStructure.TIM_Pulse = HW_HHPWM_PERIOD; //TIMx_CCR1,OC1棰勮杞藉��
  457. //// TIM_OC1Init(TIM1, &TIM_OCInitStructure);
  458. ////
  459. //// TIM_OCInitStructure.TIM_Pulse = HW_HHPWM_PERIOD;//TIMx_CCR2,OC2棰勮杞藉��
  460. //// TIM_OC2Init(TIM1, &TIM_OCInitStructure);
  461. ////
  462. //// TIM_OCInitStructure.TIM_Pulse = HW_HHPWM_PERIOD;//TIMx_CCR3,OC3棰勮杞藉��
  463. //// TIM_OC3Init(TIM1, &TIM_OCInitStructure);
  464. ////
  465. //// /* CH4 configuration as ADC trigger signal */
  466. //// if(cp_stFlg.CurrentSampleModelSelect == SINGLERESISITANCE)
  467. //// {
  468. //// TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
  469. //// TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
  470. //// TIM_OCInitStructure.TIM_Pulse = HW_HPWM_PERIOD - 5;
  471. //// TIM_OC4Init(TIM1, &TIM_OCInitStructure);
  472. //// }
  473. //// else if(cp_stFlg.CurrentSampleModelSelect == RDSON)
  474. //// {
  475. //// TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
  476. //// TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
  477. //// TIM_OCInitStructure.TIM_Pulse = 1;
  478. //// TIM_OC4Init(TIM1, &TIM_OCInitStructure);
  479. //// }
  480. //// else if(cp_stFlg.CurrentSampleModelSelect == COMBINATION)
  481. //// {
  482. //// TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
  483. //// TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
  484. //// TIM_OCInitStructure.TIM_Pulse = 200;
  485. //// TIM_OC4Init(TIM1, &TIM_OCInitStructure);
  486. //// }
  487. //// else if(cp_stFlg.CurrentSampleModelSelect == DOUBLERESISTANCE)
  488. //// {
  489. //// TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; //TIMx->CCER bit12 杈撳嚭浣胯兘
  490. //// TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; //TIMx->CCER 楂樻湁鏁�
  491. //// TIM_OCInitStructure.TIM_Pulse = 1; //TIMx_CCR4 CC4 姣旇緝鍊硷紝1锛屽湪娉㈣胺澶勯噰闆嗙浉鐢垫祦
  492. //// TIM_OC4Init(TIM1, &TIM_OCInitStructure);
  493. //// }
  494. //// else
  495. //// {}
  496. // //-----------------------
  497. // /* configure channel 1 output settings */
  498. // tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
  499. // tmr_output_struct.oc_output_state = FALSE;
  500. // tmr_output_struct.occ_output_state = FALSE;
  501. // tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
  502. // tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
  503. // tmr_output_struct.oc_idle_state = FALSE;
  504. // tmr_output_struct.occ_idle_state = FALSE;
  505. // tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_1, &tmr_output_struct);
  506. // tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_1, HW_HHPWM_PERIOD); //OC1棰勮杞藉��
  507. // tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
  508. //
  509. // tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_1, FALSE);
  510. //
  511. // /* configure channel 2 output settings */
  512. // tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
  513. // tmr_output_struct.oc_output_state = FALSE;
  514. // tmr_output_struct.occ_output_state = FALSE;
  515. // tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
  516. // tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
  517. // tmr_output_struct.oc_idle_state = FALSE;
  518. // tmr_output_struct.occ_idle_state = FALSE;
  519. // tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_2, &tmr_output_struct);
  520. // tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_2, HW_HHPWM_PERIOD);//OC1棰勮杞藉��
  521. // tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_2, FALSE);
  522. //
  523. // tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_2, FALSE);
  524. //
  525. // /* configure channel 3 output settings */
  526. // tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
  527. // tmr_output_struct.oc_output_state = FALSE;
  528. // tmr_output_struct.occ_output_state = FALSE;
  529. // tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
  530. // tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
  531. // tmr_output_struct.oc_idle_state = FALSE;
  532. // tmr_output_struct.occ_idle_state = FALSE;
  533. // tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
  534. // tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_3, HW_HHPWM_PERIOD);//OC1棰勮杞藉��
  535. // tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_3, FALSE);
  536. //
  537. // tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_3, FALSE);
  538. //
  539. // /* configure channel 4 output settings */
  540. // tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
  541. // tmr_output_struct.oc_output_state = FALSE;
  542. // tmr_output_struct.occ_output_state = FALSE;
  543. // tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
  544. // tmr_output_struct.occ_polarity = TMR_OUTPUT_ACTIVE_HIGH;
  545. // tmr_output_struct.oc_idle_state = FALSE;
  546. // tmr_output_struct.occ_idle_state = FALSE;
  547. // tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_4, &tmr_output_struct);
  548. // tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_4, 108);
  549. // tmr_output_channel_buffer_enable(TMR1, TMR_SELECT_CHANNEL_4, FALSE); //杈撳嚭姣旇緝1棰勮杞藉け鑳�
  550. //
  551. // tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_4, FALSE);
  552. //
  553. //
  554. // //-------------------------
  555. // //TIMx->BDTR 鍒硅溅鍜屾鍖哄瘎瀛樺櫒
  556. //// TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable; // bit11 杩愯妯″紡涓嬪綋瀹氭椂鍣ㄤ笉宸ヤ綔鏃讹紝涓�鏃CxE=1鎴朇CxNE=1锛岄鍏堝紑鍚疧C/OCN骞惰緭鍑烘棤鏁堢數骞筹紝鐒跺悗
  557. //// //缃甇C/OCN浣胯兘杈撳嚭淇″彿=1銆�
  558. //// TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable; //bit101 绌洪棽妯″紡涓嬪綋瀹氭椂鍣ㄤ笉宸ヤ綔鏃讹紝涓�鏃CxE=1鎴朇CxNE=1锛� OC/OCN棣栧厛杈撳嚭鍏剁┖闂茬數骞筹紝鐒跺悗
  559. //// // OC/OCN浣胯兘杈撳嚭淇″彿=1銆�
  560. //// TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_2; //閿佸畾绾у埆2
  561. //// TIM_BDTRInitStructure.TIM_DeadTime = cp_stControlPara.swIPMDeadTimeNs / 100 * TIM1CLK_KHZ / 1000 / 10;//bot0~7 姝诲尯浜嬮棿1us
  562. //// TIM_BDTRInitStructure.TIM_Break = TIM_Break_Enable; //bit12 寮�鍚埞杞﹁緭鍏�
  563. //// TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_Low;//bit13 鍒硅溅杈撳叆浣庣數骞虫湁鏁�
  564. //// TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;//bit14 鑷姩杈撳嚭浣胯兘 MOE鍙兘琚蒋浠剁疆鈥�1鈥�
  565. //// TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure);
  566. ////--------------------
  567. // /* configure break and dead-time settings */
  568. // tmr_brkdt_struct.brk_enable = TRUE;//TRUE;//FALSE;//TRUE;
  569. // tmr_brkdt_struct.auto_output_enable = FALSE;
  570. //#if(HARDWAREV30==1)
  571. // tmr_brkdt_struct.brk_polarity =TMR_BRK_INPUT_ACTIVE_HIGH;// TMR_BRK_INPUT_ACTIVE_HIGH;
  572. //#else
  573. // tmr_brkdt_struct.brk_polarity = TMR_BRK_INPUT_ACTIVE_HIGH;//TMR_BRK_INPUT_ACTIVE_LOW;// TMR_BRK_INPUT_ACTIVE_HIGH;
  574. //#endif
  575. // tmr_brkdt_struct.fcsoen_state = TRUE;
  576. // tmr_brkdt_struct.fcsodis_state = TRUE;
  577. // tmr_brkdt_struct.wp_level = TMR_WP_LEVEL_2;
  578. // tmr_brkdt_struct.deadtime = 72;
  579. // tmr_brkdt_config(TMR1, &tmr_brkdt_struct);
  580. // //-------------------
  581. //// TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Disable);// TIMx->CCMR1 bit3 杈撳嚭姣旇緝1棰勮杞戒娇鑳斤紝闅忔椂鍐欏叆TIMx_CCR1瀵勫瓨鍣紝骞朵笖鏂板啓鍏ョ殑鏁板�肩珛鍗宠捣浣滅敤
  582. //// TIM_OC2PreloadConfig(TIM1, TIM_OCPreload_Disable);//TIMx->CCMR1 bit11
  583. //// TIM_OC3PreloadConfig(TIM1, TIM_OCPreload_Disable);//TIMx->CCMR2 bit3
  584. //// TIM_OC4PreloadConfig(TIM1, TIM_OCPreload_Disable); //TIMx->CCMR2 bit113 Disables the TIM1 peripheral Preload register on CCR4
  585. //// TIM_ARRPreloadConfig(TIM1, ENABLE); //TIMx->CR1 bit7 鑷姩閲嶈杞介瑁呰浇鍏佽浣� Enables TIMx peripheral Preload register on ARR
  586. ////
  587. ////
  588. //// TIM_DMAConfig(TIM1, TIM_DMABase_CCR1, TIM_DMABurstLength_3Transfers);// TIMx->DCR bit0~4 bit8~12 杩炵画浼犻��3涓�氶亾锛孌MA鍩哄湴鍧�TIMx_CR1
  589. ////
  590. ////
  591. //// TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable); //TIMx->SMCR bit7 MSM:1; Master Slave Mode
  592. //// TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update); //TIMx->CR2 bit4~6 涓绘ā寮忛�夋嫨锛屾洿鏂颁簨浠惰閫変负瑙﹀彂杈撳叆(TRGO)
  593. ////
  594. //// /*Main Output ENABLE*/
  595. //// TIM_CtrlPWMOutputs(TIM1, ENABLE); //TIMx->BDTR bit15 MOE 涓昏緭鍑轰娇鑳�
  596. // //------------------
  597. // //tmr_counter_enable(TMR1,TRUE);
  598. // tmr_period_buffer_enable(TMR1, TRUE); //鑷姩閲嶈杞介瑁呰浇鍏佽
  599. // TMR1->dmactrl = 0x0200|TMR_C1DT_ADDRESS; ////DMA1浼犺緭娆℃暟3 锛孴MR_C1DT_ADDRESS
  600. //
  601. //
  602. // /* configure primary mode settings */
  603. // tmr_sub_sync_mode_set(TMR1, TRUE); //娆″畾鏃跺櫒鍚屾
  604. // tmr_primary_mode_select(TMR1, TMR_PRIMARY_SEL_OVERFLOW);//涓诲畾鏃跺櫒杈撳嚭淇″彿閫夋嫨:婧㈠嚭浜嬩欢
  605. //
  606. // tmr_output_enable(TMR1,TRUE);//OEN 涓昏緭鍑轰娇鑳�
  607. //----------------
  608. //
  609. // wk_tmr1_init();
  610. }
  611. /*************************************************************************
  612. Function:
  613. Description:
  614. Call by:
  615. Input Variables:
  616. Output/Return Variables:
  617. Subroutine Call:
  618. Reference:
  619. *************************************************************************/
  620. //void hw_voInitTim2(void)
  621. //{
  622. //
  623. // TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
  624. // TIM_ICInitTypeDef TIM_ICInitStructure;
  625. // TIM_DeInit(TIM2);
  626. //
  627. // /* TIM4 capture of sensor of frequency */
  628. // TIM_TimeBaseStructure.TIM_Prescaler = 0;
  629. // TIM_TimeBaseStructure.TIM_ClockDivision = 0;
  630. // TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
  631. //// TIM_TimeBaseStructure.TIM_Period = FTBC_HZ * 4 / FTBS_HZ - 1;
  632. // TIM_TimeBaseStructure.TIM_Period =TIM2CLK_KHZ * 1000 / FTBS_HZ - 1;
  633. // TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
  634. // TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
  635. //
  636. //// /* Slaves (TIM2) Configuration */
  637. //// TIM_SelectSlaveMode(TIM2, TIM_SlaveMode_External1);
  638. //// /* Selects the Input Trigger source */
  639. //// TIM_SelectInputTrigger(TIM2, TIM_TS_ITR0); // IRT0锟斤拷TIM1
  640. //
  641. // TIM_ARRPreloadConfig(TIM2, ENABLE); // Enables TIMx peripheral Preload register on ARR
  642. // //TIM_SelectMasterSlaveMode(TIM2, TIM_MasterSlaveMode_Enable); // MSM:1; Master Slave Mode
  643. //
  644. // TIM_ICInitStructure.TIM_Channel = TIM_Channel_3;
  645. // TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
  646. // TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;
  647. // TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;
  648. // TIM_ICInitStructure.TIM_ICFilter = 0;
  649. // TIM_ICInit(TIM2, &TIM_ICInitStructure);
  650. //
  651. // TIM_ICInitStructure.TIM_Channel = TIM_Channel_4;
  652. // TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
  653. // TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;
  654. // TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;
  655. // TIM_ICInitStructure.TIM_ICFilter = 0;
  656. // TIM_ICInit(TIM2, &TIM_ICInitStructure);
  657. //}
  658. /*************************************************************************
  659. Function:
  660. Description:
  661. Call by:
  662. Input Variables:
  663. Output/Return Variables:
  664. Subroutine Call:
  665. Reference:
  666. *************************************************************************/
  667. //void hw_voInitTim3(void)
  668. //{
  669. //
  670. // TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
  671. // TIM_ICInitTypeDef TIM_ICInitStructure;
  672. //
  673. // TIM_DeInit(TIM3);
  674. //
  675. // /* TIM3 capture of sensor of frequency */
  676. // TIM_TimeBaseStructure.TIM_Prescaler = 19; // TIMx_PSC, Counter clock frequency = fCK_PSC/(PSC[15:0]+1)
  677. // TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
  678. // TIM_TimeBaseStructure.TIM_Period = 60000; //[15:0] Maximum count value 65535
  679. // TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
  680. // TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
  681. // TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);
  682. //
  683. // /* Hall IC Signal */
  684. // TIM_ICInitStructure.TIM_Channel = TIM_Channel_1;
  685. // TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
  686. // TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;
  687. // TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;
  688. // TIM_ICInitStructure.TIM_ICFilter = 0x0;
  689. // TIM_ICInit(TIM3, &TIM_ICInitStructure);
  690. //
  691. // TIM_ICInitStructure.TIM_Channel = TIM_Channel_2;
  692. // TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
  693. // TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;
  694. // TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;
  695. // TIM_ICInitStructure.TIM_ICFilter = 0x0;
  696. // TIM_ICInit(TIM3, &TIM_ICInitStructure);
  697. //
  698. // TIM_ICInitStructure.TIM_Channel = TIM_Channel_3;
  699. // TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
  700. // TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;
  701. // TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;
  702. // TIM_ICInitStructure.TIM_ICFilter = 0x0;
  703. // TIM_ICInit(TIM3, &TIM_ICInitStructure);
  704. //
  705. // TIM_ARRPreloadConfig(TIM3, ENABLE); // Enables TIMx peripheral Preload register on ARR
  706. //
  707. //}
  708. /*************************************************************************
  709. Function:
  710. Description:
  711. Call by:
  712. Input Variables:
  713. Output/Return Variables:
  714. Subroutine Call:
  715. Reference:
  716. *************************************************************************/
  717. //void hw_voInitTim4(void)
  718. //{
  719. // TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
  720. // TIM_DeInit(TIM4);
  721. //
  722. // TIM_TimeBaseStructure.TIM_Prescaler = 0;
  723. // TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
  724. // TIM_TimeBaseStructure.TIM_Period = APB2CLK_KHZ * 1000 / FPWM_HZ * 2; //HW_PWM_PERIOD * 2;
  725. // TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
  726. // TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
  727. // TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
  728. //
  729. // TIM_ARRPreloadConfig(TIM4, ENABLE); // Enables TIMx peripheral Preload register on ARR
  730. //}
  731. /*************************************************************************
  732. Function:
  733. Description:
  734. Call by:
  735. Input Variables:
  736. Output/Return Variables:
  737. Subroutine Call:
  738. Reference:
  739. *************************************************************************/
  740. /*************************************************************************
  741. Function:
  742. Description:
  743. Call by:
  744. Input Variables:
  745. Output/Return Variables:
  746. Subroutine Call:
  747. Reference:
  748. *************************************************************************/
  749. void hw_voInitSysTick(void)
  750. {
  751. /* Setup systick timer interrupts */
  752. //SysTick_Config(SystemCoreClock / FSYSTICK_HZ);
  753. // systick_interrupt_config(system_core_clock / 8 / 1000);
  754. }
  755. /*************************************************************************
  756. Function:
  757. Description:
  758. Call by:
  759. Input Variables:
  760. Output/Return Variables:
  761. Subroutine Call:
  762. Reference: 浼樺厛绾�
  763. *************************************************************************/
  764. void hw_voInitInt(void)
  765. {
  766. // NVIC_InitTypeDef NVIC_InitStructure;
  767. //
  768. // NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
  769. //
  770. // /* Enable the ADC1,2 Interrupt */
  771. // NVIC_InitStructure.NVIC_IRQChannel = ADC1_2_IRQn;
  772. // NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  773. // NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
  774. // NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  775. // NVIC_Init(&NVIC_InitStructure);
  776. //
  777. // /* Enable the TIM1 Interrupt PWM Interrupt*/
  778. // NVIC_InitStructure.NVIC_IRQChannel = TIM1_UP_IRQn;
  779. // NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
  780. // NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  781. // NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  782. // NVIC_Init(&NVIC_InitStructure);
  783. //
  784. //
  785. // /* Enable TIM2 Interrupt TIM2 CAP*/
  786. // NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
  787. // NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
  788. // NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
  789. // NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  790. // NVIC_Init(&NVIC_InitStructure);
  791. //
  792. // /* Enable TIM3 Interrupt, TIM3 HALL CAP*/
  793. // NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn;
  794. // NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
  795. // NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  796. // NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  797. // NVIC_Init(&NVIC_InitStructure);
  798. // wk_nvic_config();
  799. }
  800. /*************************************************************************
  801. Function:
  802. Description:
  803. Call by:
  804. Input Variables:
  805. Output/Return Variables:
  806. Subroutine Call:
  807. Reference:涓柇寮�鍚�
  808. *************************************************************************/
  809. void hw_voEnInt(void)
  810. {
  811. // /* ADC group conversion Interrupts enable */
  812. // if(cp_stFlg.CurrentSampleModelSelect== SINGLERESISITANCE)
  813. // {
  814. // ADC_ITConfig(ADC2, ADC_IT_JEOC, ENABLE);
  815. // }
  816. // else if((cp_stFlg.CurrentSampleModelSelect == DOUBLERESISTANCE) || (cp_stFlg.CurrentSampleModelSelect== RDSON))
  817. // {
  818. // ADC_ITConfig(ADC1, ADC_IT_JEOC, ENABLE);
  819. // }
  820. // else if(cp_stFlg.CurrentSampleModelSelect== COMBINATION)
  821. // {
  822. // ADC_ITConfig(ADC1, ADC_IT_JEOC, ENABLE);
  823. // ADC_ITConfig(ADC2, ADC_IT_JEOC, ENABLE);
  824. // }
  825. // else
  826. // {
  827. //
  828. // }
  829. //
  830. // /* TIM1 Interrupts enable */
  831. // TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);
  832. //// TIM_ITConfig(TIM1, TIM_IT_CC4, ENABLE);
  833. //
  834. // /* TIM2 Interrupts enable */
  835. // TIM_ITConfig(TIM2, TIM_IT_CC3, ENABLE);
  836. // TIM_ITConfig(TIM2, TIM_IT_CC4, ENABLE);
  837. // TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);
  838. //
  839. // /* TIM3 Interrupts enable */
  840. // TIM_ITConfig(TIM3, TIM_IT_Update, ENABLE);
  841. // TIM_ITConfig(TIM3, TIM_IT_CC1, ENABLE);
  842. // TIM_ITConfig(TIM3, TIM_IT_CC2, ENABLE);
  843. // TIM_ITConfig(TIM3, TIM_IT_CC3, ENABLE);
  844. //
  845. // /* DMA full transfer finish interrupt */
  846. // DMA_ITConfig(DMA1_Channel2, DMA_IT_TC, ENABLE);
  847. // DMA_ITConfig(DMA1_Channel3, DMA_IT_TC, ENABLE);
  848. //--------------------
  849. /* add user code begin adc1_init 2 */
  850. //adc_interrupt_enable(ADC1,ADC_CCE_INT,TRUE);
  851. // adc_interrupt_enable(ADC1,ADC_PCCE_INT,TRUE);
  852. //// dma_interrupt_enable(DMA1_CHANNEL1,DMA_FDT_INT,TRUE);
  853. //
  854. // /* add user code begin tmr1_init 2 */
  855. // tmr_interrupt_enable(TMR1,TMR_OVF_INT,TRUE);
  856. // tmr_flag_clear(TMR1,TMR_BRK_FLAG);
  857. // tmr_interrupt_enable(TMR1,TMR_BRK_INT,TRUE);
  858. //
  859. // // (TMR16,TMR_C1_INT,TRUE);
  860. // tmr_flag_clear(TMR16, TMR_C1_INT | TMR_OVF_INT );
  861. // tmr_interrupt_enable(TMR16,TMR_OVF_INT,TRUE);
  862. // tmr_interrupt_enable(TMR16,TMR_C1_INT,TRUE);
  863. //
  864. // // (TMR17,TMR_C1_INT,TRUE);
  865. // tmr_flag_clear(TMR17, TMR_C1_INT | TMR_OVF_INT );
  866. // tmr_interrupt_enable(TMR17,TMR_OVF_INT,TRUE);
  867. // tmr_interrupt_enable(TMR17,TMR_C1_INT,TRUE);
  868. // //------time3
  869. // tmr_flag_clear(TMR3, TMR_C1_INT | TMR_OVF_INT |TMR_C2_INT |TMR_C3_INT);
  870. // tmr_interrupt_enable(TMR3, TMR_C1_INT, TRUE);
  871. // tmr_interrupt_enable(TMR3, TMR_C2_INT, TRUE);
  872. // tmr_interrupt_enable(TMR3, TMR_C3_INT, TRUE);
  873. // tmr_interrupt_enable(TMR3, TMR_OVF_INT, TRUE);
  874. //
  875. // usart_interrupt_enable(USART1, USART_RDBF_INT, TRUE);
  876. // usart_interrupt_enable(USART1, USART_TDBE_INT, TRUE);
  877. //
  878. //#ifdef SIMULATION
  879. // usart_interrupt_enable(USART2, USART_RDBF_INT, TRUE);
  880. // usart_interrupt_enable(USART2, USART_TDBE_INT, TRUE);
  881. //#endif
  882. }
  883. /*************************************************************************
  884. Function:
  885. Description:
  886. Call by:
  887. Input Variables:
  888. Output/Return Variables:
  889. Subroutine Call:
  890. Reference:寮�鍚鏁�
  891. *************************************************************************/
  892. void hw_voTimEn(void)
  893. {
  894. // tmr_counter_enable(TMR1, TRUE);
  895. // tmr_counter_enable(TMR3, TRUE);
  896. // tmr_counter_enable(TMR6, TRUE);
  897. // tmr_counter_enable(TMR16, TRUE);
  898. // tmr_counter_enable(TMR17, TRUE);
  899. // /* TIM1 counter enable */
  900. // TIM_Cmd(TIM1, ENABLE);
  901. // /* TIM2 counter enable */
  902. // TIM_Cmd(TIM2, ENABLE);
  903. // /* TIM3 counter enable */
  904. // TIM_Cmd(TIM3, ENABLE);
  905. // /* TIM4 counter enable */
  906. // TIM_Cmd(TIM4, ENABLE);
  907. // DL_TimerA_startCounter(MOTOR_PWM_INST);
  908. }
  909. /*************************************************************************
  910. Function:
  911. Description:
  912. Call by:
  913. Input Variables:
  914. Output/Return Variables:
  915. Subroutine Call:
  916. Reference:pwm鍒濆鍖�
  917. *************************************************************************/
  918. void hw_voPWMInit(void)
  919. {
  920. /* Set 50% duty */
  921. pwm_stGenOut.uwNewTIM1COMPR[0] = HW_HHPWM_PERIOD;
  922. pwm_stGenOut.uwNewTIM1COMPR[1] = HW_HHPWM_PERIOD;
  923. pwm_stGenOut.uwNewTIM1COMPR[2] = HW_HHPWM_PERIOD;
  924. pwm_stGenOut.uwNewTIM1COMPR[3] = HW_HHPWM_PERIOD;
  925. pwm_stGenOut.uwNewTIM1COMPR[4] = HW_HHPWM_PERIOD;
  926. pwm_stGenOut.uwNewTIM1COMPR[5] = HW_HHPWM_PERIOD;
  927. /* PWM off */
  928. hw_voPWMOff();
  929. /* Charge init */
  930. hw_uwChrgCt = 0;
  931. hw_blChrgOvrFlg = FALSE;
  932. }
  933. /*************************************************************************
  934. Function:
  935. Description:
  936. Call by:
  937. Input Variables:
  938. Output/Return Variables:
  939. Subroutine Call:
  940. Reference:寮�椹卞姩
  941. *************************************************************************/
  942. void hw_voPWMOn(void)
  943. {
  944. if (hw_blPWMOnFlg == FALSE)
  945. {
  946. // /* CH1, CH2 set to "PWM mode 2" */
  947. // TMR1->cm1 |= 0x7070;// TIM1->CCMR1 |= 0x7070;
  948. // /* CH3 set to "PWM mode 2" */
  949. // TMR1->cm2 |= 0x7070;// TIM1->CCMR2 |= 0x7070;
  950. // /* CH1, CH2 and CH3 output enable */
  951. // TMR1->cctrl |= 0x5555;// TIM1->CCER |= 0x5555; 楂樻湁鏁�
  952. //// TIM1->CCER |= 0x0FFF;
  953. //
  954. // /* Flag set */
  955. DL_Timer_overrideCCPOut(MOTOR_PWM_INST, DL_TIMER_FORCE_OUT_DISABLED, DL_TIMER_FORCE_CMPL_OUT_DISABLED, DL_TIMER_CC_0_INDEX);
  956. DL_Timer_overrideCCPOut(MOTOR_PWM_INST, DL_TIMER_FORCE_OUT_DISABLED, DL_TIMER_FORCE_CMPL_OUT_DISABLED, DL_TIMER_CC_1_INDEX);
  957. DL_Timer_overrideCCPOut(MOTOR_PWM_INST, DL_TIMER_FORCE_OUT_DISABLED, DL_TIMER_FORCE_CMPL_OUT_DISABLED, DL_TIMER_CC_2_INDEX);
  958. hw_blPWMOnFlg = TRUE;
  959. }
  960. }
  961. /*************************************************************************
  962. Function:
  963. Description:
  964. Call by:
  965. Input Variables:
  966. Output/Return Variables:
  967. Subroutine Call:
  968. Reference:鍏抽┍鍔�
  969. *************************************************************************/
  970. void hw_voPWMOff(void)
  971. {
  972. if (hw_blPWMOnFlg == TRUE)
  973. {
  974. // /* CH1, CH2 set to "Frozen" */
  975. // TMR1->cm1 &= ~0x7070;// TIM1->CCMR1 &= ~0x7070;
  976. // /* CH3 set to "Frozen" */
  977. //// TIM1->CCMR2 &= ~0x7070;
  978. // TMR1->cm2&= ~0x0070; // TIM1->CCMR2 &= ~0x0070; //don't change CC4
  979. // /* CH1, CH2 set to "Force inactive level" */
  980. // TMR1->cm1 |= 0x4040;// TIM1->CCMR1 |= 0x4040;
  981. // /* CH3 set to "Force inactive level" */
  982. //// TIM1->CCMR2 |= 0x4040;
  983. // TMR1->cm2 |= 0x0040; // TIM1->CCMR2 |= 0x0040; //don't change CC4
  984. // /* CH1, CH2 and CH3 complementary output disable */
  985. //// TIM1->CCER &= ~0x4444;
  986. // TMR1->cctrl &= ~0x4444;//TIM1->CCER &= ~0x4444;
  987. //
  988. DL_Timer_overrideCCPOut(MOTOR_PWM_INST, DL_TIMER_FORCE_OUT_LOW, DL_TIMER_FORCE_CMPL_OUT_LOW, DL_TIMER_CC_0_INDEX);
  989. DL_Timer_overrideCCPOut(MOTOR_PWM_INST, DL_TIMER_FORCE_OUT_LOW, DL_TIMER_FORCE_CMPL_OUT_LOW, DL_TIMER_CC_1_INDEX);
  990. DL_Timer_overrideCCPOut(MOTOR_PWM_INST, DL_TIMER_FORCE_OUT_LOW, DL_TIMER_FORCE_CMPL_OUT_LOW, DL_TIMER_CC_2_INDEX);
  991. /* Flag set */
  992. hw_blPWMOnFlg = FALSE;
  993. }
  994. }
  995. /*************************************************************************
  996. Function:
  997. Description:
  998. Call by:
  999. Input Variables:
  1000. Output/Return Variables:
  1001. Subroutine Call:
  1002. Reference:50%鍗犵┖姣旇嚜妫�
  1003. *************************************************************************/
  1004. void hw_voCharge(void)
  1005. {
  1006. /* Set 50% duty */
  1007. pwm_stGenOut.uwNewTIM1COMPR[0] = HW_HHPWM_PERIOD;
  1008. pwm_stGenOut.uwNewTIM1COMPR[1] = HW_HHPWM_PERIOD;
  1009. pwm_stGenOut.uwNewTIM1COMPR[2] = HW_HHPWM_PERIOD;
  1010. pwm_stGenOut.uwNewTIM1COMPR[3] = HW_HHPWM_PERIOD;
  1011. pwm_stGenOut.uwNewTIM1COMPR[4] = HW_HHPWM_PERIOD;
  1012. pwm_stGenOut.uwNewTIM1COMPR[5] = HW_HHPWM_PERIOD;
  1013. // pwm_stGenOut.uwNewTIM1COMPR[0] = 337;
  1014. // pwm_stGenOut.uwNewTIM1COMPR[1] = HW_HHPWM_PERIOD;
  1015. // pwm_stGenOut.uwNewTIM1COMPR[2] = HW_HHPWM_PERIOD;
  1016. // pwm_stGenOut.uwNewTIM1COMPR[3] = 337;
  1017. // pwm_stGenOut.uwNewTIM1COMPR[4] = HW_HHPWM_PERIOD;
  1018. // pwm_stGenOut.uwNewTIM1COMPR[5] = HW_HHPWM_PERIOD;
  1019. /* PWM on */
  1020. hw_voPWMOn();
  1021. if (++hw_uwChrgCt > cp_stControlPara.swIPMHvicChrgMs)
  1022. {
  1023. hw_uwChrgCt = 0;
  1024. hw_blChrgOvrFlg = TRUE;
  1025. }
  1026. }
  1027. /* Three phase short */
  1028. /*************************************************************************
  1029. Function:
  1030. Description:
  1031. Call by:
  1032. Input Variables:
  1033. Output/Return Variables:
  1034. Subroutine Call:
  1035. Reference:
  1036. *************************************************************************/
  1037. void hw_voThrPhsShrt(void)
  1038. {
  1039. /* Set 0% duty */
  1040. pwm_stGenOut.uwNewTIM1COMPR[0] = HW_HPWM_PERIOD;
  1041. pwm_stGenOut.uwNewTIM1COMPR[1] = HW_HPWM_PERIOD;
  1042. pwm_stGenOut.uwNewTIM1COMPR[2] = HW_HPWM_PERIOD;
  1043. pwm_stGenOut.uwNewTIM1COMPR[3] = HW_HPWM_PERIOD;
  1044. pwm_stGenOut.uwNewTIM1COMPR[4] = HW_HPWM_PERIOD;
  1045. pwm_stGenOut.uwNewTIM1COMPR[5] = HW_HPWM_PERIOD;
  1046. pwm_stGenOut.uwFirstTrigCOMPR = HW_HHHPWM_PERIOD;
  1047. pwm_stGenOut.uwSecondTrigCOMPR = HW_HPWM_PERIOD - HW_HHHPWM_PERIOD;
  1048. /* PWM on */
  1049. hw_voPWMOn();
  1050. }
  1051. /*************************************************************************
  1052. Function
  1053. Description: Initialize UART
  1054. Call by: ;
  1055. Input Variables: N/A
  1056. Output/Return Variables: N/A
  1057. Subroutine Call: ...;
  1058. Reference: N/A鐪嬮棬鐙�
  1059. ****************************************************************/
  1060. void hw_voIWDGInit(UWORD prer, UWORD rlr)
  1061. {
  1062. // RCC_LSICmd(ENABLE);
  1063. // while (RCC_GetFlagStatus(RCC_FLAG_LSIRDY) != SET)
  1064. // {}
  1065. // IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);
  1066. // IWDG_SetPrescaler(prer);
  1067. // IWDG_SetReload(rlr);
  1068. // IWDG_ReloadCounter();
  1069. // IWDG_Enable();
  1070. }
  1071. /*************************************************************************
  1072. Copyright (c) 2018 Welling Motor Technology(Shanghai) Co. Ltd.
  1073. All rights reserved.
  1074. *************************************************************************/
  1075. #ifdef _HWSETUP_C_
  1076. #undef _HWSETUP_C_
  1077. #endif
  1078. /************************************************************************
  1079. End of this File (EOF)!
  1080. Do not put anything after this part!
  1081. *************************************************************************/