device_linker.cmd 2.7 KB

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  1. /*****************************************************************************
  2. Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
  3. Redistribution and use in source and binary forms, with or without
  4. modification, are permitted provided that the following conditions
  5. are met:
  6. Redistributions of source code must retain the above copyright
  7. notice, this list of conditions and the following disclaimer.
  8. Redistributions in binary form must reproduce the above copyright
  9. notice, this list of conditions and the following disclaimer in the
  10. documentation and/or other materials provided with the
  11. distribution.
  12. Neither the name of Texas Instruments Incorporated nor the names of
  13. its contributors may be used to endorse or promote products derived
  14. from this software without specific prior written permission.
  15. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  16. "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  17. LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  18. A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  19. OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  20. SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  21. LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  22. DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  23. THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24. (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  25. OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26. *****************************************************************************/
  27. -uinterruptVectors
  28. --stack_size=512
  29. MEMORY
  30. {
  31. FLASH (RX) : origin = 0x00007000, length = 0x00019000
  32. SRAM (RWX) : origin = 0x20202000, length = 0x00005C00
  33. BUFFER (RWX) : origin = 0x20207C00, length = 0x00000400
  34. BCR_CONFIG (R) : origin = 0x41C00000, length = 0x00000080
  35. BSL_CONFIG (R) : origin = 0x41C00100, length = 0x00000080
  36. }
  37. SECTIONS
  38. {
  39. .intvecs: > 0x00007000
  40. .text : palign(8) {} > FLASH
  41. .const : palign(8) {} > FLASH
  42. .cinit : palign(8) {} > FLASH
  43. .pinit : palign(8) {} > FLASH
  44. .rodata : palign(8) {} > FLASH
  45. .ARM.exidx : palign(8) {} > FLASH
  46. .init_array : palign(8) {} > FLASH
  47. .binit : palign(8) {} > FLASH
  48. .TI.ramfunc : load = FLASH, palign(8), run=SRAM, table(BINIT)
  49. .vtable : > SRAM
  50. .args : > SRAM
  51. .data : > SRAM
  52. .bss : > SRAM
  53. .sysmem : > SRAM
  54. .stack : > SRAM (HIGH)
  55. .buffer_section : > BUFFER
  56. .BCRConfig : {} > BCR_CONFIG
  57. .BSLConfig : {} > BSL_CONFIG
  58. }