ti_msp_dl_config.h 26 KB

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  1. /*
  2. * Copyright (c) 2023, Texas Instruments Incorporated - http://www.ti.com
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions
  7. * are met:
  8. *
  9. * * Redistributions of source code must retain the above copyright
  10. * notice, this list of conditions and the following disclaimer.
  11. *
  12. * * Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. *
  16. * * Neither the name of Texas Instruments Incorporated nor the names of
  17. * its contributors may be used to endorse or promote products derived
  18. * from this software without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  21. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  22. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  23. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  24. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  25. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  26. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  27. * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  28. * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  29. * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  30. * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31. */
  32. /*
  33. * ============ ti_msp_dl_config.h =============
  34. * Configured MSPM0 DriverLib module declarations
  35. *
  36. * DO NOT EDIT - This file is generated for the MSPM0G350X
  37. * by the SysConfig tool.
  38. */
  39. #ifndef ti_msp_dl_config_h
  40. #define ti_msp_dl_config_h
  41. #define CONFIG_MSPM0G350X
  42. #if defined(__ti_version__) || defined(__TI_COMPILER_VERSION__)
  43. #define SYSCONFIG_WEAK __attribute__((weak))
  44. #elif defined(__IAR_SYSTEMS_ICC__)
  45. #define SYSCONFIG_WEAK __weak
  46. #elif defined(__GNUC__)
  47. #define SYSCONFIG_WEAK __attribute__((weak))
  48. #endif
  49. #include <ti/devices/msp/msp.h>
  50. #include <ti/driverlib/driverlib.h>
  51. #include <ti/driverlib/m0p/dl_core.h>
  52. #ifdef __cplusplus
  53. extern "C" {
  54. #endif
  55. /*
  56. * ======== SYSCFG_DL_init ========
  57. * Perform all required MSP DL initialization
  58. *
  59. * This function should be called once at a point before any use of
  60. * MSP DL.
  61. */
  62. /* clang-format off */
  63. #define POWER_STARTUP_DELAY (16)
  64. #define GPIO_HFXT_PORT GPIOA
  65. #define GPIO_HFXIN_PIN DL_GPIO_PIN_5
  66. #define GPIO_HFXIN_IOMUX (IOMUX_PINCM10)
  67. #define GPIO_HFXOUT_PIN DL_GPIO_PIN_6
  68. #define GPIO_HFXOUT_IOMUX (IOMUX_PINCM11)
  69. #define CPUCLK_FREQ 72000000
  70. /* Defines for I2C_0 */
  71. #define I2C_0_INST I2C1
  72. #define I2C_0_INST_IRQHandler I2C1_IRQHandler
  73. #define I2C_0_INST_INT_IRQN I2C1_INT_IRQn
  74. #define I2C_0_BUS_SPEED_HZ 400000
  75. #define GPIO_I2C_0_SDA_PORT GPIOB
  76. #define GPIO_I2C_0_SDA_PIN DL_GPIO_PIN_3
  77. #define GPIO_I2C_0_IOMUX_SDA (IOMUX_PINCM16)
  78. #define GPIO_I2C_0_IOMUX_SDA_FUNC IOMUX_PINCM16_PF_I2C1_SDA
  79. #define GPIO_I2C_0_SCL_PORT GPIOB
  80. #define GPIO_I2C_0_SCL_PIN DL_GPIO_PIN_2
  81. #define GPIO_I2C_0_IOMUX_SCL (IOMUX_PINCM15)
  82. #define GPIO_I2C_0_IOMUX_SCL_FUNC IOMUX_PINCM15_PF_I2C1_SCL
  83. /* Defines for DMA_CH0 */
  84. #define DMA_CH0_CHAN_ID (1)
  85. #define I2C_0_INST_DMA_TRIGGER_0 (DMA_I2C1_TX_TRIG)
  86. /* Defines for DMA_CH1 */
  87. #define DMA_CH1_CHAN_ID (0)
  88. #define I2C_0_INST_DMA_TRIGGER_1 (DMA_I2C1_RX_TRIG)
  89. /* Defines for MOTOR_PWM */
  90. #define MOTOR_PWM_INST TIMA0
  91. #define MOTOR_PWM_INST_IRQHandler TIMA0_IRQHandler
  92. #define MOTOR_PWM_INST_INT_IRQN (TIMA0_INT_IRQn)
  93. #define MOTOR_PWM_INST_CLK_FREQ 72000000
  94. /* GPIO defines for channel 0 */
  95. #define GPIO_MOTOR_PWM_C0_PORT GPIOB
  96. #define GPIO_MOTOR_PWM_C0_PIN DL_GPIO_PIN_14
  97. #define GPIO_MOTOR_PWM_C0_IOMUX (IOMUX_PINCM31)
  98. #define GPIO_MOTOR_PWM_C0_IOMUX_FUNC IOMUX_PINCM31_PF_TIMA0_CCP0
  99. #define GPIO_MOTOR_PWM_C0_IDX DL_TIMER_CC_0_INDEX
  100. /* GPIO defines for channel 0 */
  101. #define GPIO_MOTOR_PWM_C0_CMPL_PORT GPIOB
  102. #define GPIO_MOTOR_PWM_C0_CMPL_PIN DL_GPIO_PIN_9
  103. #define GPIO_MOTOR_PWM_C0_CMPL_IOMUX (IOMUX_PINCM26)
  104. #define GPIO_MOTOR_PWM_C0_CMPL_IOMUX_FUNC IOMUX_PINCM26_PF_TIMA0_CCP0_CMPL
  105. /* GPIO defines for channel 1 */
  106. #define GPIO_MOTOR_PWM_C1_PORT GPIOA
  107. #define GPIO_MOTOR_PWM_C1_PIN DL_GPIO_PIN_7
  108. #define GPIO_MOTOR_PWM_C1_IOMUX (IOMUX_PINCM14)
  109. #define GPIO_MOTOR_PWM_C1_IOMUX_FUNC IOMUX_PINCM14_PF_TIMA0_CCP1
  110. #define GPIO_MOTOR_PWM_C1_IDX DL_TIMER_CC_1_INDEX
  111. /* GPIO defines for channel 1 */
  112. #define GPIO_MOTOR_PWM_C1_CMPL_PORT GPIOA
  113. #define GPIO_MOTOR_PWM_C1_CMPL_PIN DL_GPIO_PIN_4
  114. #define GPIO_MOTOR_PWM_C1_CMPL_IOMUX (IOMUX_PINCM9)
  115. #define GPIO_MOTOR_PWM_C1_CMPL_IOMUX_FUNC IOMUX_PINCM9_PF_TIMA0_CCP1_CMPL
  116. /* GPIO defines for channel 2 */
  117. #define GPIO_MOTOR_PWM_C2_PORT GPIOA
  118. #define GPIO_MOTOR_PWM_C2_PIN DL_GPIO_PIN_10
  119. #define GPIO_MOTOR_PWM_C2_IOMUX (IOMUX_PINCM21)
  120. #define GPIO_MOTOR_PWM_C2_IOMUX_FUNC IOMUX_PINCM21_PF_TIMA0_CCP2
  121. #define GPIO_MOTOR_PWM_C2_IDX DL_TIMER_CC_2_INDEX
  122. /* GPIO defines for channel 2 */
  123. #define GPIO_MOTOR_PWM_C2_CMPL_PORT GPIOA
  124. #define GPIO_MOTOR_PWM_C2_CMPL_PIN DL_GPIO_PIN_11
  125. #define GPIO_MOTOR_PWM_C2_CMPL_IOMUX (IOMUX_PINCM22)
  126. #define GPIO_MOTOR_PWM_C2_CMPL_IOMUX_FUNC IOMUX_PINCM22_PF_TIMA0_CCP2_CMPL
  127. /* Publisher defines */
  128. #define MOTOR_PWM_INST_PUB_0_CH (12)
  129. #define MOTOR_PWM_REPEAT_COUNT_2 (1)
  130. /* Defines for PWM_F */
  131. #define PWM_F_INST TIMG7
  132. #define PWM_F_INST_IRQHandler TIMG7_IRQHandler
  133. #define PWM_F_INST_INT_IRQN (TIMG7_INT_IRQn)
  134. #define PWM_F_INST_CLK_FREQ 36000000
  135. /* GPIO defines for channel 1 */
  136. #define GPIO_PWM_F_C1_PORT GPIOA
  137. #define GPIO_PWM_F_C1_PIN DL_GPIO_PIN_2
  138. #define GPIO_PWM_F_C1_IOMUX (IOMUX_PINCM7)
  139. #define GPIO_PWM_F_C1_IOMUX_FUNC IOMUX_PINCM7_PF_TIMG7_CCP1
  140. #define GPIO_PWM_F_C1_IDX DL_TIMER_CC_1_INDEX
  141. /* Defines for HALLTIMER */
  142. #define HALLTIMER_INST (TIMG6)
  143. #define HALLTIMER_INST_IRQHandler TIMG6_IRQHandler
  144. #define HALLTIMER_INST_INT_IRQN (TIMG6_INT_IRQn)
  145. #define HALLTIMER_INST_LOAD_VALUE (60011U)
  146. /* Defines for HALL_CNT */
  147. #define HALL_CNT_INST (TIMG0)
  148. #define HALL_CNT_INST_IRQHandler TIMG0_IRQHandler
  149. #define HALL_CNT_INST_INT_IRQN (TIMG0_INT_IRQn)
  150. #define HALL_CNT_INST_LOAD_VALUE (1079U)
  151. /* Defines for UART_HMI */
  152. #define UART_HMI_INST UART0
  153. #define UART_HMI_INST_IRQHandler UART0_IRQHandler
  154. #define UART_HMI_INST_INT_IRQN UART0_INT_IRQn
  155. #define GPIO_UART_HMI_RX_PORT GPIOA
  156. #define GPIO_UART_HMI_TX_PORT GPIOA
  157. #define GPIO_UART_HMI_RX_PIN DL_GPIO_PIN_1
  158. #define GPIO_UART_HMI_TX_PIN DL_GPIO_PIN_0
  159. #define GPIO_UART_HMI_IOMUX_RX (IOMUX_PINCM2)
  160. #define GPIO_UART_HMI_IOMUX_TX (IOMUX_PINCM1)
  161. #define GPIO_UART_HMI_IOMUX_RX_FUNC IOMUX_PINCM2_PF_UART0_RX
  162. #define GPIO_UART_HMI_IOMUX_TX_FUNC IOMUX_PINCM1_PF_UART0_TX
  163. #define UART_HMI_BAUD_RATE (9600)
  164. #define UART_HMI_IBRD_36_MHZ_9600_BAUD (234)
  165. #define UART_HMI_FBRD_36_MHZ_9600_BAUD (24)
  166. /* Defines for ADC12_0 */
  167. #define ADC12_0_INST ADC0
  168. #define ADC12_0_INST_IRQHandler ADC0_IRQHandler
  169. #define ADC12_0_INST_INT_IRQN (ADC0_INT_IRQn)
  170. #define ADC12_0_ADCMEM_0 DL_ADC12_MEM_IDX_0
  171. #define ADC12_0_ADCMEM_0_REF DL_ADC12_REFERENCE_VOLTAGE_VDDA
  172. #define ADC12_0_ADCMEM_0_REF_VOLTAGE_V 3.3
  173. #define ADC12_0_ADCMEM_1 DL_ADC12_MEM_IDX_1
  174. #define ADC12_0_ADCMEM_1_REF DL_ADC12_REFERENCE_VOLTAGE_VDDA
  175. #define ADC12_0_ADCMEM_1_REF_VOLTAGE_V 3.3
  176. #define ADC12_0_ADCMEM_2 DL_ADC12_MEM_IDX_2
  177. #define ADC12_0_ADCMEM_2_REF DL_ADC12_REFERENCE_VOLTAGE_VDDA
  178. #define ADC12_0_ADCMEM_2_REF_VOLTAGE_V 3.3
  179. #define ADC12_0_ADCMEM_3 DL_ADC12_MEM_IDX_3
  180. #define ADC12_0_ADCMEM_3_REF DL_ADC12_REFERENCE_VOLTAGE_VDDA
  181. #define ADC12_0_ADCMEM_3_REF_VOLTAGE_V 3.3
  182. #define ADC12_0_ADCMEM_4 DL_ADC12_MEM_IDX_4
  183. #define ADC12_0_ADCMEM_4_REF DL_ADC12_REFERENCE_VOLTAGE_VDDA
  184. #define ADC12_0_ADCMEM_4_REF_VOLTAGE_V 3.3
  185. #define ADC12_0_INST_SUB_CH (12)
  186. #define GPIO_ADC12_0_C6_PORT GPIOB
  187. #define GPIO_ADC12_0_C6_PIN DL_GPIO_PIN_20
  188. #define GPIO_ADC12_0_C0_PORT GPIOA
  189. #define GPIO_ADC12_0_C0_PIN DL_GPIO_PIN_27
  190. #define GPIO_ADC12_0_C1_PORT GPIOA
  191. #define GPIO_ADC12_0_C1_PIN DL_GPIO_PIN_26
  192. /* Defines for ADC12_1 */
  193. #define ADC12_1_INST ADC1
  194. #define ADC12_1_INST_IRQHandler ADC1_IRQHandler
  195. #define ADC12_1_INST_INT_IRQN (ADC1_INT_IRQn)
  196. #define ADC12_1_ADCMEM_0 DL_ADC12_MEM_IDX_0
  197. #define ADC12_1_ADCMEM_0_REF DL_ADC12_REFERENCE_VOLTAGE_VDDA
  198. #define ADC12_1_ADCMEM_0_REF_VOLTAGE_V 3.3
  199. #define ADC12_1_ADCMEM_1 DL_ADC12_MEM_IDX_1
  200. #define ADC12_1_ADCMEM_1_REF DL_ADC12_REFERENCE_VOLTAGE_VDDA
  201. #define ADC12_1_ADCMEM_1_REF_VOLTAGE_V 3.3
  202. #define ADC12_1_ADCMEM_2 DL_ADC12_MEM_IDX_2
  203. #define ADC12_1_ADCMEM_2_REF DL_ADC12_REFERENCE_VOLTAGE_VDDA
  204. #define ADC12_1_ADCMEM_2_REF_VOLTAGE_V 3.3
  205. #define ADC12_1_ADCMEM_3 DL_ADC12_MEM_IDX_3
  206. #define ADC12_1_ADCMEM_3_REF DL_ADC12_REFERENCE_VOLTAGE_VDDA
  207. #define ADC12_1_ADCMEM_3_REF_VOLTAGE_V 3.3
  208. #define ADC12_1_ADCMEM_4 DL_ADC12_MEM_IDX_4
  209. #define ADC12_1_ADCMEM_4_REF DL_ADC12_REFERENCE_VOLTAGE_VDDA
  210. #define ADC12_1_ADCMEM_4_REF_VOLTAGE_V 3.3
  211. #define ADC12_1_ADCMEM_5 DL_ADC12_MEM_IDX_5
  212. #define ADC12_1_ADCMEM_5_REF DL_ADC12_REFERENCE_VOLTAGE_VDDA
  213. #define ADC12_1_ADCMEM_5_REF_VOLTAGE_V 3.3
  214. #define ADC12_1_INST_SUB_CH (12)
  215. #define GPIO_ADC12_1_C6_PORT GPIOB
  216. #define GPIO_ADC12_1_C6_PIN DL_GPIO_PIN_19
  217. #define GPIO_ADC12_1_C5_PORT GPIOB
  218. #define GPIO_ADC12_1_C5_PIN DL_GPIO_PIN_18
  219. #define GPIO_ADC12_1_C4_PORT GPIOB
  220. #define GPIO_ADC12_1_C4_PIN DL_GPIO_PIN_17
  221. #define GPIO_ADC12_1_C7_PORT GPIOA
  222. #define GPIO_ADC12_1_C7_PIN DL_GPIO_PIN_21
  223. #define GPIO_ADC12_1_C0_PORT GPIOA
  224. #define GPIO_ADC12_1_C0_PIN DL_GPIO_PIN_15
  225. /* Defines for COMP_0 */
  226. #define COMP_0_INST COMP1
  227. #define COMP_0_INST_INT_IRQN COMP1_INT_IRQn
  228. /* Defines for COMP_0 DACCODE0 */
  229. #define COMP_0_DACCODE0 (181)
  230. /* GPIO configuration for COMP_0 */
  231. #define GPIO_COMP_0_IN1P_PORT (GPIOB)
  232. #define GPIO_COMP_0_IN1P_PIN (DL_GPIO_PIN_24)
  233. #define GPIO_COMP_0_IOMUX_IN1P (IOMUX_PINCM52)
  234. #define GPIO_COMP_0_IOMUX_IN1P_FUNC (IOMUX_PINCM52_PF_UNCONNECTED)
  235. /* Defines for OPA_BPHASE */
  236. #define OPA_BPHASE_INST OPA1
  237. #define GPIO_OPA_BPHASE_IN1POS_PORT GPIOA
  238. #define GPIO_OPA_BPHASE_IN1POS_PIN DL_GPIO_PIN_18
  239. #define GPIO_OPA_BPHASE_IOMUX_IN1POS (IOMUX_PINCM40)
  240. #define GPIO_OPA_BPHASE_IOMUX_IN1POS_FUNC IOMUX_PINCM40_PF_UNCONNECTED
  241. #define GPIO_OPA_BPHASE_IN1NEG_PORT GPIOA
  242. #define GPIO_OPA_BPHASE_IN1NEG_PIN DL_GPIO_PIN_17
  243. #define GPIO_OPA_BPHASE_IOMUX_IN1NEG (IOMUX_PINCM39)
  244. #define GPIO_OPA_BPHASE_IOMUX_IN1NEG_FUNC IOMUX_PINCM39_PF_UNCONNECTED
  245. #define GPIO_OPA_BPHASE_OUT_PORT GPIOA
  246. #define GPIO_OPA_BPHASE_OUT_PIN DL_GPIO_PIN_16
  247. #define GPIO_OPA_BPHASE_IOMUX_OUT (IOMUX_PINCM38)
  248. #define GPIO_OPA_BPHASE_IOMUX_OUT_FUNC IOMUX_PINCM38_PF_UNCONNECTED
  249. /* Defines for OPA_CPHASE */
  250. #define OPA_CPHASE_INST OPA0
  251. #define GPIO_OPA_CPHASE_IN1POS_PORT GPIOA
  252. #define GPIO_OPA_CPHASE_IN1POS_PIN DL_GPIO_PIN_25
  253. #define GPIO_OPA_CPHASE_IOMUX_IN1POS (IOMUX_PINCM55)
  254. #define GPIO_OPA_CPHASE_IOMUX_IN1POS_FUNC IOMUX_PINCM55_PF_UNCONNECTED
  255. #define GPIO_OPA_CPHASE_IN1NEG_PORT GPIOA
  256. #define GPIO_OPA_CPHASE_IN1NEG_PIN DL_GPIO_PIN_24
  257. #define GPIO_OPA_CPHASE_IOMUX_IN1NEG (IOMUX_PINCM54)
  258. #define GPIO_OPA_CPHASE_IOMUX_IN1NEG_FUNC IOMUX_PINCM54_PF_UNCONNECTED
  259. #define GPIO_OPA_CPHASE_OUT_PORT GPIOA
  260. #define GPIO_OPA_CPHASE_OUT_PIN DL_GPIO_PIN_22
  261. #define GPIO_OPA_CPHASE_IOMUX_OUT (IOMUX_PINCM47)
  262. #define GPIO_OPA_CPHASE_IOMUX_OUT_FUNC IOMUX_PINCM47_PF_UNCONNECTED
  263. /* Port definition for Pin Group OUTPUT */
  264. #define OUTPUT_PORT (GPIOB)
  265. /* Defines for POWER_EN: GPIOB.8 with pinCMx 25 on package pin 22 */
  266. #define OUTPUT_POWER_EN_PIN (DL_GPIO_PIN_8)
  267. #define OUTPUT_POWER_EN_IOMUX (IOMUX_PINCM25)
  268. /* Port definition for Pin Group LIGHT_DETECT */
  269. #define LIGHT_DETECT_PORT (GPIOA)
  270. /* Defines for LIGHT_PWM_F: GPIOA.23 with pinCMx 53 on package pin 43 */
  271. // groups represented: ["HALL","LIGHT_DETECT"]
  272. // pins affected: ["HALLA","LIGHT_PWM_F"]
  273. #define GPIO_MULTIPLE_GPIOA_INT_IRQN (GPIOA_INT_IRQn)
  274. #define GPIO_MULTIPLE_GPIOA_INT_IIDX (DL_INTERRUPT_GROUP1_IIDX_GPIOA)
  275. #define LIGHT_DETECT_LIGHT_PWM_F_IIDX (DL_GPIO_IIDX_DIO23)
  276. #define LIGHT_DETECT_LIGHT_PWM_F_PIN (DL_GPIO_PIN_23)
  277. #define LIGHT_DETECT_LIGHT_PWM_F_IOMUX (IOMUX_PINCM53)
  278. /* Defines for BREAK: GPIOA.28 with pinCMx 3 on package pin 3 */
  279. #define INPUT_BREAK_PORT (GPIOA)
  280. #define INPUT_BREAK_PIN (DL_GPIO_PIN_28)
  281. #define INPUT_BREAK_IOMUX (IOMUX_PINCM3)
  282. /* Defines for Cadence_Dir: GPIOA.9 with pinCMx 20 on package pin 17 */
  283. #define INPUT_Cadence_Dir_PORT (GPIOA)
  284. #define INPUT_Cadence_Dir_PIN (DL_GPIO_PIN_9)
  285. #define INPUT_Cadence_Dir_IOMUX (IOMUX_PINCM20)
  286. /* Defines for Cadence_Speed: GPIOB.7 with pinCMx 24 on package pin 21 */
  287. #define INPUT_Cadence_Speed_PORT (GPIOB)
  288. #define INPUT_Cadence_Speed_PIN (DL_GPIO_PIN_7)
  289. #define INPUT_Cadence_Speed_IOMUX (IOMUX_PINCM24)
  290. /* Defines for PIN_GEAR: GPIOB.15 with pinCMx 32 on package pin 25 */
  291. #define INPUT_PIN_GEAR_PORT (GPIOB)
  292. #define INPUT_PIN_GEAR_PIN (DL_GPIO_PIN_15)
  293. #define INPUT_PIN_GEAR_IOMUX (IOMUX_PINCM32)
  294. /* Defines for Speed_In: GPIOA.31 with pinCMx 6 on package pin 5 */
  295. #define INPUT_Speed_In_PORT (GPIOA)
  296. #define INPUT_Speed_In_PIN (DL_GPIO_PIN_31)
  297. #define INPUT_Speed_In_IOMUX (IOMUX_PINCM6)
  298. #if 0
  299. /* Defines for HALLA: GPIOA.8 with pinCMx 19 on package pin 16 */
  300. #define HALL_HALLA_PORT (GPIOA)
  301. #define HALL_HALLA_IIDX (DL_GPIO_IIDX_DIO8)
  302. #define HALL_HALLA_PIN (DL_GPIO_PIN_8)
  303. #define HALL_HALLA_IOMUX (IOMUX_PINCM19)
  304. /* Defines for HALLB: GPIOB.3 with pinCMx 16 on package pin 15 */
  305. #define HALL_HALLB_PORT (GPIOB)
  306. // pins affected by this interrupt request:["HALLB","HALLC"]
  307. #define HALL_GPIOB_INT_IRQN (GPIOB_INT_IRQn)
  308. #define HALL_GPIOB_INT_IIDX (DL_INTERRUPT_GROUP1_IIDX_GPIOB)
  309. #define HALL_HALLB_IIDX (DL_GPIO_IIDX_DIO3)
  310. #define HALL_HALLB_PIN (DL_GPIO_PIN_3)
  311. #define HALL_HALLB_IOMUX (IOMUX_PINCM16)
  312. /* Defines for HALLC: GPIOB.2 with pinCMx 15 on package pin 14 */
  313. #define HALL_HALLC_PORT (GPIOB)
  314. #define HALL_HALLC_IIDX (DL_GPIO_IIDX_DIO2)
  315. #define HALL_HALLC_PIN (DL_GPIO_PIN_2)
  316. #define HALL_HALLC_IOMUX (IOMUX_PINCM15)
  317. #endif
  318. /* Port definition for Pin Group TMAG5273 */
  319. #define TMAG5273_PORT (GPIOB)
  320. /* Defines for SCL: GPIOB.2 with pinCMx 15 on package pin 14 */
  321. #define TMAG5273_SCL_PIN (DL_GPIO_PIN_3)
  322. #define TMAG5273_SCL_IOMUX (IOMUX_PINCM16)
  323. /* Defines for SDA: GPIOB.3 with pinCMx 16 on package pin 15 */
  324. #define TMAG5273_SDA_PIN (DL_GPIO_PIN_2)
  325. #define TMAG5273_SDA_IOMUX (IOMUX_PINCM15)
  326. /* Port definition for Pin Group GPIO_B_LED */
  327. #define GPIO_B_LED_PORT (GPIOB)
  328. /* Defines for PIN_LED_B_EN: GPIOB.16 with pinCMx 33 on package pin 26 */
  329. #define GPIO_B_LED_PIN_LED_B_EN_PIN (DL_GPIO_PIN_16)
  330. #define GPIO_B_LED_PIN_LED_B_EN_IOMUX (IOMUX_PINCM33)
  331. /* Defines for PIN_LED_B_SEL: GPIOB.6 with pinCMx 23 on package pin 20 */
  332. #define GPIO_B_LED_PIN_LED_B_SEL_PIN (DL_GPIO_PIN_6)
  333. #define GPIO_B_LED_PIN_LED_B_SEL_IOMUX (IOMUX_PINCM23)
  334. /* Port definition for Pin Group GPIO_F_LED */
  335. #define GPIO_F_LED_PORT (GPIOA)
  336. /* Defines for PIN_LED_F_EN: GPIOA.20 with pinCMx 42 on package pin 35 */
  337. #define GPIO_F_LED_PIN_LED_F_EN_PIN (DL_GPIO_PIN_20)
  338. #define GPIO_F_LED_PIN_LED_F_EN_IOMUX (IOMUX_PINCM42)
  339. /* Defines for PIN_LED_F_SEL: GPIOA.19 with pinCMx 41 on package pin 34 */
  340. #define GPIO_F_LED_PIN_LED_F_SEL_PIN (DL_GPIO_PIN_19)
  341. #define GPIO_F_LED_PIN_LED_F_SEL_IOMUX (IOMUX_PINCM41)
  342. /* Defines for WWDT */
  343. #define WWDT0_INST (WWDT0)
  344. #define WWDT0_INT_IRQN (WWDT0_INT_IRQn)
  345. /* Defines for MCAN0 */
  346. #define MCAN0_INST CANFD0
  347. #define GPIO_MCAN0_CAN_TX_PORT GPIOA
  348. #define GPIO_MCAN0_CAN_TX_PIN DL_GPIO_PIN_12
  349. #define GPIO_MCAN0_IOMUX_CAN_TX (IOMUX_PINCM34)
  350. #define GPIO_MCAN0_IOMUX_CAN_TX_FUNC IOMUX_PINCM34_PF_CANFD0_CANTX
  351. #define GPIO_MCAN0_CAN_RX_PORT GPIOA
  352. #define GPIO_MCAN0_CAN_RX_PIN DL_GPIO_PIN_13
  353. #define GPIO_MCAN0_IOMUX_CAN_RX (IOMUX_PINCM35)
  354. #define GPIO_MCAN0_IOMUX_CAN_RX_FUNC IOMUX_PINCM35_PF_CANFD0_CANRX
  355. #define MCAN0_INST_IRQHandler CANFD0_IRQHandler
  356. #define MCAN0_INST_INT_IRQN CANFD0_INT_IRQn
  357. /* Defines for MCAN0 MCAN RAM configuration */
  358. #define MCAN0_INST_MCAN_STD_ID_FILT_START_ADDR (0)
  359. #define MCAN0_INST_MCAN_STD_ID_FILTER_NUM (0)
  360. #define MCAN0_INST_MCAN_EXT_ID_FILT_START_ADDR (0)
  361. #define MCAN0_INST_MCAN_EXT_ID_FILTER_NUM (0)
  362. #define MCAN0_INST_MCAN_TX_BUFF_START_ADDR (0)
  363. #define MCAN0_INST_MCAN_TX_BUFF_SIZE (0)
  364. #define MCAN0_INST_MCAN_FIFO_1_START_ADDR (0)
  365. #define MCAN0_INST_MCAN_FIFO_1_NUM (32)
  366. #define MCAN0_INST_MCAN_TX_EVENT_START_ADDR (0)
  367. #define MCAN0_INST_MCAN_TX_EVENT_SIZE (32)
  368. #define MCAN0_INST_MCAN_EXT_ID_AND_MASK (0x1FFFFFFFU)
  369. #define MCAN0_INST_MCAN_RX_BUFF_START_ADDR (0)
  370. #define MCAN0_INST_MCAN_FIFO_0_START_ADDR (0)
  371. #define MCAN0_INST_MCAN_FIFO_0_NUM (32)
  372. #define MCAN0_INST_MCAN_INTERRUPTS (DL_MCAN_INTERRUPT_RF0N | \
  373. DL_MCAN_INTERRUPT_TC | \
  374. DL_MCAN_INTERRUPT_TEFN)
  375. /* clang-format on */
  376. void SYSCFG_DL_init(void);
  377. void SYSCFG_DL_initPower(void);
  378. void SYSCFG_DL_GPIO_init(void);
  379. void SYSCFG_DL_DEBUG_init(void);
  380. void SYSCFG_DL_SYSCTL_init(void);
  381. void SYSCFG_DL_I2C_0_init(void);
  382. void SYSCFG_DL_DMA_init(void);
  383. void SYSCFG_DL_MOTOR_PWM_init(void);
  384. void SYSCFG_DL_PWM_F_init(void);
  385. void SYSCFG_DL_HALLTIMER_init(void);
  386. void SYSCFG_DL_HALL_CNT_init(void);
  387. void SYSCFG_DL_UART_HMI_init(void);
  388. void SYSCFG_DL_ADC12_0_init(void);
  389. void SYSCFG_DL_ADC12_1_init(void);
  390. void SYSCFG_DL_COMP_0_init(void);
  391. void SYSCFG_DL_OPA_BPHASE_init(void);
  392. void SYSCFG_DL_OPA_CPHASE_init(void);
  393. void SYSCFG_DL_SYSTICK_init(void);
  394. void SYSCFG_DL_WWDT0_init(void);
  395. void SYSCFG_DL_MCAN0_init(void);
  396. bool SYSCFG_DL_saveConfiguration(void);
  397. bool SYSCFG_DL_restoreConfiguration(void);
  398. #ifdef __cplusplus
  399. }
  400. #endif
  401. #endif /* ti_msp_dl_config_h */