motor_ctl-1/ti_msp_dl_config.h

/*
 * Copyright (c) 2023, Texas Instruments Incorporated - http://www.ti.com
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 *  ============ ti_msp_dl_config.h =============
 *  Configured MSPM0 DriverLib module declarations
 *
 *  DO NOT EDIT - This file is generated for the MSPM0G350X
 *  by the SysConfig tool.
 */
#ifndef ti_msp_dl_config_h
#define ti_msp_dl_config_h

#define CONFIG_MSPM0G350X

#if defined(__ti_version__) || defined(__TI_COMPILER_VERSION__)
#define SYSCONFIG_WEAK __attribute__((weak))
#elif defined(__IAR_SYSTEMS_ICC__)
#define SYSCONFIG_WEAK __weak
#elif defined(__GNUC__)
#define SYSCONFIG_WEAK __attribute__((weak))
#endif

#include <ti/devices/msp/msp.h>
#include <ti/driverlib/driverlib.h>
#include <ti/driverlib/m0p/dl_core.h>

#ifdef __cplusplus
extern "C" {
#endif

/*
 *  ======== SYSCFG_DL_init ========
 *  Perform all required MSP DL initialization
 *
 *  This function should be called once at a point before any use of
 *  MSP DL.
 */


/* clang-format off */

#define POWER_STARTUP_DELAY                                                (16)



#define CPUCLK_FREQ                                                     72000000



/* Defines for MOTOR_PWM */
#define MOTOR_PWM_INST                                                     TIMA0
#define MOTOR_PWM_INST_IRQHandler                               TIMA0_IRQHandler
#define MOTOR_PWM_INST_INT_IRQN                                 (TIMA0_INT_IRQn)
#define MOTOR_PWM_INST_CLK_FREQ                                         72000000
/* GPIO defines for channel 0 */
#define GPIO_MOTOR_PWM_C0_PORT                                             GPIOB
#define GPIO_MOTOR_PWM_C0_PIN                                     DL_GPIO_PIN_14
#define GPIO_MOTOR_PWM_C0_IOMUX                                  (IOMUX_PINCM31)
#define GPIO_MOTOR_PWM_C0_IOMUX_FUNC                 IOMUX_PINCM31_PF_TIMA0_CCP0
#define GPIO_MOTOR_PWM_C0_IDX                                DL_TIMER_CC_0_INDEX
/* GPIO defines for channel 0 */
#define GPIO_MOTOR_PWM_C0_CMPL_PORT                                        GPIOB
#define GPIO_MOTOR_PWM_C0_CMPL_PIN                                 DL_GPIO_PIN_9
#define GPIO_MOTOR_PWM_C0_CMPL_IOMUX                             (IOMUX_PINCM26)
#define GPIO_MOTOR_PWM_C0_CMPL_IOMUX_FUNC        IOMUX_PINCM26_PF_TIMA0_CCP0_CMPL

/* GPIO defines for channel 1 */
#define GPIO_MOTOR_PWM_C1_PORT                                             GPIOA
#define GPIO_MOTOR_PWM_C1_PIN                                      DL_GPIO_PIN_7
#define GPIO_MOTOR_PWM_C1_IOMUX                                  (IOMUX_PINCM14)
#define GPIO_MOTOR_PWM_C1_IOMUX_FUNC                 IOMUX_PINCM14_PF_TIMA0_CCP1
#define GPIO_MOTOR_PWM_C1_IDX                                DL_TIMER_CC_1_INDEX
/* GPIO defines for channel 1 */
#define GPIO_MOTOR_PWM_C1_CMPL_PORT                                        GPIOA
#define GPIO_MOTOR_PWM_C1_CMPL_PIN                                 DL_GPIO_PIN_4
#define GPIO_MOTOR_PWM_C1_CMPL_IOMUX                              (IOMUX_PINCM9)
#define GPIO_MOTOR_PWM_C1_CMPL_IOMUX_FUNC         IOMUX_PINCM9_PF_TIMA0_CCP1_CMPL

/* GPIO defines for channel 2 */
#define GPIO_MOTOR_PWM_C2_PORT                                             GPIOA
#define GPIO_MOTOR_PWM_C2_PIN                                     DL_GPIO_PIN_10
#define GPIO_MOTOR_PWM_C2_IOMUX                                  (IOMUX_PINCM21)
#define GPIO_MOTOR_PWM_C2_IOMUX_FUNC                 IOMUX_PINCM21_PF_TIMA0_CCP2
#define GPIO_MOTOR_PWM_C2_IDX                                DL_TIMER_CC_2_INDEX
/* GPIO defines for channel 2 */
#define GPIO_MOTOR_PWM_C2_CMPL_PORT                                        GPIOA
#define GPIO_MOTOR_PWM_C2_CMPL_PIN                                DL_GPIO_PIN_11
#define GPIO_MOTOR_PWM_C2_CMPL_IOMUX                             (IOMUX_PINCM22)
#define GPIO_MOTOR_PWM_C2_CMPL_IOMUX_FUNC        IOMUX_PINCM22_PF_TIMA0_CCP2_CMPL


/* Publisher defines */
#define MOTOR_PWM_INST_PUB_0_CH                                             (12)

#define MOTOR_PWM_REPEAT_COUNT_2                                             (1)
/* Defines for PWM_F */
#define PWM_F_INST                                                         TIMG7
#define PWM_F_INST_IRQHandler                                   TIMG7_IRQHandler
#define PWM_F_INST_INT_IRQN                                     (TIMG7_INT_IRQn)
#define PWM_F_INST_CLK_FREQ                                             36000000
/* GPIO defines for channel 1 */
#define GPIO_PWM_F_C1_PORT                                                 GPIOA
#define GPIO_PWM_F_C1_PIN                                          DL_GPIO_PIN_2
#define GPIO_PWM_F_C1_IOMUX                                       (IOMUX_PINCM7)
#define GPIO_PWM_F_C1_IOMUX_FUNC                      IOMUX_PINCM7_PF_TIMG7_CCP1
#define GPIO_PWM_F_C1_IDX                                    DL_TIMER_CC_1_INDEX

/* Defines for PWM_B_L */
#define PWM_B_L_INST                                                       TIMG8
#define PWM_B_L_INST_IRQHandler                                 TIMG8_IRQHandler
#define PWM_B_L_INST_INT_IRQN                                   (TIMG8_INT_IRQn)
#define PWM_B_L_INST_CLK_FREQ                                           36000000
/* GPIO defines for channel 0 */
#define GPIO_PWM_B_L_C0_PORT                                               GPIOB
#define GPIO_PWM_B_L_C0_PIN                                        DL_GPIO_PIN_6
#define GPIO_PWM_B_L_C0_IOMUX                                    (IOMUX_PINCM23)
#define GPIO_PWM_B_L_C0_IOMUX_FUNC                   IOMUX_PINCM23_PF_TIMG8_CCP0
#define GPIO_PWM_B_L_C0_IDX                                  DL_TIMER_CC_0_INDEX
/* GPIO defines for channel 1 */
#define GPIO_PWM_B_L_C1_PORT                                               GPIOB
#define GPIO_PWM_B_L_C1_PIN                                       DL_GPIO_PIN_16
#define GPIO_PWM_B_L_C1_IOMUX                                    (IOMUX_PINCM33)
#define GPIO_PWM_B_L_C1_IOMUX_FUNC                   IOMUX_PINCM33_PF_TIMG8_CCP1
#define GPIO_PWM_B_L_C1_IDX                                  DL_TIMER_CC_1_INDEX

/* Defines for PWM_R */
#define PWM_R_INST                                                        TIMG12
#define PWM_R_INST_IRQHandler                                  TIMG12_IRQHandler
#define PWM_R_INST_INT_IRQN                                    (TIMG12_INT_IRQn)
#define PWM_R_INST_CLK_FREQ                                             36000000
/* GPIO defines for channel 1 */
#define GPIO_PWM_R_C1_PORT                                                 GPIOA
#define GPIO_PWM_R_C1_PIN                                         DL_GPIO_PIN_31
#define GPIO_PWM_R_C1_IOMUX                                       (IOMUX_PINCM6)
#define GPIO_PWM_R_C1_IOMUX_FUNC                     IOMUX_PINCM6_PF_TIMG12_CCP1
#define GPIO_PWM_R_C1_IDX                                    DL_TIMER_CC_1_INDEX



/* Defines for HALLTIMER */
#define HALLTIMER_INST                                                   (TIMG6)
#define HALLTIMER_INST_IRQHandler                               TIMG6_IRQHandler
#define HALLTIMER_INST_INT_IRQN                                 (TIMG6_INT_IRQn)
#define HALLTIMER_INST_LOAD_VALUE                                       (60011U)
/* Defines for HALL_CNT */
#define HALL_CNT_INST                                                    (TIMG0)
#define HALL_CNT_INST_IRQHandler                                TIMG0_IRQHandler
#define HALL_CNT_INST_INT_IRQN                                  (TIMG0_INT_IRQn)
#define HALL_CNT_INST_LOAD_VALUE                                         (1079U)



/* Defines for UART_HMI */
#define UART_HMI_INST                                                      UART0
#define UART_HMI_INST_IRQHandler                                UART0_IRQHandler
#define UART_HMI_INST_INT_IRQN                                    UART0_INT_IRQn
#define GPIO_UART_HMI_RX_PORT                                              GPIOA
#define GPIO_UART_HMI_TX_PORT                                              GPIOA
#define GPIO_UART_HMI_RX_PIN                                       DL_GPIO_PIN_1
#define GPIO_UART_HMI_TX_PIN                                       DL_GPIO_PIN_0
#define GPIO_UART_HMI_IOMUX_RX                                    (IOMUX_PINCM2)
#define GPIO_UART_HMI_IOMUX_TX                                    (IOMUX_PINCM1)
#define GPIO_UART_HMI_IOMUX_RX_FUNC                     IOMUX_PINCM2_PF_UART0_RX
#define GPIO_UART_HMI_IOMUX_TX_FUNC                     IOMUX_PINCM1_PF_UART0_TX
#define UART_HMI_BAUD_RATE                                                (9600)
#define UART_HMI_IBRD_36_MHZ_9600_BAUD                                     (234)
#define UART_HMI_FBRD_36_MHZ_9600_BAUD                                      (24)





/* Defines for ADC12_0 */
#define ADC12_0_INST                                                        ADC0
#define ADC12_0_INST_IRQHandler                                  ADC0_IRQHandler
#define ADC12_0_INST_INT_IRQN                                    (ADC0_INT_IRQn)
#define ADC12_0_ADCMEM_0                                      DL_ADC12_MEM_IDX_0
#define ADC12_0_ADCMEM_0_REF                     DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_0_ADCMEM_0_REF_VOLTAGE_V                                       3.3
#define ADC12_0_ADCMEM_1                                      DL_ADC12_MEM_IDX_1
#define ADC12_0_ADCMEM_1_REF                     DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_0_ADCMEM_1_REF_VOLTAGE_V                                       3.3
#define ADC12_0_ADCMEM_2                                      DL_ADC12_MEM_IDX_2
#define ADC12_0_ADCMEM_2_REF                     DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_0_ADCMEM_2_REF_VOLTAGE_V                                       3.3
#define ADC12_0_ADCMEM_3                                      DL_ADC12_MEM_IDX_3
#define ADC12_0_ADCMEM_3_REF                     DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_0_ADCMEM_3_REF_VOLTAGE_V                                       3.3
#define ADC12_0_ADCMEM_4                                      DL_ADC12_MEM_IDX_4
#define ADC12_0_ADCMEM_4_REF                     DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_0_ADCMEM_4_REF_VOLTAGE_V                                       3.3
#define ADC12_0_INST_SUB_CH                                                 (12)
#define GPIO_ADC12_0_C6_PORT                                               GPIOB
#define GPIO_ADC12_0_C6_PIN                                       DL_GPIO_PIN_20
#define GPIO_ADC12_0_C0_PORT                                               GPIOA
#define GPIO_ADC12_0_C0_PIN                                       DL_GPIO_PIN_27

/* Defines for ADC12_1 */
#define ADC12_1_INST                                                        ADC1
#define ADC12_1_INST_IRQHandler                                  ADC1_IRQHandler
#define ADC12_1_INST_INT_IRQN                                    (ADC1_INT_IRQn)
#define ADC12_1_ADCMEM_0                                      DL_ADC12_MEM_IDX_0
#define ADC12_1_ADCMEM_0_REF                     DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_1_ADCMEM_0_REF_VOLTAGE_V                                       3.3
#define ADC12_1_ADCMEM_1                                      DL_ADC12_MEM_IDX_1
#define ADC12_1_ADCMEM_1_REF                     DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_1_ADCMEM_1_REF_VOLTAGE_V                                       3.3
#define ADC12_1_ADCMEM_2                                      DL_ADC12_MEM_IDX_2
#define ADC12_1_ADCMEM_2_REF                     DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_1_ADCMEM_2_REF_VOLTAGE_V                                       3.3
#define ADC12_1_ADCMEM_3                                      DL_ADC12_MEM_IDX_3
#define ADC12_1_ADCMEM_3_REF                     DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_1_ADCMEM_3_REF_VOLTAGE_V                                       3.3
#define ADC12_1_ADCMEM_4                                      DL_ADC12_MEM_IDX_4
#define ADC12_1_ADCMEM_4_REF                     DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_1_ADCMEM_4_REF_VOLTAGE_V                                       3.3
#define ADC12_1_INST_SUB_CH                                                 (12)
#define GPIO_ADC12_1_C6_PORT                                               GPIOB
#define GPIO_ADC12_1_C6_PIN                                       DL_GPIO_PIN_19
#define GPIO_ADC12_1_C5_PORT                                               GPIOB
#define GPIO_ADC12_1_C5_PIN                                       DL_GPIO_PIN_18
#define GPIO_ADC12_1_C4_PORT                                               GPIOB
#define GPIO_ADC12_1_C4_PIN                                       DL_GPIO_PIN_17
#define GPIO_ADC12_1_C7_PORT                                               GPIOA
#define GPIO_ADC12_1_C7_PIN                                       DL_GPIO_PIN_21



/* Defines for COMP_0 */
#define COMP_0_INST                                                        COMP1
#define COMP_0_INST_INT_IRQN                                      COMP1_INT_IRQn

/* Defines for COMP_0 DACCODE0 */
#define COMP_0_DACCODE0                                                    (153)


/* Defines for COMP_FLEDCHECK */
#define COMP_FLEDCHECK_INST                                                COMP0
#define COMP_FLEDCHECK_INST_INT_IRQN                              COMP0_INT_IRQn

/* Defines for COMP_FLEDCHECK DACCODE0 */
#define COMP_FLEDCHECK_DACCODE0                                             (15)


/* GPIO configuration for COMP_0 */
#define GPIO_COMP_0_IN1P_PORT                                            (GPIOB)
#define GPIO_COMP_0_IN1P_PIN                                    (DL_GPIO_PIN_24)
#define GPIO_COMP_0_IOMUX_IN1P                                   (IOMUX_PINCM52)
#define GPIO_COMP_0_IOMUX_IN1P_FUNC               (IOMUX_PINCM52_PF_UNCONNECTED)


/* GPIO configuration for COMP_FLEDCHECK */
#define GPIO_COMP_FLEDCHECK_IN0P_PORT                                    (GPIOA)
#define GPIO_COMP_FLEDCHECK_IN0P_PIN                            (DL_GPIO_PIN_26)
#define GPIO_COMP_FLEDCHECK_IOMUX_IN0P                           (IOMUX_PINCM59)
#define GPIO_COMP_FLEDCHECK_IOMUX_IN0P_FUNC       (IOMUX_PINCM59_PF_UNCONNECTED)




/* Defines for OPA_BPHASE */
#define OPA_BPHASE_INST                                                     OPA1
#define GPIO_OPA_BPHASE_IN1POS_PORT                                        GPIOA
#define GPIO_OPA_BPHASE_IN1POS_PIN                                DL_GPIO_PIN_18
#define GPIO_OPA_BPHASE_IOMUX_IN1POS                             (IOMUX_PINCM40)
#define GPIO_OPA_BPHASE_IOMUX_IN1POS_FUNC           IOMUX_PINCM40_PF_UNCONNECTED
#define GPIO_OPA_BPHASE_IN1NEG_PORT                                        GPIOA
#define GPIO_OPA_BPHASE_IN1NEG_PIN                                DL_GPIO_PIN_17
#define GPIO_OPA_BPHASE_IOMUX_IN1NEG                             (IOMUX_PINCM39)
#define GPIO_OPA_BPHASE_IOMUX_IN1NEG_FUNC           IOMUX_PINCM39_PF_UNCONNECTED
#define GPIO_OPA_BPHASE_OUT_PORT                                           GPIOA
#define GPIO_OPA_BPHASE_OUT_PIN                                   DL_GPIO_PIN_16
#define GPIO_OPA_BPHASE_IOMUX_OUT                                (IOMUX_PINCM38)
#define GPIO_OPA_BPHASE_IOMUX_OUT_FUNC              IOMUX_PINCM38_PF_UNCONNECTED
/* Defines for OPA_CPHASE */
#define OPA_CPHASE_INST                                                     OPA0
#define GPIO_OPA_CPHASE_IN1POS_PORT                                        GPIOA
#define GPIO_OPA_CPHASE_IN1POS_PIN                                DL_GPIO_PIN_25
#define GPIO_OPA_CPHASE_IOMUX_IN1POS                             (IOMUX_PINCM55)
#define GPIO_OPA_CPHASE_IOMUX_IN1POS_FUNC           IOMUX_PINCM55_PF_UNCONNECTED
#define GPIO_OPA_CPHASE_IN1NEG_PORT                                        GPIOA
#define GPIO_OPA_CPHASE_IN1NEG_PIN                                DL_GPIO_PIN_24
#define GPIO_OPA_CPHASE_IOMUX_IN1NEG                             (IOMUX_PINCM54)
#define GPIO_OPA_CPHASE_IOMUX_IN1NEG_FUNC           IOMUX_PINCM54_PF_UNCONNECTED
#define GPIO_OPA_CPHASE_OUT_PORT                                           GPIOA
#define GPIO_OPA_CPHASE_OUT_PIN                                   DL_GPIO_PIN_22
#define GPIO_OPA_CPHASE_IOMUX_OUT                                (IOMUX_PINCM47)
#define GPIO_OPA_CPHASE_IOMUX_OUT_FUNC              IOMUX_PINCM47_PF_UNCONNECTED



/* Port definition for Pin Group OUTPUT */
#define OUTPUT_PORT                                                      (GPIOA)

/* Defines for POWER_EN: GPIOA.23 with pinCMx 53 on package pin 43 */
#define OUTPUT_POWER_EN_PIN                                     (DL_GPIO_PIN_23)
#define OUTPUT_POWER_EN_IOMUX                                    (IOMUX_PINCM53)
/* Port definition for Pin Group INPUT */
#define INPUT_PORT                                                       (GPIOA)

/* Defines for BREAK: GPIOA.28 with pinCMx 3 on package pin 3 */
#define INPUT_BREAK_PIN                                         (DL_GPIO_PIN_28)
#define INPUT_BREAK_IOMUX                                         (IOMUX_PINCM3)
/* Defines for Cadence_in: GPIOA.9 with pinCMx 20 on package pin 17 */
#define INPUT_Cadence_in_PIN                                     (DL_GPIO_PIN_9)
#define INPUT_Cadence_in_IOMUX                                   (IOMUX_PINCM20)
/* Defines for HALLA: GPIOA.8 with pinCMx 19 on package pin 16 */
#define HALL_HALLA_PORT                                                  (GPIOA)
// groups represented: ["LIGHT_DETECT","HALL"]
// pins affected: ["LEFT","HALLA"]
#define GPIO_MULTIPLE_GPIOA_INT_IRQN                            (GPIOA_INT_IRQn)
#define GPIO_MULTIPLE_GPIOA_INT_IIDX            (DL_INTERRUPT_GROUP1_IIDX_GPIOA)
#define HALL_HALLA_IIDX                                      (DL_GPIO_IIDX_DIO8)
#define HALL_HALLA_PIN                                           (DL_GPIO_PIN_8)
#define HALL_HALLA_IOMUX                                         (IOMUX_PINCM19)
/* Defines for HALLB: GPIOB.3 with pinCMx 16 on package pin 15 */
#define HALL_HALLB_PORT                                                  (GPIOB)
// groups represented: ["LIGHT_DETECT","HALL"]
// pins affected: ["BACK","RIGHT","HALLB","HALLC"]
#define GPIO_MULTIPLE_GPIOB_INT_IRQN                            (GPIOB_INT_IRQn)
#define GPIO_MULTIPLE_GPIOB_INT_IIDX            (DL_INTERRUPT_GROUP1_IIDX_GPIOB)
#define HALL_HALLB_IIDX                                      (DL_GPIO_IIDX_DIO3)
#define HALL_HALLB_PIN                                           (DL_GPIO_PIN_3)
#define HALL_HALLB_IOMUX                                         (IOMUX_PINCM16)
/* Defines for HALLC: GPIOB.2 with pinCMx 15 on package pin 14 */
#define HALL_HALLC_PORT                                                  (GPIOB)
#define HALL_HALLC_IIDX                                      (DL_GPIO_IIDX_DIO2)
#define HALL_HALLC_PIN                                           (DL_GPIO_PIN_2)
#define HALL_HALLC_IOMUX                                         (IOMUX_PINCM15)
/* Defines for BACK: GPIOB.15 with pinCMx 32 on package pin 25 */
#define LIGHT_DETECT_BACK_PORT                                           (GPIOB)
#define LIGHT_DETECT_BACK_IIDX                              (DL_GPIO_IIDX_DIO15)
#define LIGHT_DETECT_BACK_PIN                                   (DL_GPIO_PIN_15)
#define LIGHT_DETECT_BACK_IOMUX                                  (IOMUX_PINCM32)
/* Defines for RIGHT: GPIOB.8 with pinCMx 25 on package pin 22 */
#define LIGHT_DETECT_RIGHT_PORT                                          (GPIOB)
#define LIGHT_DETECT_RIGHT_IIDX                              (DL_GPIO_IIDX_DIO8)
#define LIGHT_DETECT_RIGHT_PIN                                   (DL_GPIO_PIN_8)
#define LIGHT_DETECT_RIGHT_IOMUX                                 (IOMUX_PINCM25)
/* Defines for LEFT: GPIOA.3 with pinCMx 8 on package pin 9 */
#define LIGHT_DETECT_LEFT_PORT                                           (GPIOA)
#define LIGHT_DETECT_LEFT_IIDX                               (DL_GPIO_IIDX_DIO3)
#define LIGHT_DETECT_LEFT_PIN                                    (DL_GPIO_PIN_3)
#define LIGHT_DETECT_LEFT_IOMUX                                   (IOMUX_PINCM8)
/* Port definition for Pin Group GPIO_12V6 */
#define GPIO_12V6_PORT                                                   (GPIOA)

/* Defines for PIN_EN: GPIOA.20 with pinCMx 42 on package pin 35 */
#define GPIO_12V6_PIN_EN_PIN                                    (DL_GPIO_PIN_20)
#define GPIO_12V6_PIN_EN_IOMUX                                   (IOMUX_PINCM42)
/* Defines for PIN_SEL: GPIOA.19 with pinCMx 41 on package pin 34 */
#define GPIO_12V6_PIN_SEL_PIN                                   (DL_GPIO_PIN_19)
#define GPIO_12V6_PIN_SEL_IOMUX                                  (IOMUX_PINCM41)





/* Defines for DAC12 */
#define DAC12_IRQHandler                                         DAC0_IRQHandler
#define DAC12_INT_IRQN                                           (DAC0_INT_IRQn)
#define GPIO_DAC12_OUT_PORT                                                GPIOA
#define GPIO_DAC12_OUT_PIN                                        DL_GPIO_PIN_15
#define GPIO_DAC12_IOMUX_OUT                                     (IOMUX_PINCM37)
#define GPIO_DAC12_IOMUX_OUT_FUNC                   IOMUX_PINCM37_PF_UNCONNECTED


/* Defines for WWDT */
#define WWDT0_INST                                                       (WWDT0)
#define WWDT0_INT_IRQN                                          (WWDT0_INT_IRQn)





/* Defines for MCAN0 */
#define MCAN0_INST                                                        CANFD0
#define GPIO_MCAN0_CAN_TX_PORT                                             GPIOA
#define GPIO_MCAN0_CAN_TX_PIN                                     DL_GPIO_PIN_12
#define GPIO_MCAN0_IOMUX_CAN_TX                                  (IOMUX_PINCM34)
#define GPIO_MCAN0_IOMUX_CAN_TX_FUNC               IOMUX_PINCM34_PF_CANFD0_CANTX
#define GPIO_MCAN0_CAN_RX_PORT                                             GPIOA
#define GPIO_MCAN0_CAN_RX_PIN                                     DL_GPIO_PIN_13
#define GPIO_MCAN0_IOMUX_CAN_RX                                  (IOMUX_PINCM35)
#define GPIO_MCAN0_IOMUX_CAN_RX_FUNC               IOMUX_PINCM35_PF_CANFD0_CANRX
#define MCAN0_INST_IRQHandler                                 CANFD0_IRQHandler
#define MCAN0_INST_INT_IRQN                                     CANFD0_INT_IRQn


/* Defines for MCAN0 MCAN RAM configuration */
#define MCAN0_INST_MCAN_STD_ID_FILT_START_ADDR     (0)
#define MCAN0_INST_MCAN_STD_ID_FILTER_NUM          (0)
#define MCAN0_INST_MCAN_EXT_ID_FILT_START_ADDR     (0)
#define MCAN0_INST_MCAN_EXT_ID_FILTER_NUM          (0)
#define MCAN0_INST_MCAN_TX_BUFF_START_ADDR         (0)
#define MCAN0_INST_MCAN_TX_BUFF_SIZE               (0)
#define MCAN0_INST_MCAN_FIFO_1_START_ADDR          (0)
#define MCAN0_INST_MCAN_FIFO_1_NUM                 (32)
#define MCAN0_INST_MCAN_TX_EVENT_START_ADDR        (0)
#define MCAN0_INST_MCAN_TX_EVENT_SIZE              (32)
#define MCAN0_INST_MCAN_EXT_ID_AND_MASK            (0x1FFFFFFFU)
#define MCAN0_INST_MCAN_RX_BUFF_START_ADDR         (0)
#define MCAN0_INST_MCAN_FIFO_0_START_ADDR          (0)
#define MCAN0_INST_MCAN_FIFO_0_NUM                 (32)

#define MCAN0_INST_MCAN_INTERRUPTS (DL_MCAN_INTERRUPT_RF0N | \
						DL_MCAN_INTERRUPT_TC | \
						DL_MCAN_INTERRUPT_TEFN)



/* clang-format on */

void SYSCFG_DL_init(void);
void SYSCFG_DL_initPower(void);
void SYSCFG_DL_GPIO_init(void);
void SYSCFG_DL_DEBUG_init(void);
void SYSCFG_DL_SYSCTL_init(void);
void SYSCFG_DL_MOTOR_PWM_init(void);
void SYSCFG_DL_PWM_F_init(void);
void SYSCFG_DL_PWM_B_L_init(void);
void SYSCFG_DL_PWM_R_init(void);
void SYSCFG_DL_HALLTIMER_init(void);
void SYSCFG_DL_HALL_CNT_init(void);
void SYSCFG_DL_UART_HMI_init(void);
void SYSCFG_DL_ADC12_0_init(void);
void SYSCFG_DL_ADC12_1_init(void);
void SYSCFG_DL_COMP_0_init(void);
void SYSCFG_DL_COMP_FLEDCHECK_init(void);
void SYSCFG_DL_OPA_BPHASE_init(void);
void SYSCFG_DL_OPA_CPHASE_init(void);

void SYSCFG_DL_SYSTICK_init(void);
void SYSCFG_DL_DAC12_init(void);
void SYSCFG_DL_WWDT0_init(void);

void SYSCFG_DL_MCAN0_init(void);

bool SYSCFG_DL_saveConfiguration(void);
bool SYSCFG_DL_restoreConfiguration(void);

#ifdef __cplusplus
}
#endif

#endif /* ti_msp_dl_config_h */