stm32f1xx_it.c 8.7 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_it.c
  4. * @brief Interrupt Service Routines.
  5. ******************************************************************************
  6. *
  7. * COPYRIGHT(c) 2019 STMicroelectronics
  8. *
  9. * Redistribution and use in source and binary forms, with or without modification,
  10. * are permitted provided that the following conditions are met:
  11. * 1. Redistributions of source code must retain the above copyright notice,
  12. * this list of conditions and the following disclaimer.
  13. * 2. Redistributions in binary form must reproduce the above copyright notice,
  14. * this list of conditions and the following disclaimer in the documentation
  15. * and/or other materials provided with the distribution.
  16. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  17. * may be used to endorse or promote products derived from this software
  18. * without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  21. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  23. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  24. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  25. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  26. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  27. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  28. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  29. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30. *
  31. ******************************************************************************
  32. */
  33. /* Includes ------------------------------------------------------------------*/
  34. #include "stm32f1xx_hal.h"
  35. #include "stm32f1xx.h"
  36. #include "stm32f1xx_it.h"
  37. /* USER CODE BEGIN 0 */
  38. #include "usart.h"
  39. #include "power12V_driver.h"
  40. #include "motor_control.h"
  41. #include "gpio.h"
  42. #include "tim.h"
  43. #include "main.h"
  44. /* USER CODE END 0 */
  45. /* External variables --------------------------------------------------------*/
  46. extern DMA_HandleTypeDef hdma_adc1;
  47. extern CAN_HandleTypeDef hcan;
  48. extern UART_HandleTypeDef huart3;
  49. extern ADC_HandleTypeDef hadc1;
  50. extern ADC_HandleTypeDef hadc2;
  51. extern TIM_HandleTypeDef htim1;
  52. extern TIM_HandleTypeDef htim3;
  53. extern TIM_HandleTypeDef htim4;
  54. /******************************************************************************/
  55. /* Cortex-M3 Processor Interruption and Exception Handlers */
  56. /******************************************************************************/
  57. /**
  58. * @brief This function handles Non maskable interrupt.
  59. */
  60. void NMI_Handler(void)
  61. {
  62. /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  63. /* USER CODE END NonMaskableInt_IRQn 0 */
  64. /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  65. /* USER CODE END NonMaskableInt_IRQn 1 */
  66. }
  67. /**
  68. * @brief This function handles Hard fault interrupt.
  69. */
  70. void HardFault_Handler(void)
  71. {
  72. /* USER CODE BEGIN HardFault_IRQn 0 */
  73. /* USER CODE END HardFault_IRQn 0 */
  74. while (1)
  75. {
  76. /* USER CODE BEGIN W1_HardFault_IRQn 0 */
  77. MC_MotorStop(&MC_StarFlag);
  78. Power12V_Driver_Process(RESET);
  79. Disable_PwmGpio_Out();
  80. /* USER CODE END W1_HardFault_IRQn 0 */
  81. }
  82. /* USER CODE BEGIN HardFault_IRQn 1 */
  83. /* USER CODE END HardFault_IRQn 1 */
  84. }
  85. /**
  86. * @brief This function handles Memory management fault.
  87. */
  88. void MemManage_Handler(void)
  89. {
  90. /* USER CODE BEGIN MemoryManagement_IRQn 0 */
  91. /* USER CODE END MemoryManagement_IRQn 0 */
  92. while (1)
  93. {
  94. /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
  95. /* USER CODE END W1_MemoryManagement_IRQn 0 */
  96. }
  97. /* USER CODE BEGIN MemoryManagement_IRQn 1 */
  98. /* USER CODE END MemoryManagement_IRQn 1 */
  99. }
  100. /**
  101. * @brief This function handles Prefetch fault, memory access fault.
  102. */
  103. void BusFault_Handler(void)
  104. {
  105. /* USER CODE BEGIN BusFault_IRQn 0 */
  106. /* USER CODE END BusFault_IRQn 0 */
  107. while (1)
  108. {
  109. /* USER CODE BEGIN W1_BusFault_IRQn 0 */
  110. /* USER CODE END W1_BusFault_IRQn 0 */
  111. }
  112. /* USER CODE BEGIN BusFault_IRQn 1 */
  113. /* USER CODE END BusFault_IRQn 1 */
  114. }
  115. /**
  116. * @brief This function handles Undefined instruction or illegal state.
  117. */
  118. void UsageFault_Handler(void)
  119. {
  120. /* USER CODE BEGIN UsageFault_IRQn 0 */
  121. /* USER CODE END UsageFault_IRQn 0 */
  122. while (1)
  123. {
  124. /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
  125. /* USER CODE END W1_UsageFault_IRQn 0 */
  126. }
  127. /* USER CODE BEGIN UsageFault_IRQn 1 */
  128. /* USER CODE END UsageFault_IRQn 1 */
  129. }
  130. /**
  131. * @brief This function handles System service call via SWI instruction.
  132. */
  133. void SVC_Handler(void)
  134. {
  135. /* USER CODE BEGIN SVCall_IRQn 0 */
  136. /* USER CODE END SVCall_IRQn 0 */
  137. /* USER CODE BEGIN SVCall_IRQn 1 */
  138. /* USER CODE END SVCall_IRQn 1 */
  139. }
  140. /**
  141. * @brief This function handles Debug monitor.
  142. */
  143. void DebugMon_Handler(void)
  144. {
  145. /* USER CODE BEGIN DebugMonitor_IRQn 0 */
  146. /* USER CODE END DebugMonitor_IRQn 0 */
  147. /* USER CODE BEGIN DebugMonitor_IRQn 1 */
  148. /* USER CODE END DebugMonitor_IRQn 1 */
  149. }
  150. /**
  151. * @brief This function handles Pendable request for system service.
  152. */
  153. void PendSV_Handler(void)
  154. {
  155. /* USER CODE BEGIN PendSV_IRQn 0 */
  156. /* USER CODE END PendSV_IRQn 0 */
  157. /* USER CODE BEGIN PendSV_IRQn 1 */
  158. /* USER CODE END PendSV_IRQn 1 */
  159. }
  160. /**
  161. * @brief This function handles System tick timer.
  162. */
  163. void SysTick_Handler(void)
  164. {
  165. /* USER CODE BEGIN SysTick_IRQn 0 */
  166. /* USER CODE END SysTick_IRQn 0 */
  167. HAL_IncTick();
  168. HAL_SYSTICK_IRQHandler();
  169. /* USER CODE BEGIN SysTick_IRQn 1 */
  170. TimeBase_10ms++;
  171. /* USER CODE END SysTick_IRQn 1 */
  172. }
  173. /******************************************************************************/
  174. /* STM32F1xx Peripheral Interrupt Handlers */
  175. /* Add here the Interrupt Handlers for the used peripherals. */
  176. /* For the available peripheral interrupt handler names, */
  177. /* please refer to the startup file (startup_stm32f1xx.s). */
  178. /******************************************************************************/
  179. /**
  180. * @brief This function handles EXTI line2 interrupt.
  181. */
  182. void EXTI2_IRQHandler(void)
  183. {
  184. /* USER CODE BEGIN EXTI2_IRQn 0 */
  185. /* USER CODE END EXTI2_IRQn 0 */
  186. HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
  187. /* USER CODE BEGIN EXTI2_IRQn 1 */
  188. /* USER CODE END EXTI2_IRQn 1 */
  189. }
  190. /**
  191. * @brief This function handles DMA1 channel1 global interrupt.
  192. */
  193. void DMA1_Channel1_IRQHandler(void)
  194. {
  195. /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
  196. /* USER CODE END DMA1_Channel1_IRQn 0 */
  197. HAL_DMA_IRQHandler(&hdma_adc1);
  198. /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
  199. /* USER CODE END DMA1_Channel1_IRQn 1 */
  200. }
  201. /**
  202. * @brief This function handles ADC1 and ADC2 global interrupts.
  203. */
  204. void ADC1_2_IRQHandler(void)
  205. {
  206. /* USER CODE BEGIN ADC1_2_IRQn 0 */
  207. /* USER CODE END ADC1_2_IRQn 0 */
  208. // HAL_ADC_IRQHandler(&hadc1);
  209. HAL_ADC_IRQHandler(&hadc2);
  210. /* USER CODE BEGIN ADC1_2_IRQn 1 */
  211. /* USER CODE END ADC1_2_IRQn 1 */
  212. }
  213. /**
  214. * @brief This function handles TIM1 update interrupt.
  215. */
  216. void TIM1_UP_IRQHandler(void)
  217. {
  218. /* USER CODE BEGIN TIM1_UP_IRQn 0 */
  219. /* USER CODE END TIM1_UP_IRQn 0 */
  220. HAL_TIM_IRQHandler(&htim1);
  221. /* USER CODE BEGIN TIM1_UP_IRQn 1 */
  222. /* USER CODE END TIM1_UP_IRQn 1 */
  223. }
  224. /**
  225. * @brief This function handles TIM3 global interrupt.
  226. */
  227. void TIM4_IRQHandler(void)
  228. {
  229. /* USER CODE BEGIN TIM3_IRQn 0 */
  230. /* USER CODE END TIM3_IRQn 0 */
  231. //HAL_TIM_IRQHandler(&htim4);
  232. TIM4_Update_Isr();
  233. /* USER CODE BEGIN TIM3_IRQn 1 */
  234. /* USER CODE END TIM3_IRQn 1 */
  235. }
  236. /**
  237. * @brief This function handles USB low priority or CAN RX0 interrupts.
  238. */
  239. void USB_LP_CAN1_RX0_IRQHandler(void)
  240. {
  241. /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
  242. /* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
  243. HAL_CAN_IRQHandler(&hcan);
  244. /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
  245. /* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
  246. }
  247. /**
  248. * @brief This function handles USART1 global interrupt.
  249. */
  250. void USART3_IRQHandler(void)
  251. {
  252. /* USER CODE BEGIN USART1_IRQn 0 */
  253. USARTx_Rx_IRQ(&UART_RxBuff_Struct3);
  254. USARTx_Tx_IRQ(&UART_TxBuff_Struct3);
  255. /* USER CODE END USART1_IRQn 0 */
  256. HAL_UART_IRQHandler(&huart3);
  257. /* USER CODE BEGIN USART1_IRQn 1 */
  258. /* USER CODE END USART1_IRQn 1 */
  259. }
  260. /**
  261. * @brief This function handles EXTI line[15:10] interrupts.
  262. */
  263. void EXTI15_10_IRQHandler(void)
  264. {
  265. /* USER CODE BEGIN EXTI15_10_IRQn 0 */
  266. /* USER CODE END EXTI15_10_IRQn 0 */
  267. HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_12);
  268. /* USER CODE BEGIN EXTI15_10_IRQn 1 */
  269. /* USER CODE END EXTI15_10_IRQn 1 */
  270. }
  271. /* USER CODE BEGIN 1 */
  272. /* USER CODE END 1 */
  273. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/