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@@ -1,9 +1,11 @@
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#include "api_rt_pwm.h"
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#include "api_rt_dbg.h"
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+#include "api_rt_timer.h"
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#include "board_config.h"
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#include "gd32f30x.h"
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#include <stdint.h>
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#include "api_rt_adc.h"
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+#include "classB.h"
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ApiRtPwm_Handle Pwms[1];
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@@ -19,7 +21,19 @@ void iRtPwm_Init()
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Pwms[0].CompareValues[i] = HW_INIT_HHPWM_PERIOD;
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Pwms[0].ActiveCompareValues[i] = HW_INIT_HHPWM_PERIOD;
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}
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+ Pwms[0].CountZeroISR.Enable = 0;
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+ Pwms[0].CountZeroISR.Action = 0;
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+ Pwms[0].CountMaxISR.Enable = 0;
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+ Pwms[0].CountMaxISR.Action = 0;
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+ Pwms[0].BreakISR.Enable = 0;
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+ Pwms[0].BreakISR.Action = 0;
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Pwms[0].OutputEnable = 0;
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+ for (int i = 0; i < 4; i++)
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+ {
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+ Pwms[0].ChannelISR[i].Enable = 0;
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+ Pwms[0].ChannelISR[i].Action = 0;
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+ // Pwms[0].ChannelOutputEnable[i] = 0;
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+ }
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#if API_FUNCTION_PWM_SYNC_MULTI_SAMPLING
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Pwms[0].SyncSamplingEnable = 1;
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Pwms[0].SyncSamplingUpTickCount = 1;
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@@ -28,6 +42,107 @@ void iRtPwm_Init()
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Pwms[0].SyncSamplingDownTick[0] = HW_SAMPLE_BEFORE_UPDATE_CNTS;
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#endif
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+}
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+void iRtPwm_CountZeroIsr(uint8_t devIndex)
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+{
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+ if (Pwms[devIndex].CountZeroISR.Enable)
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+ {
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+ if (Pwms[devIndex].CountZeroISR.Action != 0)
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+ {
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+ Pwms[devIndex].CountZeroISR.Action();
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+ }
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+ }
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+}
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+
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+void iRtPwm_CountMaxIsr(uint8_t devIndex)
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+{
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+ if (Pwms[devIndex].CountMaxISR.Enable)
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+ {
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+ if (Pwms[devIndex].CountMaxISR.Action != 0)
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+ {
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+ Pwms[devIndex].CountMaxISR.Action();
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+ }
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+ }
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+}
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+
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+void iRtPwm_UpdateIsr(uint8_t devIndex)
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+{
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+ uint32_t base = Pwms[devIndex].PwmBase;
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+ uint32_t ulOvTimeCnt = 0;
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+
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+ if(TIMER_INTF(base) & TIMER_INT_FLAG_UP)
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+ {
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+ if((TIMER_CTL0(base) & TIMER_CTL0_DIR) == 0) // When Counting Up
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+ {
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+ /* TBC Up interrupt */
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+ iRtPwm_CountZeroIsr(devIndex);
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+ }
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+ else
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+ {
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+ /* Reset Timer6 counts*/
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+ iTimer_Reset(HW_PWMCNT_TIMER);
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+ /* TBC Down interrupt */
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+ iRtPwm_CountMaxIsr(devIndex);
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+
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+ /* Timing management, refer to the Software design description for details */
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+ while ((iTimer_GetCount(HW_PWMCNT_TIMER) < HW_INIT_PWM_PERIOD) && (ulOvTimeCnt < 10000))
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+ {
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+ ulOvTimeCnt++;
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+ };
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+
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+ /* ADC0 trigger set */
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+ iPwm_SetCompareValueImmediate(0,3,Pwms[0].SyncSamplingUpTick[1]);
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+ /* ADC Enable*/
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+ iAdc_Enable(0);
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+ /* Software trigger for regular sampling*/
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+ iAdc_Convert(0);
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+ /* Compara value load */
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+ iRtPwm_ActivateCompareValues(0);
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+ timer_dma_enable(base,TIMER_DMA_UPD);
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+ dma_channel_enable(DMA0,DMA_CH4);
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+ }
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+ }
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+ /* Timer0 update interrupt flag clear */
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+ TIMER_INTF(base) = ~(uint32_t)TIMER_INT_FLAG_UP;
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+}
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+
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+void iRtPwm_SyncSamplingAdcIsr(uint8_t devIndex)
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+{
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+
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+ if (ADC_STAT(ADC0) & ADC_INT_FLAG_EOIC)
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+ {
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+// adc_uwRdsonUReg = ADC_IDATA0(ADC0);
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+// adc_uwRdsonVReg = ADC_IDATA1(ADC0);
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+// adc_uwRdsonWReg = ADC_IDATA2(ADC0);
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+ Adcs[1].Results[HW_ADC_IA_CH] = ADC_IDATA0(ADC0);
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+ Adcs[1].Results[HW_ADC_IB_CH] = ADC_IDATA1(ADC0);
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+ Adcs[1].Results[HW_ADC_IC_CH] = ADC_IDATA2(ADC0);
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+
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+ /* ADC0 disable */
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+ ADC_CTL1(ADC0) &= ~((uint32_t)ADC_CTL1_ADCON);
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+ /* ADC1 trigger set */
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+ iPwm_SetCompareValueImmediate(0,3,Pwms[0].SyncSamplingUpTick[0]);
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+ /* ADC1 enable */
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+ ADC_CTL1(ADC1) |= (uint32_t)ADC_CTL1_ADCON;
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+ /* ADC0 interrupt flag clear */
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+ ADC_STAT(ADC0) &= ~((uint32_t)ADC_INT_FLAG_EOIC);
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+ }
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+ else if (ADC_STAT(ADC1) & ADC_INT_FLAG_EOIC)
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+ {
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+ if (Pwms[0].SyncSamplingUpTick[0] != HW_INIT_HHHPWM_PERIOD)
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+ {
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+ Adcs[2].Results[HW_ADC_IDC_CH] = ADC_IDATA0(ADC1);
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+ }
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+ /* ADC1 disable */
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+ ADC_CTL1(ADC1) &= ~((uint32_t)ADC_CTL1_ADCON);
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+ /* ADC1 interrupt flag clear */
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+ ADC_STAT(ADC1) &= ~((uint32_t)ADC_INT_FLAG_EOIC);
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+ }
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+ else
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+ {
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+ //do noting
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+ }
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+
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}
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void iRtPwm_ActivateCompareValues(uint8_t devIndex)
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@@ -39,6 +154,7 @@ void iRtPwm_ActivateCompareValues(uint8_t devIndex)
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}
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}
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+
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/* ========================================================================== */
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/* ============================== API Functions ============================= */
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/* ========================================================================== */
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@@ -420,108 +536,108 @@ void iPwm_DisableOutput(uint8_t devIndex)
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// // }
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// // }
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-//void iPwm_EnableDeviceInterrupt(uint8_t devIndex, ApiPwm_DeviceInterrupt interrupt)
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-//{
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-// ASSERT_LESS(devIndex, 1);
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-//
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-// switch (interrupt)
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-// {
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-// case ApiPwm_CountZeroInt:
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-// Pwms[devIndex].CountZeroISR.Enable = 1;
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-// break;
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-// case ApiPwm_CountMaxInt:
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-// Pwms[devIndex].CountMaxISR.Enable = 1;
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-// break;
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-// case ApiPwm_BreakInt:
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-// Pwms[devIndex].BreakISR.Enable = 1;
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-// break;
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-// default:
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-// break;
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-// }
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-//}
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-//
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-//void iPwm_DisableDeviceInterrupt(uint8_t devIndex, ApiPwm_DeviceInterrupt interrupt)
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-//{
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-// ASSERT_LESS(devIndex, 1);
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-//
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-// switch (interrupt)
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-// {
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-// case ApiPwm_CountZeroInt:
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-// Pwms[devIndex].CountZeroISR.Enable = 0;
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-// break;
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-// case ApiPwm_CountMaxInt:
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-// Pwms[devIndex].CountMaxISR.Enable = 0;
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-// break;
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-// case ApiPwm_BreakInt:
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-// Pwms[devIndex].BreakISR.Enable = 0;
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-// break;
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-// default:
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-// break;
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-// }
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-//}
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-//
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-//void iPwm_EnableChannelInterrupt(uint8_t devIndex, uint8_t channelIndex, ApiPwm_ChannelInterrupt interrupt)
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-//{
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-// ASSERT_LESS(devIndex, 1);
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-// ASSERT_LESS(channelIndex, 4);
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-//
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-// Pwms[devIndex].ChannelISR[channelIndex].Enable = 1;
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-//}
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-//
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-//void iPwm_DisableChannelInterrupt(uint8_t devIndex, uint8_t channelIndex, ApiPwm_ChannelInterrupt interrupt)
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-//{
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-// ASSERT_LESS(devIndex, 1);
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-// ASSERT_LESS(channelIndex, 4);
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-//
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-// Pwms[devIndex].ChannelISR[channelIndex].Enable = 0;
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-//}
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-//
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-//void iPwm_BindDeviceInterrupt(uint8_t devIndex, ApiPwm_DeviceInterrupt interrupt, void (*action)())
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-//{
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-// ASSERT_LESS(devIndex, 1);
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-//
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-// switch (interrupt)
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-// {
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-// case ApiPwm_CountZeroInt:
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-// Pwms[devIndex].CountZeroISR.Action = action;
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-// break;
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-// case ApiPwm_CountMaxInt:
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-// Pwms[devIndex].CountMaxISR.Action = action;
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-// break;
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-// case ApiPwm_BreakInt:
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-// Pwms[devIndex].BreakISR.Action = action;
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-// break;
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-// default:
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-// break;
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-// }
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-//}
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-//
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-//void iPwm_BindChannelInterrupt(uint8_t devIndex, uint8_t channelIndex, ApiPwm_DeviceInterrupt interrupt, void (*action)())
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-//{
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-// ASSERT_LESS(devIndex, 1);
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-// ASSERT_LESS(channelIndex, 4);
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-//
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-// Pwms[devIndex].ChannelISR[channelIndex].Action = action;
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-//}
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-//
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-//int8_t iPwm_GetBreakState(uint8_t devIndex)
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-//{
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-// ASSERT_LESS(devIndex, 1);
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-//
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-// TIM_TypeDef *base = Pwms[devIndex].PwmBase;
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-//
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-// return (base->SR & ((uint32_t)0x00000080UL)) ? 1 : 0;
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-//}
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-//
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-//void iPwm_ClearBreak(uint8_t devIndex)
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-//{
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-// ASSERT_LESS(devIndex, 1);
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-//
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-// TIM_TypeDef *base = Pwms[devIndex].PwmBase;
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-//
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-// base->SR &= ~((uint32_t)0x00000080UL);
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-//}
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-//
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+void iPwm_EnableDeviceInterrupt(uint8_t devIndex, ApiPwm_DeviceInterrupt interrupt)
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+{
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+ ASSERT_LESS(devIndex, 1);
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+
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+ switch (interrupt)
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+ {
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+ case ApiPwm_CountZeroInt:
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+ Pwms[devIndex].CountZeroISR.Enable = 1;
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+ break;
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+ case ApiPwm_CountMaxInt:
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+ Pwms[devIndex].CountMaxISR.Enable = 1;
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+ break;
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+ case ApiPwm_BreakInt:
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+ Pwms[devIndex].BreakISR.Enable = 1;
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+ break;
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+ default:
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+ break;
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+ }
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+}
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+
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+void iPwm_DisableDeviceInterrupt(uint8_t devIndex, ApiPwm_DeviceInterrupt interrupt)
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+{
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+ ASSERT_LESS(devIndex, 1);
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+
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+ switch (interrupt)
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+ {
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+ case ApiPwm_CountZeroInt:
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+ Pwms[devIndex].CountZeroISR.Enable = 0;
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+ break;
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+ case ApiPwm_CountMaxInt:
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+ Pwms[devIndex].CountMaxISR.Enable = 0;
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+ break;
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+ case ApiPwm_BreakInt:
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+ Pwms[devIndex].BreakISR.Enable = 0;
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+ break;
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+ default:
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+ break;
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+ }
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+}
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+
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+void iPwm_EnableChannelInterrupt(uint8_t devIndex, uint8_t channelIndex, ApiPwm_ChannelInterrupt interrupt)
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+{
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+ ASSERT_LESS(devIndex, 1);
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+ ASSERT_LESS(channelIndex, 4);
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+
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+ Pwms[devIndex].ChannelISR[channelIndex].Enable = 1;
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+}
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+
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+void iPwm_DisableChannelInterrupt(uint8_t devIndex, uint8_t channelIndex, ApiPwm_ChannelInterrupt interrupt)
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+{
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+ ASSERT_LESS(devIndex, 1);
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+ ASSERT_LESS(channelIndex, 4);
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+
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+ Pwms[devIndex].ChannelISR[channelIndex].Enable = 0;
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+}
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+
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+void iPwm_BindDeviceInterrupt(uint8_t devIndex, ApiPwm_DeviceInterrupt interrupt, void (*action)())
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+{
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+ ASSERT_LESS(devIndex, 1);
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+
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+ switch (interrupt)
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+ {
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+ case ApiPwm_CountZeroInt:
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+ Pwms[devIndex].CountZeroISR.Action = action;
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+ break;
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+ case ApiPwm_CountMaxInt:
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+ Pwms[devIndex].CountMaxISR.Action = action;
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+ break;
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+ case ApiPwm_BreakInt:
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+ Pwms[devIndex].BreakISR.Action = action;
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+ break;
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+ default:
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+ break;
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+ }
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+}
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+
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+void iPwm_BindChannelInterrupt(uint8_t devIndex, uint8_t channelIndex, ApiPwm_DeviceInterrupt interrupt, void (*action)())
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+{
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+ ASSERT_LESS(devIndex, 1);
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+ ASSERT_LESS(channelIndex, 4);
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+
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+ Pwms[devIndex].ChannelISR[channelIndex].Action = action;
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+}
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+
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+int8_t iPwm_GetBreakState(uint8_t devIndex)
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+{
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+ ASSERT_LESS(devIndex, 1);
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+
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+ uint32_t base = Pwms[devIndex].PwmBase;
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+
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+ return (TIMER_INTF(base) & ((uint32_t)0x00000080UL)) ? 1 : 0;
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+}
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+
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+void iPwm_ClearBreak(uint8_t devIndex)
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+{
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+ ASSERT_LESS(devIndex, 1);
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+
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+ uint32_t base = Pwms[devIndex].PwmBase;
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+
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+ TIMER_INTF(base) &= ~((uint32_t)0x00000080UL);
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+}
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+
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#if API_FUNCTION_PWM_SYNC_MULTI_SAMPLING
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void iPwm_EnableSyncMultiSampling(uint8_t devIndex)
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