|
@@ -3,9 +3,9 @@
|
|
|
//
|
|
|
// Code generated for Simulink model 'PmsmSimUt'.
|
|
|
//
|
|
|
-// Model version : 1.15
|
|
|
+// Model version : 1.18
|
|
|
// Simulink Coder version : 9.4 (R2020b) 29-Jul-2020
|
|
|
-// C/C++ source code generated on : Fri Jul 28 01:40:47 2023
|
|
|
+// C/C++ source code generated on : Tue Aug 1 23:42:37 2023
|
|
|
//
|
|
|
// Target selection: ert.tlc
|
|
|
// Embedded hardware selection: Intel->x86-64 (Windows64)
|
|
@@ -15,6 +15,17 @@
|
|
|
#include "PmsmSimUt.h"
|
|
|
#include "PmsmSimUt_private.h"
|
|
|
|
|
|
+void PmsmSimUtModelClass::PmsmSimUt_reset()
|
|
|
+{
|
|
|
+ // Outputs for Atomic SubSystem: '<Root>/Initialize Function'
|
|
|
+ // StateWriter: '<S2>/State Writer' incorporates:
|
|
|
+ // Constant: '<S2>/Constant4'
|
|
|
+
|
|
|
+ PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c = PmsmSimUt_P.Params.Flux;
|
|
|
+
|
|
|
+ // End of Outputs for SubSystem: '<Root>/Initialize Function'
|
|
|
+}
|
|
|
+
|
|
|
real_T rt_modd_snf(real_T u0, real_T u1)
|
|
|
{
|
|
|
real_T q;
|
|
@@ -59,6 +70,8 @@ void PmsmSimUtModelClass::step()
|
|
|
real_T rtb_Gain1_c[3];
|
|
|
real_T rtb_Add1;
|
|
|
real_T rtb_Add2;
|
|
|
+ real_T rtb_Add2_tmp_tmp;
|
|
|
+ real_T rtb_Add2_tmp_tmp_0;
|
|
|
real_T rtb_Fcn1;
|
|
|
real_T rtb_Gain;
|
|
|
real_T rtb_Gain1_i;
|
|
@@ -69,77 +82,75 @@ void PmsmSimUtModelClass::step()
|
|
|
real_T rtb_Switch_idx_0;
|
|
|
real_T rtb_Switch_idx_1;
|
|
|
real_T rtb_a;
|
|
|
- real_T rtb_a_tmp_tmp;
|
|
|
- real_T rtb_a_tmp_tmp_0;
|
|
|
real_T rtb_id;
|
|
|
real_T rtb_iq;
|
|
|
int32_T i;
|
|
|
uint8_T rtb_Compare;
|
|
|
|
|
|
- // Math: '<S17>/Mod' incorporates:
|
|
|
- // Constant: '<S17>/Constant'
|
|
|
- // DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
|
|
|
+ // Math: '<S18>/Mod' incorporates:
|
|
|
+ // Constant: '<S18>/Constant'
|
|
|
+ // DiscreteIntegrator: '<S18>/Discrete-Time Integrator'
|
|
|
|
|
|
rtb_Mod = rt_modd_snf(PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE,
|
|
|
PmsmSimUt_P.Constant_Value);
|
|
|
|
|
|
- // Fcn: '<S16>/id' incorporates:
|
|
|
- // Constant: '<S16>/Constant1'
|
|
|
- // Constant: '<S16>/Constant2'
|
|
|
- // DiscreteIntegrator: '<S16>/Discrete-Time Integrator'
|
|
|
-
|
|
|
- rtb_id = (PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c -
|
|
|
- PmsmSimUt_P.Params.Flux) / PmsmSimUt_P.Params.Ld;
|
|
|
-
|
|
|
- // Fcn: '<S16>/iq' incorporates:
|
|
|
- // Constant: '<S16>/Constant3'
|
|
|
- // DiscreteIntegrator: '<S16>/Discrete-Time Integrator1'
|
|
|
+ // Fcn: '<S17>/iq' incorporates:
|
|
|
+ // Constant: '<S17>/Constant3'
|
|
|
+ // DiscreteIntegrator: '<S17>/Discrete-Time Integrator1'
|
|
|
|
|
|
rtb_iq = PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE / PmsmSimUt_P.Params.Lq;
|
|
|
|
|
|
- // Outputs for Enabled SubSystem: '<S20>/Subsystem - pi//2 delay' incorporates:
|
|
|
- // EnablePort: '<S24>/Enable'
|
|
|
+ // Fcn: '<S17>/id' incorporates:
|
|
|
+ // Constant: '<S17>/Constant1'
|
|
|
+ // Constant: '<S17>/Constant2'
|
|
|
+ // DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
|
|
|
|
|
|
- // Outputs for Enabled SubSystem: '<S20>/Subsystem1' incorporates:
|
|
|
+ rtb_id = (PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c -
|
|
|
+ PmsmSimUt_P.Params.Flux) / PmsmSimUt_P.Params.Ld;
|
|
|
+
|
|
|
+ // Outputs for Enabled SubSystem: '<S21>/Subsystem - pi//2 delay' incorporates:
|
|
|
// EnablePort: '<S25>/Enable'
|
|
|
|
|
|
- // Fcn: '<S28>/Fcn' incorporates:
|
|
|
- // Fcn: '<S24>/Fcn'
|
|
|
- // Fcn: '<S24>/Fcn1'
|
|
|
+ // Outputs for Enabled SubSystem: '<S21>/Subsystem1' incorporates:
|
|
|
+ // EnablePort: '<S26>/Enable'
|
|
|
+
|
|
|
+ // Fcn: '<S29>/Fcn' incorporates:
|
|
|
// Fcn: '<S25>/Fcn'
|
|
|
+ // Fcn: '<S25>/Fcn1'
|
|
|
+ // Fcn: '<S26>/Fcn'
|
|
|
|
|
|
- rtb_a_tmp_tmp = std::sin(rtb_Mod);
|
|
|
- rtb_a_tmp_tmp_0 = std::cos(rtb_Mod);
|
|
|
+ rtb_Add2_tmp_tmp = std::sin(rtb_Mod);
|
|
|
+ rtb_Add2_tmp_tmp_0 = std::cos(rtb_Mod);
|
|
|
|
|
|
- // End of Outputs for SubSystem: '<S20>/Subsystem1'
|
|
|
- // End of Outputs for SubSystem: '<S20>/Subsystem - pi//2 delay'
|
|
|
- rtb_a = rtb_a_tmp_tmp_0 * rtb_id - rtb_a_tmp_tmp * rtb_iq;
|
|
|
+ // End of Outputs for SubSystem: '<S21>/Subsystem1'
|
|
|
+ // End of Outputs for SubSystem: '<S21>/Subsystem - pi//2 delay'
|
|
|
+ rtb_Add2 = rtb_Add2_tmp_tmp_0 * rtb_id - rtb_Add2_tmp_tmp * rtb_iq;
|
|
|
|
|
|
- // Fcn: '<S28>/Fcn1' incorporates:
|
|
|
- // Fcn: '<S28>/Fcn'
|
|
|
+ // Fcn: '<S29>/Fcn1' incorporates:
|
|
|
+ // Fcn: '<S29>/Fcn'
|
|
|
|
|
|
- rtb_Gain1_i = rtb_a_tmp_tmp * rtb_id + rtb_a_tmp_tmp_0 * rtb_iq;
|
|
|
+ rtb_a = rtb_Add2_tmp_tmp * rtb_id + rtb_Add2_tmp_tmp_0 * rtb_iq;
|
|
|
|
|
|
- // Gain: '<S29>/K1' incorporates:
|
|
|
- // Constant: '<S9>/Constant'
|
|
|
+ // Gain: '<S30>/K1' incorporates:
|
|
|
+ // Constant: '<S10>/Constant'
|
|
|
|
|
|
- rtb_Gain2_k = PmsmSimUt_P.K1_Gain * PmsmSimUt_P.Constant_Value_e;
|
|
|
+ rtb_Gain1_i = PmsmSimUt_P.K1_Gain * PmsmSimUt_P.Constant_Value_e;
|
|
|
|
|
|
- // Fcn: '<S29>/a'
|
|
|
- rtb_Add2 = rtb_a + rtb_Gain2_k;
|
|
|
+ // Fcn: '<S30>/a'
|
|
|
+ rtb_Gain2_k = rtb_Add2 + rtb_Gain1_i;
|
|
|
|
|
|
- // Fcn: '<S29>/b'
|
|
|
- rtb_Fcn1 = (-0.5 * rtb_a + 0.8660254037844386 * rtb_Gain1_i) + rtb_Gain2_k;
|
|
|
+ // Fcn: '<S30>/b'
|
|
|
+ rtb_Fcn1 = (-0.5 * rtb_Add2 + 0.8660254037844386 * rtb_a) + rtb_Gain1_i;
|
|
|
|
|
|
- // Fcn: '<S29>/c'
|
|
|
- rtb_a = (-0.5 * rtb_a - 0.8660254037844386 * rtb_Gain1_i) + rtb_Gain2_k;
|
|
|
+ // Fcn: '<S30>/c'
|
|
|
+ rtb_Add2 = (-0.5 * rtb_Add2 - 0.8660254037844386 * rtb_a) + rtb_Gain1_i;
|
|
|
|
|
|
// Outport: '<Root>/Out' incorporates:
|
|
|
- // Gain: '<S29>/K2'
|
|
|
+ // Gain: '<S30>/K2'
|
|
|
|
|
|
- PmsmSimUt_Y.Out.Iabc[0] = PmsmSimUt_P.K2_Gain * rtb_Add2;
|
|
|
+ PmsmSimUt_Y.Out.Iabc[0] = PmsmSimUt_P.K2_Gain * rtb_Gain2_k;
|
|
|
PmsmSimUt_Y.Out.Iabc[1] = PmsmSimUt_P.K2_Gain * rtb_Fcn1;
|
|
|
- PmsmSimUt_Y.Out.Iabc[2] = PmsmSimUt_P.K2_Gain * rtb_a;
|
|
|
+ PmsmSimUt_Y.Out.Iabc[2] = PmsmSimUt_P.K2_Gain * rtb_Add2;
|
|
|
|
|
|
// Switch: '<Root>/Switch2' incorporates:
|
|
|
// Inport: '<Root>/ObsIn'
|
|
@@ -152,8 +163,69 @@ void PmsmSimUtModelClass::step()
|
|
|
|
|
|
// End of Switch: '<Root>/Switch2'
|
|
|
|
|
|
- // RelationalOperator: '<S10>/Compare' incorporates:
|
|
|
- // Constant: '<S10>/Constant'
|
|
|
+ // Gain: '<S17>/Gain' incorporates:
|
|
|
+ // DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
|
|
|
+ // DiscreteIntegrator: '<S17>/Discrete-Time Integrator1'
|
|
|
+ // Fcn: '<S17>/Te//p=(3//2)*(Flux_d*iq-Flux_q*id)'
|
|
|
+
|
|
|
+ rtb_Gain = (PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c * rtb_iq -
|
|
|
+ PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE * rtb_id) * 1.5 *
|
|
|
+ PmsmSimUt_P.Params.Pn;
|
|
|
+
|
|
|
+ // Outputs for Enabled SubSystem: '<S18>/Subsystem' incorporates:
|
|
|
+ // EnablePort: '<S19>/Enable'
|
|
|
+
|
|
|
+ // Constant: '<Root>/Constant2'
|
|
|
+ if (PmsmSimUt_P.Params.SpdCtrl > 0.0) {
|
|
|
+ // DiscreteIntegrator: '<S19>/Discrete-Time Integrator1'
|
|
|
+ PmsmSimUt_B.DiscreteTimeIntegrator1 =
|
|
|
+ PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTAT_d;
|
|
|
+
|
|
|
+ // Update for DiscreteIntegrator: '<S19>/Discrete-Time Integrator1' incorporates:
|
|
|
+ // Constant: '<S19>/Constant1'
|
|
|
+ // Gain: '<S19>/Gain'
|
|
|
+ // Gain: '<S19>/Gain1'
|
|
|
+ // Inport: '<Root>/CtrlIn'
|
|
|
+ // Product: '<S19>/Divide'
|
|
|
+ // Sum: '<S19>/Sum'
|
|
|
+
|
|
|
+ PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTAT_d += ((rtb_Gain -
|
|
|
+ PmsmSimUt_P.Params.B * PmsmSimUt_B.DiscreteTimeIntegrator1) -
|
|
|
+ PmsmSimUt_U.CtrlIn.Tm) / PmsmSimUt_P.Params.Jm * PmsmSimUt_P.Params.Ts *
|
|
|
+ PmsmSimUt_P.DiscreteTimeIntegrator1_gainval;
|
|
|
+ }
|
|
|
+
|
|
|
+ // End of Outputs for SubSystem: '<S18>/Subsystem'
|
|
|
+
|
|
|
+ // Switch: '<S18>/Switch' incorporates:
|
|
|
+ // Constant: '<Root>/Constant2'
|
|
|
+ // Constant: '<Root>/Constant4'
|
|
|
+ // Gain: '<S18>/Gain3'
|
|
|
+
|
|
|
+ if (PmsmSimUt_P.Params.SpdCtrl > PmsmSimUt_P.Switch_Threshold) {
|
|
|
+ rtb_Gain2_k = PmsmSimUt_B.DiscreteTimeIntegrator1;
|
|
|
+ } else {
|
|
|
+ rtb_Gain2_k = PmsmSimUt_P.Gain3_Gain * PmsmSimUt_P.Params.SpdRpm;
|
|
|
+ }
|
|
|
+
|
|
|
+ // End of Switch: '<S18>/Switch'
|
|
|
+
|
|
|
+ // Gain: '<S18>/Gain1'
|
|
|
+ rtb_Gain1_i = PmsmSimUt_P.Params.Pn * rtb_Gain2_k;
|
|
|
+
|
|
|
+ // Switch: '<Root>/Switch3' incorporates:
|
|
|
+ // Inport: '<Root>/ObsIn'
|
|
|
+
|
|
|
+ if (PmsmSimUt_U.ObsIn.Enable > PmsmSimUt_P.Switch3_Threshold) {
|
|
|
+ rtb_a = PmsmSimUt_U.ObsIn.We;
|
|
|
+ } else {
|
|
|
+ rtb_a = rtb_Gain1_i;
|
|
|
+ }
|
|
|
+
|
|
|
+ // End of Switch: '<Root>/Switch3'
|
|
|
+
|
|
|
+ // RelationalOperator: '<S11>/Compare' incorporates:
|
|
|
+ // Constant: '<S11>/Constant'
|
|
|
// Constant: '<S1>/Constant'
|
|
|
|
|
|
rtb_Compare = (PmsmSimUt_P.AlphaBetaZerotodq0_Alignment ==
|
|
@@ -165,42 +237,42 @@ void PmsmSimUtModelClass::step()
|
|
|
rtb_Add2 = PmsmSimUt_U.ObsIn.Theta - rtb_Mod;
|
|
|
|
|
|
// Outputs for Enabled SubSystem: '<S1>/Subsystem1' incorporates:
|
|
|
- // EnablePort: '<S13>/Enable'
|
|
|
+ // EnablePort: '<S14>/Enable'
|
|
|
|
|
|
if (rtb_Compare > 0) {
|
|
|
- // Fcn: '<S13>/Fcn' incorporates:
|
|
|
- // Fcn: '<S13>/Fcn1'
|
|
|
+ // Fcn: '<S14>/Fcn' incorporates:
|
|
|
+ // Fcn: '<S14>/Fcn1'
|
|
|
|
|
|
- rtb_Gain1_i = std::sin(rtb_Add2);
|
|
|
- rtb_Add1 = std::cos(rtb_Add2);
|
|
|
+ rtb_Add1 = std::sin(rtb_Add2);
|
|
|
+ rtb_Switch_h = std::cos(rtb_Add2);
|
|
|
|
|
|
- // Fcn: '<S13>/Fcn'
|
|
|
- PmsmSimUt_B.Fcn_g = rtb_id * rtb_Add1 + rtb_iq * rtb_Gain1_i;
|
|
|
+ // Fcn: '<S14>/Fcn'
|
|
|
+ PmsmSimUt_B.Fcn_g = rtb_id * rtb_Switch_h + rtb_iq * rtb_Add1;
|
|
|
|
|
|
- // Fcn: '<S13>/Fcn1'
|
|
|
- PmsmSimUt_B.Fcn1_e = -rtb_id * rtb_Gain1_i + rtb_iq * rtb_Add1;
|
|
|
+ // Fcn: '<S14>/Fcn1'
|
|
|
+ PmsmSimUt_B.Fcn1_e = -rtb_id * rtb_Add1 + rtb_iq * rtb_Switch_h;
|
|
|
}
|
|
|
|
|
|
// End of Outputs for SubSystem: '<S1>/Subsystem1'
|
|
|
|
|
|
// Outputs for Enabled SubSystem: '<S1>/Subsystem - pi//2 delay' incorporates:
|
|
|
- // EnablePort: '<S12>/Enable'
|
|
|
+ // EnablePort: '<S13>/Enable'
|
|
|
|
|
|
- // RelationalOperator: '<S11>/Compare' incorporates:
|
|
|
- // Constant: '<S11>/Constant'
|
|
|
+ // RelationalOperator: '<S12>/Compare' incorporates:
|
|
|
+ // Constant: '<S12>/Constant'
|
|
|
// Constant: '<S1>/Constant'
|
|
|
|
|
|
if (PmsmSimUt_P.AlphaBetaZerotodq0_Alignment ==
|
|
|
PmsmSimUt_P.CompareToConstant1_const) {
|
|
|
- // Fcn: '<S12>/Fcn'
|
|
|
+ // Fcn: '<S13>/Fcn'
|
|
|
PmsmSimUt_B.Fcn_b = rtb_id * std::sin(rtb_Add2) - rtb_iq * std::cos(rtb_Add2);
|
|
|
|
|
|
- // Fcn: '<S12>/Fcn1'
|
|
|
+ // Fcn: '<S13>/Fcn1'
|
|
|
PmsmSimUt_B.Fcn1_n = rtb_id * std::cos(rtb_Add2) + rtb_iq * std::sin
|
|
|
(rtb_Add2);
|
|
|
}
|
|
|
|
|
|
- // End of RelationalOperator: '<S11>/Compare'
|
|
|
+ // End of RelationalOperator: '<S12>/Compare'
|
|
|
// End of Outputs for SubSystem: '<S1>/Subsystem - pi//2 delay'
|
|
|
|
|
|
// Switch: '<S1>/Switch'
|
|
@@ -225,67 +297,6 @@ void PmsmSimUtModelClass::step()
|
|
|
|
|
|
// End of Switch: '<Root>/Switch5'
|
|
|
|
|
|
- // Gain: '<S16>/Gain' incorporates:
|
|
|
- // DiscreteIntegrator: '<S16>/Discrete-Time Integrator'
|
|
|
- // DiscreteIntegrator: '<S16>/Discrete-Time Integrator1'
|
|
|
- // Fcn: '<S16>/Te//p=(3//2)*(Flux_d*iq-Flux_q*id)'
|
|
|
-
|
|
|
- rtb_Gain = (PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c * rtb_iq -
|
|
|
- PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE * rtb_id) * 1.5 *
|
|
|
- PmsmSimUt_P.Params.Pn;
|
|
|
-
|
|
|
- // Outputs for Enabled SubSystem: '<S17>/Subsystem' incorporates:
|
|
|
- // EnablePort: '<S18>/Enable'
|
|
|
-
|
|
|
- // Constant: '<Root>/Constant2'
|
|
|
- if (PmsmSimUt_P.Params.SpdCtrl > 0.0) {
|
|
|
- // DiscreteIntegrator: '<S18>/Discrete-Time Integrator1'
|
|
|
- PmsmSimUt_B.DiscreteTimeIntegrator1 =
|
|
|
- PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTAT_d;
|
|
|
-
|
|
|
- // Update for DiscreteIntegrator: '<S18>/Discrete-Time Integrator1' incorporates:
|
|
|
- // Constant: '<S18>/Constant1'
|
|
|
- // Gain: '<S18>/Gain'
|
|
|
- // Gain: '<S18>/Gain1'
|
|
|
- // Inport: '<Root>/CtrlIn'
|
|
|
- // Product: '<S18>/Divide'
|
|
|
- // Sum: '<S18>/Sum'
|
|
|
-
|
|
|
- PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTAT_d += ((rtb_Gain -
|
|
|
- PmsmSimUt_P.Params.B * PmsmSimUt_B.DiscreteTimeIntegrator1) -
|
|
|
- PmsmSimUt_U.CtrlIn.Tm) / PmsmSimUt_P.Params.Jm * PmsmSimUt_P.Params.Ts *
|
|
|
- PmsmSimUt_P.DiscreteTimeIntegrator1_gainval;
|
|
|
- }
|
|
|
-
|
|
|
- // End of Outputs for SubSystem: '<S17>/Subsystem'
|
|
|
-
|
|
|
- // Switch: '<S17>/Switch' incorporates:
|
|
|
- // Constant: '<Root>/Constant2'
|
|
|
- // Constant: '<Root>/Constant4'
|
|
|
- // Gain: '<S17>/Gain3'
|
|
|
-
|
|
|
- if (PmsmSimUt_P.Params.SpdCtrl > PmsmSimUt_P.Switch_Threshold) {
|
|
|
- rtb_Gain2_k = PmsmSimUt_B.DiscreteTimeIntegrator1;
|
|
|
- } else {
|
|
|
- rtb_Gain2_k = PmsmSimUt_P.Gain3_Gain * PmsmSimUt_P.Params.SpdRpm;
|
|
|
- }
|
|
|
-
|
|
|
- // End of Switch: '<S17>/Switch'
|
|
|
-
|
|
|
- // Gain: '<S17>/Gain1'
|
|
|
- rtb_Gain1_i = PmsmSimUt_P.Params.Pn * rtb_Gain2_k;
|
|
|
-
|
|
|
- // Switch: '<Root>/Switch3' incorporates:
|
|
|
- // Inport: '<Root>/ObsIn'
|
|
|
-
|
|
|
- if (PmsmSimUt_U.ObsIn.Enable > PmsmSimUt_P.Switch3_Threshold) {
|
|
|
- rtb_a = PmsmSimUt_U.ObsIn.We;
|
|
|
- } else {
|
|
|
- rtb_a = rtb_Gain1_i;
|
|
|
- }
|
|
|
-
|
|
|
- // End of Switch: '<Root>/Switch3'
|
|
|
-
|
|
|
// Switch: '<Root>/Switch4' incorporates:
|
|
|
// Inport: '<Root>/ObsIn'
|
|
|
|
|
@@ -309,10 +320,15 @@ void PmsmSimUtModelClass::step()
|
|
|
|
|
|
// End of ManualSwitch: '<Root>/Manual Switch1'
|
|
|
|
|
|
- // Product: '<S5>/Product' incorporates:
|
|
|
- // Fcn: '<S5>/Fcn'
|
|
|
+ // Product: '<S6>/Product' incorporates:
|
|
|
+ // Constant: '<S6>/Constant1'
|
|
|
+ // Constant: '<S6>/Constant2'
|
|
|
+ // Product: '<S6>/Product2'
|
|
|
+ // Product: '<S6>/Product3'
|
|
|
+ // Sum: '<S6>/Sum'
|
|
|
|
|
|
- rtb_Switch_idx_1 = (8.1e-5 * rtb_Add1 + 0.0789) * rtb_a * rtb_Switch_idx_0;
|
|
|
+ rtb_Switch_idx_1 = (rtb_Add1 * PmsmSimUt_P.Params.Ld + PmsmSimUt_P.Params.Flux)
|
|
|
+ * rtb_a * rtb_Switch_idx_0;
|
|
|
|
|
|
// Sum: '<Root>/Add1' incorporates:
|
|
|
// Inport: '<Root>/CtrlIn'
|
|
@@ -320,22 +336,24 @@ void PmsmSimUtModelClass::step()
|
|
|
rtb_Add1 = PmsmSimUt_U.CtrlIn.IdCmd - rtb_Add1;
|
|
|
|
|
|
// Switch: '<Root>/Switch1' incorporates:
|
|
|
- // Fcn: '<S5>/Fcn1'
|
|
|
+ // Constant: '<S6>/Constant3'
|
|
|
+ // Gain: '<S6>/Gain1'
|
|
|
// Inport: '<Root>/ICtrlIn'
|
|
|
- // Product: '<S5>/Product'
|
|
|
+ // Product: '<S6>/Product'
|
|
|
+ // Product: '<S6>/Product1'
|
|
|
// Sum: '<Root>/Sum1'
|
|
|
|
|
|
if (PmsmSimUt_U.ICtrlIn.Enable > PmsmSimUt_P.Switch1_Threshold) {
|
|
|
rtb_Switch_idx_0 = PmsmSimUt_U.ICtrlIn.UdCtrl;
|
|
|
} else {
|
|
|
- // Sum: '<S15>/Sum6' incorporates:
|
|
|
- // DiscreteIntegrator: '<S15>/Discrete-Time Integrator'
|
|
|
- // Gain: '<S15>/Kp4'
|
|
|
+ // Sum: '<S16>/Sum6' incorporates:
|
|
|
+ // DiscreteIntegrator: '<S16>/Discrete-Time Integrator'
|
|
|
+ // Gain: '<S16>/Kp4'
|
|
|
|
|
|
rtb_Relay2 = PmsmSimUt_P.Params.CKpd * rtb_Add1 +
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_j;
|
|
|
|
|
|
- // Saturate: '<S15>/Saturation2'
|
|
|
+ // Saturate: '<S16>/Saturation2'
|
|
|
if (rtb_Relay2 > PmsmSimUt_P.Saturation2_UpperSat_o) {
|
|
|
rtb_Relay2 = PmsmSimUt_P.Saturation2_UpperSat_o;
|
|
|
} else {
|
|
@@ -344,15 +362,15 @@ void PmsmSimUtModelClass::step()
|
|
|
}
|
|
|
}
|
|
|
|
|
|
- // End of Saturate: '<S15>/Saturation2'
|
|
|
- rtb_Switch_idx_0 = -rtb_a * 8.1e-5 * rtb_Add2 * rtb_Switch_idx_0 +
|
|
|
- rtb_Relay2;
|
|
|
+ // End of Saturate: '<S16>/Saturation2'
|
|
|
+ rtb_Switch_idx_0 = PmsmSimUt_P.Gain1_Gain * rtb_a * rtb_Add2 *
|
|
|
+ PmsmSimUt_P.Params.Lq * rtb_Switch_idx_0 + rtb_Relay2;
|
|
|
}
|
|
|
|
|
|
// End of Switch: '<Root>/Switch1'
|
|
|
|
|
|
// Outputs for Enabled SubSystem: '<Root>/Subsystem' incorporates:
|
|
|
- // EnablePort: '<S4>/Enable'
|
|
|
+ // EnablePort: '<S5>/Enable'
|
|
|
|
|
|
// Logic: '<Root>/AND' incorporates:
|
|
|
// Constant: '<Root>/Constant1'
|
|
@@ -364,7 +382,7 @@ void PmsmSimUtModelClass::step()
|
|
|
PmsmSimUt_DW.Subsystem_MODE = true;
|
|
|
|
|
|
// Saturate: '<Root>/Saturation2' incorporates:
|
|
|
- // Memory: '<S6>/Memory'
|
|
|
+ // Memory: '<S7>/Memory'
|
|
|
|
|
|
if (PmsmSimUt_DW.Memory_PreviousInput > PmsmSimUt_P.Saturation2_UpperSat_p)
|
|
|
{
|
|
@@ -378,42 +396,42 @@ void PmsmSimUtModelClass::step()
|
|
|
|
|
|
// End of Saturate: '<Root>/Saturation2'
|
|
|
|
|
|
- // Sum: '<S4>/Add4' incorporates:
|
|
|
+ // Sum: '<S5>/Add4' incorporates:
|
|
|
// Gain: '<Root>/Gain1'
|
|
|
|
|
|
rtb_Relay2 = rtb_Switch_h - 9.5492965855137211 / PmsmSimUt_P.Params.Pn *
|
|
|
rtb_a;
|
|
|
|
|
|
- // DiscreteIntegrator: '<S19>/Discrete-Time Integrator'
|
|
|
+ // DiscreteIntegrator: '<S20>/Discrete-Time Integrator'
|
|
|
PmsmSimUt_B.DiscreteTimeIntegrator =
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_n;
|
|
|
|
|
|
- // Sum: '<S19>/Sum6' incorporates:
|
|
|
- // Gain: '<S19>/Kp4'
|
|
|
+ // Sum: '<S20>/Sum6' incorporates:
|
|
|
+ // Gain: '<S20>/Kp4'
|
|
|
|
|
|
PmsmSimUt_B.Iq_ref = PmsmSimUt_P.Params.SKp * rtb_Relay2 +
|
|
|
PmsmSimUt_B.DiscreteTimeIntegrator;
|
|
|
|
|
|
- // Saturate: '<S19>/Saturation2'
|
|
|
+ // Saturate: '<S20>/Saturation2'
|
|
|
if (PmsmSimUt_B.Iq_ref > PmsmSimUt_P.Saturation2_UpperSat) {
|
|
|
- // Sum: '<S19>/Sum6' incorporates:
|
|
|
- // Saturate: '<S19>/Saturation2'
|
|
|
+ // Sum: '<S20>/Sum6' incorporates:
|
|
|
+ // Saturate: '<S20>/Saturation2'
|
|
|
|
|
|
PmsmSimUt_B.Iq_ref = PmsmSimUt_P.Saturation2_UpperSat;
|
|
|
} else {
|
|
|
if (PmsmSimUt_B.Iq_ref < PmsmSimUt_P.Saturation2_LowerSat) {
|
|
|
- // Sum: '<S19>/Sum6' incorporates:
|
|
|
- // Saturate: '<S19>/Saturation2'
|
|
|
+ // Sum: '<S20>/Sum6' incorporates:
|
|
|
+ // Saturate: '<S20>/Saturation2'
|
|
|
|
|
|
PmsmSimUt_B.Iq_ref = PmsmSimUt_P.Saturation2_LowerSat;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
- // End of Saturate: '<S19>/Saturation2'
|
|
|
+ // End of Saturate: '<S20>/Saturation2'
|
|
|
|
|
|
- // Update for DiscreteIntegrator: '<S19>/Discrete-Time Integrator' incorporates:
|
|
|
- // Gain: '<S19>/Gain'
|
|
|
- // Gain: '<S19>/Kp5'
|
|
|
+ // Update for DiscreteIntegrator: '<S20>/Discrete-Time Integrator' incorporates:
|
|
|
+ // Gain: '<S20>/Gain'
|
|
|
+ // Gain: '<S20>/Kp5'
|
|
|
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_n += PmsmSimUt_P.Params.SKi *
|
|
|
rtb_Relay2 * PmsmSimUt_P.Params.Ts *
|
|
@@ -430,13 +448,13 @@ void PmsmSimUtModelClass::step()
|
|
|
}
|
|
|
}
|
|
|
|
|
|
- // End of Update for DiscreteIntegrator: '<S19>/Discrete-Time Integrator'
|
|
|
+ // End of Update for DiscreteIntegrator: '<S20>/Discrete-Time Integrator'
|
|
|
|
|
|
// Switch: '<Root>/Switch'
|
|
|
rtb_Switch_h = PmsmSimUt_B.Iq_ref;
|
|
|
} else {
|
|
|
if (PmsmSimUt_DW.Subsystem_MODE) {
|
|
|
- // Disable for DiscreteIntegrator: '<S19>/Discrete-Time Integrator'
|
|
|
+ // Disable for DiscreteIntegrator: '<S20>/Discrete-Time Integrator'
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_n =
|
|
|
PmsmSimUt_B.DiscreteTimeIntegrator;
|
|
|
PmsmSimUt_DW.Subsystem_MODE = false;
|
|
@@ -461,14 +479,14 @@ void PmsmSimUtModelClass::step()
|
|
|
if (PmsmSimUt_U.ICtrlIn.Enable > PmsmSimUt_P.Switch6_Threshold) {
|
|
|
rtb_a = PmsmSimUt_U.ICtrlIn.UqCtrl;
|
|
|
} else {
|
|
|
- // Sum: '<S14>/Sum6' incorporates:
|
|
|
- // DiscreteIntegrator: '<S14>/Discrete-Time Integrator'
|
|
|
- // Gain: '<S14>/Kp4'
|
|
|
+ // Sum: '<S15>/Sum6' incorporates:
|
|
|
+ // DiscreteIntegrator: '<S15>/Discrete-Time Integrator'
|
|
|
+ // Gain: '<S15>/Kp4'
|
|
|
|
|
|
rtb_Relay2 = PmsmSimUt_P.Params.CKpq * rtb_Add2 +
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_g;
|
|
|
|
|
|
- // Saturate: '<S14>/Saturation2'
|
|
|
+ // Saturate: '<S15>/Saturation2'
|
|
|
if (rtb_Relay2 > PmsmSimUt_P.Saturation2_UpperSat_b) {
|
|
|
rtb_Relay2 = PmsmSimUt_P.Saturation2_UpperSat_b;
|
|
|
} else {
|
|
@@ -477,95 +495,95 @@ void PmsmSimUtModelClass::step()
|
|
|
}
|
|
|
}
|
|
|
|
|
|
- // End of Saturate: '<S14>/Saturation2'
|
|
|
+ // End of Saturate: '<S15>/Saturation2'
|
|
|
rtb_a = rtb_Switch_idx_1 + rtb_Relay2;
|
|
|
}
|
|
|
|
|
|
// End of Switch: '<Root>/Switch6'
|
|
|
|
|
|
- // Fcn: '<S26>/Fcn' incorporates:
|
|
|
- // Fcn: '<S26>/Fcn1'
|
|
|
+ // Fcn: '<S27>/Fcn' incorporates:
|
|
|
+ // Fcn: '<S27>/Fcn1'
|
|
|
|
|
|
rtb_Relay2 = std::sin(rtb_Fcn1);
|
|
|
rtb_Fcn1 = std::cos(rtb_Fcn1);
|
|
|
rtb_Switch_idx_1 = rtb_Fcn1 * rtb_Switch_idx_0 - rtb_Relay2 * rtb_a;
|
|
|
|
|
|
- // Fcn: '<S26>/Fcn1'
|
|
|
+ // Fcn: '<S27>/Fcn1'
|
|
|
rtb_Fcn1 = rtb_Relay2 * rtb_Switch_idx_0 + rtb_Fcn1 * rtb_a;
|
|
|
|
|
|
- // Gain: '<S27>/K1' incorporates:
|
|
|
- // Constant: '<S8>/Constant'
|
|
|
+ // Gain: '<S28>/K1' incorporates:
|
|
|
+ // Constant: '<S9>/Constant'
|
|
|
|
|
|
rtb_Switch_idx_0 = PmsmSimUt_P.K1_Gain_j * PmsmSimUt_P.Constant_Value_p;
|
|
|
|
|
|
- // Fcn: '<S27>/a'
|
|
|
+ // Fcn: '<S28>/a'
|
|
|
rtb_a = rtb_Switch_idx_1 + rtb_Switch_idx_0;
|
|
|
|
|
|
- // Fcn: '<S27>/b'
|
|
|
+ // Fcn: '<S28>/b'
|
|
|
rtb_Relay2 = (-0.5 * rtb_Switch_idx_1 + 0.8660254037844386 * rtb_Fcn1) +
|
|
|
rtb_Switch_idx_0;
|
|
|
|
|
|
- // Fcn: '<S27>/c'
|
|
|
+ // Fcn: '<S28>/c'
|
|
|
rtb_Switch_idx_1 = (-0.5 * rtb_Switch_idx_1 - 0.8660254037844386 * rtb_Fcn1) +
|
|
|
rtb_Switch_idx_0;
|
|
|
|
|
|
- // Gain: '<S27>/K2'
|
|
|
- rtb_Fcn1 = PmsmSimUt_P.K2_Gain_b * rtb_a;
|
|
|
- rtb_a = PmsmSimUt_P.K2_Gain_b * rtb_Relay2;
|
|
|
+ // Gain: '<S28>/K2'
|
|
|
+ rtb_a *= PmsmSimUt_P.K2_Gain_b;
|
|
|
+ rtb_Fcn1 = PmsmSimUt_P.K2_Gain_b * rtb_Relay2;
|
|
|
rtb_Relay2 = PmsmSimUt_P.K2_Gain_b * rtb_Switch_idx_1;
|
|
|
for (i = 0; i < 3; i++) {
|
|
|
- // Gain: '<S21>/Gain1' incorporates:
|
|
|
- // Gain: '<S21>/Gain3'
|
|
|
+ // Gain: '<S22>/Gain1' incorporates:
|
|
|
+ // Gain: '<S22>/Gain3'
|
|
|
|
|
|
- rtb_Gain1_c[i] = PmsmSimUt_P.Gain1_Gain * (PmsmSimUt_P.Gain3_Gain_j[i + 6] *
|
|
|
- rtb_Relay2 + (PmsmSimUt_P.Gain3_Gain_j[i + 3] * rtb_a +
|
|
|
- PmsmSimUt_P.Gain3_Gain_j[i] * rtb_Fcn1));
|
|
|
+ rtb_Gain1_c[i] = PmsmSimUt_P.Gain1_Gain_e * (PmsmSimUt_P.Gain3_Gain_j[i + 6]
|
|
|
+ * rtb_Relay2 + (PmsmSimUt_P.Gain3_Gain_j[i + 3] * rtb_Fcn1 +
|
|
|
+ PmsmSimUt_P.Gain3_Gain_j[i] * rtb_a));
|
|
|
}
|
|
|
|
|
|
- // RelationalOperator: '<S22>/Compare' incorporates:
|
|
|
- // Constant: '<S20>/Constant'
|
|
|
- // Constant: '<S22>/Constant'
|
|
|
+ // RelationalOperator: '<S23>/Compare' incorporates:
|
|
|
+ // Constant: '<S21>/Constant'
|
|
|
+ // Constant: '<S23>/Constant'
|
|
|
|
|
|
rtb_Compare = (PmsmSimUt_P.AlphaBetaZerotodq0_Alignment_e ==
|
|
|
PmsmSimUt_P.CompareToConstant_const_a);
|
|
|
|
|
|
- // Outputs for Enabled SubSystem: '<S20>/Subsystem1' incorporates:
|
|
|
- // EnablePort: '<S25>/Enable'
|
|
|
+ // Outputs for Enabled SubSystem: '<S21>/Subsystem1' incorporates:
|
|
|
+ // EnablePort: '<S26>/Enable'
|
|
|
|
|
|
if (rtb_Compare > 0) {
|
|
|
- // Fcn: '<S25>/Fcn'
|
|
|
- PmsmSimUt_B.Fcn = rtb_Gain1_c[0] * rtb_a_tmp_tmp_0 + rtb_Gain1_c[1] *
|
|
|
- rtb_a_tmp_tmp;
|
|
|
+ // Fcn: '<S26>/Fcn'
|
|
|
+ PmsmSimUt_B.Fcn = rtb_Gain1_c[0] * rtb_Add2_tmp_tmp_0 + rtb_Gain1_c[1] *
|
|
|
+ rtb_Add2_tmp_tmp;
|
|
|
|
|
|
- // Fcn: '<S25>/Fcn1'
|
|
|
- PmsmSimUt_B.Fcn1 = -rtb_Gain1_c[0] * rtb_a_tmp_tmp + rtb_Gain1_c[1] *
|
|
|
- rtb_a_tmp_tmp_0;
|
|
|
+ // Fcn: '<S26>/Fcn1'
|
|
|
+ PmsmSimUt_B.Fcn1 = -rtb_Gain1_c[0] * rtb_Add2_tmp_tmp + rtb_Gain1_c[1] *
|
|
|
+ rtb_Add2_tmp_tmp_0;
|
|
|
}
|
|
|
|
|
|
- // End of Outputs for SubSystem: '<S20>/Subsystem1'
|
|
|
+ // End of Outputs for SubSystem: '<S21>/Subsystem1'
|
|
|
|
|
|
- // Outputs for Enabled SubSystem: '<S20>/Subsystem - pi//2 delay' incorporates:
|
|
|
- // EnablePort: '<S24>/Enable'
|
|
|
+ // Outputs for Enabled SubSystem: '<S21>/Subsystem - pi//2 delay' incorporates:
|
|
|
+ // EnablePort: '<S25>/Enable'
|
|
|
|
|
|
- // RelationalOperator: '<S23>/Compare' incorporates:
|
|
|
- // Constant: '<S20>/Constant'
|
|
|
- // Constant: '<S23>/Constant'
|
|
|
+ // RelationalOperator: '<S24>/Compare' incorporates:
|
|
|
+ // Constant: '<S21>/Constant'
|
|
|
+ // Constant: '<S24>/Constant'
|
|
|
|
|
|
if (PmsmSimUt_P.AlphaBetaZerotodq0_Alignment_e ==
|
|
|
PmsmSimUt_P.CompareToConstant1_const_o) {
|
|
|
- // Fcn: '<S24>/Fcn'
|
|
|
- PmsmSimUt_B.Fcn_a = rtb_Gain1_c[0] * rtb_a_tmp_tmp - rtb_Gain1_c[1] *
|
|
|
- rtb_a_tmp_tmp_0;
|
|
|
+ // Fcn: '<S25>/Fcn'
|
|
|
+ PmsmSimUt_B.Fcn_a = rtb_Gain1_c[0] * rtb_Add2_tmp_tmp - rtb_Gain1_c[1] *
|
|
|
+ rtb_Add2_tmp_tmp_0;
|
|
|
|
|
|
- // Fcn: '<S24>/Fcn1'
|
|
|
- PmsmSimUt_B.Fcn1_p = rtb_Gain1_c[0] * rtb_a_tmp_tmp_0 + rtb_Gain1_c[1] *
|
|
|
- rtb_a_tmp_tmp;
|
|
|
+ // Fcn: '<S25>/Fcn1'
|
|
|
+ PmsmSimUt_B.Fcn1_p = rtb_Gain1_c[0] * rtb_Add2_tmp_tmp_0 + rtb_Gain1_c[1] *
|
|
|
+ rtb_Add2_tmp_tmp;
|
|
|
}
|
|
|
|
|
|
- // End of RelationalOperator: '<S23>/Compare'
|
|
|
- // End of Outputs for SubSystem: '<S20>/Subsystem - pi//2 delay'
|
|
|
+ // End of RelationalOperator: '<S24>/Compare'
|
|
|
+ // End of Outputs for SubSystem: '<S21>/Subsystem - pi//2 delay'
|
|
|
|
|
|
- // Switch: '<S20>/Switch'
|
|
|
+ // Switch: '<S21>/Switch'
|
|
|
if (rtb_Compare != 0) {
|
|
|
rtb_Switch_idx_0 = PmsmSimUt_B.Fcn;
|
|
|
rtb_Switch_idx_1 = PmsmSimUt_B.Fcn1;
|
|
@@ -574,19 +592,19 @@ void PmsmSimUtModelClass::step()
|
|
|
rtb_Switch_idx_1 = PmsmSimUt_B.Fcn1_p;
|
|
|
}
|
|
|
|
|
|
- // End of Switch: '<S20>/Switch'
|
|
|
+ // End of Switch: '<S21>/Switch'
|
|
|
|
|
|
// Outport: '<Root>/Out' incorporates:
|
|
|
// BusCreator: '<Root>/Bus Creator'
|
|
|
- // DiscreteIntegrator: '<S16>/Discrete-Time Integrator'
|
|
|
- // DiscreteIntegrator: '<S16>/Discrete-Time Integrator1'
|
|
|
- // Gain: '<S17>/Gain2'
|
|
|
+ // DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
|
|
|
+ // DiscreteIntegrator: '<S17>/Discrete-Time Integrator1'
|
|
|
+ // Gain: '<S18>/Gain2'
|
|
|
// Inport: '<Root>/CtrlIn'
|
|
|
// SignalConversion generated from: '<Root>/Bus Creator'
|
|
|
|
|
|
PmsmSimUt_Y.Out.WmRpm = PmsmSimUt_P.Gain2_Gain * rtb_Gain2_k;
|
|
|
- PmsmSimUt_Y.Out.Uabc[0] = rtb_Fcn1;
|
|
|
- PmsmSimUt_Y.Out.Uabc[1] = rtb_a;
|
|
|
+ PmsmSimUt_Y.Out.Uabc[0] = rtb_a;
|
|
|
+ PmsmSimUt_Y.Out.Uabc[1] = rtb_Fcn1;
|
|
|
PmsmSimUt_Y.Out.Uabc[2] = rtb_Relay2;
|
|
|
PmsmSimUt_Y.Out.Idq[0] = rtb_id;
|
|
|
PmsmSimUt_Y.Out.Idq[1] = rtb_iq;
|
|
@@ -598,22 +616,22 @@ void PmsmSimUtModelClass::step()
|
|
|
PmsmSimUt_Y.Out.IdRef = PmsmSimUt_U.CtrlIn.IdCmd;
|
|
|
PmsmSimUt_Y.Out.IqRef = rtb_Switch_h;
|
|
|
|
|
|
- // Gain: '<S16>/Gain2' incorporates:
|
|
|
- // Constant: '<S16>/Constant'
|
|
|
- // DiscreteIntegrator: '<S16>/Discrete-Time Integrator'
|
|
|
- // Fcn: '<S16>/d(Flux_q)//dt'
|
|
|
+ // Gain: '<S17>/Gain1' incorporates:
|
|
|
+ // Constant: '<S17>/Constant'
|
|
|
+ // DiscreteIntegrator: '<S17>/Discrete-Time Integrator1'
|
|
|
+ // Fcn: '<S17>/d(Flux_d)//dt'
|
|
|
|
|
|
- rtb_Mod = ((rtb_Switch_idx_1 - PmsmSimUt_P.Params.R * rtb_iq) - rtb_Gain1_i *
|
|
|
- PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c) *
|
|
|
+ rtb_Mod = ((rtb_Switch_idx_0 - PmsmSimUt_P.Params.R * rtb_id) + rtb_Gain1_i *
|
|
|
+ PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE) *
|
|
|
PmsmSimUt_P.Params.Ts;
|
|
|
|
|
|
- // Sum: '<S6>/Sum' incorporates:
|
|
|
+ // Sum: '<S7>/Sum' incorporates:
|
|
|
// Inport: '<Root>/CtrlIn'
|
|
|
- // Memory: '<S6>/Memory'
|
|
|
+ // Memory: '<S7>/Memory'
|
|
|
|
|
|
rtb_Relay2 = PmsmSimUt_U.CtrlIn.WmRpm - PmsmSimUt_DW.Memory_PreviousInput;
|
|
|
|
|
|
- // DeadZone: '<S6>/Dead Zone'
|
|
|
+ // DeadZone: '<S7>/Dead Zone'
|
|
|
if (rtb_Relay2 > PmsmSimUt_P.DeadZone_End) {
|
|
|
rtb_Relay2 -= PmsmSimUt_P.DeadZone_End;
|
|
|
} else if (rtb_Relay2 >= PmsmSimUt_P.DeadZone_Start) {
|
|
@@ -622,40 +640,40 @@ void PmsmSimUtModelClass::step()
|
|
|
rtb_Relay2 -= PmsmSimUt_P.DeadZone_Start;
|
|
|
}
|
|
|
|
|
|
- // End of DeadZone: '<S6>/Dead Zone'
|
|
|
+ // End of DeadZone: '<S7>/Dead Zone'
|
|
|
|
|
|
- // Relay: '<S6>/Relay1'
|
|
|
+ // Relay: '<S7>/Relay1'
|
|
|
PmsmSimUt_DW.Relay1_Mode = ((rtb_Relay2 >= PmsmSimUt_P.Relay1_OnVal) ||
|
|
|
((!(rtb_Relay2 <= PmsmSimUt_P.Relay1_OffVal)) && PmsmSimUt_DW.Relay1_Mode));
|
|
|
|
|
|
- // Relay: '<S6>/Relay2'
|
|
|
+ // Relay: '<S7>/Relay2'
|
|
|
PmsmSimUt_DW.Relay2_Mode = ((rtb_Relay2 >= PmsmSimUt_P.Relay2_OnVal) ||
|
|
|
((!(rtb_Relay2 <= PmsmSimUt_P.Relay2_OffVal)) && PmsmSimUt_DW.Relay2_Mode));
|
|
|
|
|
|
- // Update for DiscreteIntegrator: '<S17>/Discrete-Time Integrator' incorporates:
|
|
|
- // Gain: '<S17>/Gain'
|
|
|
+ // Update for DiscreteIntegrator: '<S18>/Discrete-Time Integrator' incorporates:
|
|
|
+ // Gain: '<S18>/Gain'
|
|
|
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE += PmsmSimUt_P.Params.Ts *
|
|
|
rtb_Gain1_i * PmsmSimUt_P.DiscreteTimeIntegrator_gainva_p;
|
|
|
|
|
|
- // Update for DiscreteIntegrator: '<S16>/Discrete-Time Integrator' incorporates:
|
|
|
- // Constant: '<S16>/Constant'
|
|
|
- // DiscreteIntegrator: '<S16>/Discrete-Time Integrator1'
|
|
|
- // Fcn: '<S16>/d(Flux_d)//dt'
|
|
|
- // Gain: '<S16>/Gain1'
|
|
|
+ // Update for DiscreteIntegrator: '<S17>/Discrete-Time Integrator1' incorporates:
|
|
|
+ // Constant: '<S17>/Constant'
|
|
|
+ // DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
|
|
|
+ // Fcn: '<S17>/d(Flux_q)//dt'
|
|
|
+ // Gain: '<S17>/Gain2'
|
|
|
|
|
|
- PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c += ((rtb_Switch_idx_0 -
|
|
|
- PmsmSimUt_P.Params.R * rtb_id) + rtb_Gain1_i *
|
|
|
- PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE) * PmsmSimUt_P.Params.Ts *
|
|
|
- PmsmSimUt_P.DiscreteTimeIntegrator_gainv_pq;
|
|
|
+ PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE += ((rtb_Switch_idx_1 -
|
|
|
+ PmsmSimUt_P.Params.R * rtb_iq) - rtb_Gain1_i *
|
|
|
+ PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c) * PmsmSimUt_P.Params.Ts *
|
|
|
+ PmsmSimUt_P.DiscreteTimeIntegrator1_gainv_b;
|
|
|
|
|
|
- // Update for DiscreteIntegrator: '<S16>/Discrete-Time Integrator1'
|
|
|
- PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE +=
|
|
|
- PmsmSimUt_P.DiscreteTimeIntegrator1_gainv_b * rtb_Mod;
|
|
|
+ // Update for DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
|
|
|
+ PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c +=
|
|
|
+ PmsmSimUt_P.DiscreteTimeIntegrator_gainv_pq * rtb_Mod;
|
|
|
|
|
|
- // Update for DiscreteIntegrator: '<S15>/Discrete-Time Integrator' incorporates:
|
|
|
- // Gain: '<S15>/Gain'
|
|
|
- // Gain: '<S15>/Kp5'
|
|
|
+ // Update for DiscreteIntegrator: '<S16>/Discrete-Time Integrator' incorporates:
|
|
|
+ // Gain: '<S16>/Gain'
|
|
|
+ // Gain: '<S16>/Kp5'
|
|
|
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_j += PmsmSimUt_P.Params.CKid *
|
|
|
rtb_Add1 * PmsmSimUt_P.Params.Ts *
|
|
@@ -672,33 +690,33 @@ void PmsmSimUtModelClass::step()
|
|
|
}
|
|
|
}
|
|
|
|
|
|
- // End of Update for DiscreteIntegrator: '<S15>/Discrete-Time Integrator'
|
|
|
+ // End of Update for DiscreteIntegrator: '<S16>/Discrete-Time Integrator'
|
|
|
|
|
|
- // Relay: '<S6>/Relay1'
|
|
|
+ // Relay: '<S7>/Relay1'
|
|
|
if (PmsmSimUt_DW.Relay1_Mode) {
|
|
|
rtb_Switch_h = PmsmSimUt_P.Relay1_YOn;
|
|
|
} else {
|
|
|
rtb_Switch_h = PmsmSimUt_P.Relay1_YOff;
|
|
|
}
|
|
|
|
|
|
- // Relay: '<S6>/Relay2'
|
|
|
+ // Relay: '<S7>/Relay2'
|
|
|
if (PmsmSimUt_DW.Relay2_Mode) {
|
|
|
- rtb_id = PmsmSimUt_P.Relay2_YOn;
|
|
|
+ rtb_iq = PmsmSimUt_P.Relay2_YOn;
|
|
|
} else {
|
|
|
- rtb_id = PmsmSimUt_P.Relay2_YOff;
|
|
|
+ rtb_iq = PmsmSimUt_P.Relay2_YOff;
|
|
|
}
|
|
|
|
|
|
- // Update for Memory: '<S6>/Memory' incorporates:
|
|
|
- // Gain: '<S6>/Gain'
|
|
|
- // Sum: '<S6>/Add'
|
|
|
- // Sum: '<S6>/Sum1'
|
|
|
+ // Update for Memory: '<S7>/Memory' incorporates:
|
|
|
+ // Gain: '<S7>/Gain'
|
|
|
+ // Sum: '<S7>/Add'
|
|
|
+ // Sum: '<S7>/Sum1'
|
|
|
|
|
|
- PmsmSimUt_DW.Memory_PreviousInput += (rtb_Switch_h + rtb_id) *
|
|
|
+ PmsmSimUt_DW.Memory_PreviousInput += (rtb_Switch_h + rtb_iq) *
|
|
|
PmsmSimUt_P.Params.Ts;
|
|
|
|
|
|
- // Update for DiscreteIntegrator: '<S14>/Discrete-Time Integrator' incorporates:
|
|
|
- // Gain: '<S14>/Gain'
|
|
|
- // Gain: '<S14>/Kp5'
|
|
|
+ // Update for DiscreteIntegrator: '<S15>/Discrete-Time Integrator' incorporates:
|
|
|
+ // Gain: '<S15>/Gain'
|
|
|
+ // Gain: '<S15>/Kp5'
|
|
|
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_g += PmsmSimUt_P.Params.CKiq *
|
|
|
rtb_Add2 * PmsmSimUt_P.Params.Ts *
|
|
@@ -715,7 +733,7 @@ void PmsmSimUtModelClass::step()
|
|
|
}
|
|
|
}
|
|
|
|
|
|
- // End of Update for DiscreteIntegrator: '<S14>/Discrete-Time Integrator'
|
|
|
+ // End of Update for DiscreteIntegrator: '<S15>/Discrete-Time Integrator'
|
|
|
}
|
|
|
|
|
|
// Model initialize function
|
|
@@ -726,101 +744,101 @@ void PmsmSimUtModelClass::initialize()
|
|
|
// initialize non-finites
|
|
|
rt_InitInfAndNaN(sizeof(real_T));
|
|
|
|
|
|
- // InitializeConditions for DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
|
|
|
+ // InitializeConditions for DiscreteIntegrator: '<S18>/Discrete-Time Integrator'
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE =
|
|
|
PmsmSimUt_P.DiscreteTimeIntegrator_IC;
|
|
|
|
|
|
- // InitializeConditions for DiscreteIntegrator: '<S16>/Discrete-Time Integrator'
|
|
|
- PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c = PmsmSimUt_P.Params.Flux;
|
|
|
-
|
|
|
- // InitializeConditions for DiscreteIntegrator: '<S16>/Discrete-Time Integrator1'
|
|
|
+ // InitializeConditions for DiscreteIntegrator: '<S17>/Discrete-Time Integrator1'
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE =
|
|
|
PmsmSimUt_P.DiscreteTimeIntegrator1_IC_a;
|
|
|
|
|
|
- // InitializeConditions for DiscreteIntegrator: '<S15>/Discrete-Time Integrator'
|
|
|
+ // InitializeConditions for DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
|
|
|
+ PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c = PmsmSimUt_P.Params.Flux;
|
|
|
+
|
|
|
+ // InitializeConditions for DiscreteIntegrator: '<S16>/Discrete-Time Integrator'
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_j = PmsmSimUt_P.Subsystem1_Init;
|
|
|
|
|
|
- // InitializeConditions for Memory: '<S6>/Memory'
|
|
|
+ // InitializeConditions for Memory: '<S7>/Memory'
|
|
|
PmsmSimUt_DW.Memory_PreviousInput = PmsmSimUt_P.Memory_InitialCondition;
|
|
|
|
|
|
- // InitializeConditions for DiscreteIntegrator: '<S14>/Discrete-Time Integrator'
|
|
|
+ // InitializeConditions for DiscreteIntegrator: '<S15>/Discrete-Time Integrator'
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_g = PmsmSimUt_P.Subsystem_Init_c;
|
|
|
|
|
|
+ // SystemInitialize for Enabled SubSystem: '<S18>/Subsystem'
|
|
|
+ // InitializeConditions for DiscreteIntegrator: '<S19>/Discrete-Time Integrator1'
|
|
|
+ PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTAT_d =
|
|
|
+ PmsmSimUt_P.DiscreteTimeIntegrator1_IC;
|
|
|
+
|
|
|
+ // SystemInitialize for DiscreteIntegrator: '<S19>/Discrete-Time Integrator1' incorporates:
|
|
|
+ // Outport: '<S19>/Wm'
|
|
|
+
|
|
|
+ PmsmSimUt_B.DiscreteTimeIntegrator1 = PmsmSimUt_P.Wm_Y0;
|
|
|
+
|
|
|
+ // End of SystemInitialize for SubSystem: '<S18>/Subsystem'
|
|
|
+
|
|
|
// SystemInitialize for Enabled SubSystem: '<S1>/Subsystem1'
|
|
|
- // SystemInitialize for Fcn: '<S13>/Fcn' incorporates:
|
|
|
- // Outport: '<S13>/dq'
|
|
|
+ // SystemInitialize for Fcn: '<S14>/Fcn' incorporates:
|
|
|
+ // Outport: '<S14>/dq'
|
|
|
|
|
|
PmsmSimUt_B.Fcn_g = PmsmSimUt_P.dq_Y0_e[0];
|
|
|
|
|
|
- // SystemInitialize for Fcn: '<S13>/Fcn1' incorporates:
|
|
|
- // Outport: '<S13>/dq'
|
|
|
+ // SystemInitialize for Fcn: '<S14>/Fcn1' incorporates:
|
|
|
+ // Outport: '<S14>/dq'
|
|
|
|
|
|
PmsmSimUt_B.Fcn1_e = PmsmSimUt_P.dq_Y0_e[1];
|
|
|
|
|
|
// End of SystemInitialize for SubSystem: '<S1>/Subsystem1'
|
|
|
|
|
|
// SystemInitialize for Enabled SubSystem: '<S1>/Subsystem - pi//2 delay'
|
|
|
- // SystemInitialize for Fcn: '<S12>/Fcn' incorporates:
|
|
|
- // Outport: '<S12>/dq'
|
|
|
+ // SystemInitialize for Fcn: '<S13>/Fcn' incorporates:
|
|
|
+ // Outport: '<S13>/dq'
|
|
|
|
|
|
PmsmSimUt_B.Fcn_b = PmsmSimUt_P.dq_Y0[0];
|
|
|
|
|
|
- // SystemInitialize for Fcn: '<S12>/Fcn1' incorporates:
|
|
|
- // Outport: '<S12>/dq'
|
|
|
+ // SystemInitialize for Fcn: '<S13>/Fcn1' incorporates:
|
|
|
+ // Outport: '<S13>/dq'
|
|
|
|
|
|
PmsmSimUt_B.Fcn1_n = PmsmSimUt_P.dq_Y0[1];
|
|
|
|
|
|
// End of SystemInitialize for SubSystem: '<S1>/Subsystem - pi//2 delay'
|
|
|
|
|
|
- // SystemInitialize for Enabled SubSystem: '<S17>/Subsystem'
|
|
|
- // InitializeConditions for DiscreteIntegrator: '<S18>/Discrete-Time Integrator1'
|
|
|
- PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTAT_d =
|
|
|
- PmsmSimUt_P.DiscreteTimeIntegrator1_IC;
|
|
|
-
|
|
|
- // SystemInitialize for DiscreteIntegrator: '<S18>/Discrete-Time Integrator1' incorporates:
|
|
|
- // Outport: '<S18>/Wm'
|
|
|
-
|
|
|
- PmsmSimUt_B.DiscreteTimeIntegrator1 = PmsmSimUt_P.Wm_Y0;
|
|
|
-
|
|
|
- // End of SystemInitialize for SubSystem: '<S17>/Subsystem'
|
|
|
-
|
|
|
// SystemInitialize for Enabled SubSystem: '<Root>/Subsystem'
|
|
|
- // InitializeConditions for DiscreteIntegrator: '<S19>/Discrete-Time Integrator'
|
|
|
+ // InitializeConditions for DiscreteIntegrator: '<S20>/Discrete-Time Integrator'
|
|
|
PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_n = PmsmSimUt_P.Subsystem_Init;
|
|
|
|
|
|
- // SystemInitialize for Sum: '<S19>/Sum6' incorporates:
|
|
|
- // Outport: '<S4>/Iq_ref'
|
|
|
- // Saturate: '<S19>/Saturation2'
|
|
|
+ // SystemInitialize for Sum: '<S20>/Sum6' incorporates:
|
|
|
+ // Outport: '<S5>/Iq_ref'
|
|
|
+ // Saturate: '<S20>/Saturation2'
|
|
|
|
|
|
PmsmSimUt_B.Iq_ref = PmsmSimUt_P.Iq_ref_Y0;
|
|
|
|
|
|
// End of SystemInitialize for SubSystem: '<Root>/Subsystem'
|
|
|
|
|
|
- // SystemInitialize for Enabled SubSystem: '<S20>/Subsystem1'
|
|
|
- // SystemInitialize for Fcn: '<S25>/Fcn' incorporates:
|
|
|
- // Outport: '<S25>/dq'
|
|
|
+ // SystemInitialize for Enabled SubSystem: '<S21>/Subsystem1'
|
|
|
+ // SystemInitialize for Fcn: '<S26>/Fcn' incorporates:
|
|
|
+ // Outport: '<S26>/dq'
|
|
|
|
|
|
PmsmSimUt_B.Fcn = PmsmSimUt_P.dq_Y0_f[0];
|
|
|
|
|
|
- // SystemInitialize for Fcn: '<S25>/Fcn1' incorporates:
|
|
|
- // Outport: '<S25>/dq'
|
|
|
+ // SystemInitialize for Fcn: '<S26>/Fcn1' incorporates:
|
|
|
+ // Outport: '<S26>/dq'
|
|
|
|
|
|
PmsmSimUt_B.Fcn1 = PmsmSimUt_P.dq_Y0_f[1];
|
|
|
|
|
|
- // End of SystemInitialize for SubSystem: '<S20>/Subsystem1'
|
|
|
+ // End of SystemInitialize for SubSystem: '<S21>/Subsystem1'
|
|
|
|
|
|
- // SystemInitialize for Enabled SubSystem: '<S20>/Subsystem - pi//2 delay'
|
|
|
- // SystemInitialize for Fcn: '<S24>/Fcn' incorporates:
|
|
|
- // Outport: '<S24>/dq'
|
|
|
+ // SystemInitialize for Enabled SubSystem: '<S21>/Subsystem - pi//2 delay'
|
|
|
+ // SystemInitialize for Fcn: '<S25>/Fcn' incorporates:
|
|
|
+ // Outport: '<S25>/dq'
|
|
|
|
|
|
PmsmSimUt_B.Fcn_a = PmsmSimUt_P.dq_Y0_l[0];
|
|
|
|
|
|
- // SystemInitialize for Fcn: '<S24>/Fcn1' incorporates:
|
|
|
- // Outport: '<S24>/dq'
|
|
|
+ // SystemInitialize for Fcn: '<S25>/Fcn1' incorporates:
|
|
|
+ // Outport: '<S25>/dq'
|
|
|
|
|
|
PmsmSimUt_B.Fcn1_p = PmsmSimUt_P.dq_Y0_l[1];
|
|
|
|
|
|
- // End of SystemInitialize for SubSystem: '<S20>/Subsystem - pi//2 delay'
|
|
|
+ // End of SystemInitialize for SubSystem: '<S21>/Subsystem - pi//2 delay'
|
|
|
}
|
|
|
|
|
|
// Model terminate function
|