/* * File: LoadObsTheta.c * * Code generated for Simulink model 'LoadObsTheta'. * * Model version : 8.72 * Simulink Coder version : 9.6 (R2021b) 14-May-2021 * C/C++ source code generated on : Sat Nov 5 15:46:39 2022 * * Target selection: ert.tlc * Embedded hardware selection: ARM Compatible->ARM Cortex-M * Code generation objectives: Unspecified * Validation result: Not run */ #include "LoadObsTheta.h" #ifndef UCHAR_MAX #include #endif #if ( UCHAR_MAX != (0xFFU) ) || ( SCHAR_MAX != (0x7F) ) #error Code was generated for compiler with different sized uchar/char. \ Consider adjusting Test hardware word size settings on the \ Hardware Implementation pane to match your compiler word sizes as \ defined in limits.h of the compiler. Alternatively, you can \ select the Test hardware is the same as production hardware option and \ select the Enable portable word sizes option on the Code Generation > \ Verification pane for ERT based targets, which will disable the \ preprocessor word size checks. #endif #if ( USHRT_MAX != (0xFFFFU) ) || ( SHRT_MAX != (0x7FFF) ) #error Code was generated for compiler with different sized ushort/short. \ Consider adjusting Test hardware word size settings on the \ Hardware Implementation pane to match your compiler word sizes as \ defined in limits.h of the compiler. Alternatively, you can \ select the Test hardware is the same as production hardware option and \ select the Enable portable word sizes option on the Code Generation > \ Verification pane for ERT based targets, which will disable the \ preprocessor word size checks. #endif #if ( UINT_MAX != (0xFFFFFFFFU) ) || ( INT_MAX != (0x7FFFFFFF) ) #error Code was generated for compiler with different sized uint/int. \ Consider adjusting Test hardware word size settings on the \ Hardware Implementation pane to match your compiler word sizes as \ defined in limits.h of the compiler. Alternatively, you can \ select the Test hardware is the same as production hardware option and \ select the Enable portable word sizes option on the Code Generation > \ Verification pane for ERT based targets, which will disable the \ preprocessor word size checks. #endif #if ( ULONG_MAX != (0xFFFFFFFFU) ) || ( LONG_MAX != (0x7FFFFFFF) ) #error Code was generated for compiler with different sized ulong/long. \ Consider adjusting Test hardware word size settings on the \ Hardware Implementation pane to match your compiler word sizes as \ defined in limits.h of the compiler. Alternatively, you can \ select the Test hardware is the same as production hardware option and \ select the Enable portable word sizes option on the Code Generation > \ Verification pane for ERT based targets, which will disable the \ preprocessor word size checks. #endif /* Skipping ulong_long/long_long check: insufficient preprocessor integer range. */ /* Exported data definition */ /* Definition for custom storage class: Struct */ LoadObsTheta_stCoef_type LoadObsTheta_stCoef; LoadObsTheta_stCoefIn_type LoadObsTheta_stCoefIn; /* Block states (default storage) */ DW_LoadObsTheta_T LoadObsTheta_DW; /* External inputs (root inport signals with default storage) */ ExtU_LoadObsTheta_T LoadObsTheta_U; /* External outputs (root outports fed by signals with default storage) */ ExtY_LoadObsTheta_T LoadObsTheta_Y; void LoadObsTheta_voCoef(void) { uint16_T rtb_Divide2; /* Outputs for Atomic SubSystem: '/Initialize Function2' */ /* Product: '/Divide' incorporates: * DataStoreWrite: '/Data Store Write' * Inport: '/uwFbHz' * Inport: '/uwWtcHz' */ LoadObsTheta_stCoef.uwK1Pu = (uint16_T)(LoadObsTheta_stCoefIn.uwFbHz == 0U ? MAX_uint32_T : ((uint32_T)LoadObsTheta_stCoefIn.uwWtcHz << 15) / LoadObsTheta_stCoefIn.uwFbHz); /* Product: '/Divide2' incorporates: * Gain: '/Gain' * Inport: '/uwJb' * Inport: '/uwMtJm' */ rtb_Divide2 = (uint16_T)(LoadObsTheta_stCoefIn.uwJb == 0U ? MAX_uint32_T : 1000U * LoadObsTheta_stCoefIn.uwMtJm / LoadObsTheta_stCoefIn.uwJb); /* Product: '/Product6' incorporates: * DataStoreWrite: '/Data Store Write' * DataStoreWrite: '/Data Store Write1' * Product: '/Divide' * Product: '/Product' */ LoadObsTheta_stCoef.uwK2Pu = (uint16_T)(((uint64_T)(((uint32_T) LoadObsTheta_stCoef.uwK1Pu * LoadObsTheta_stCoef.uwK1Pu) >> 1) * rtb_Divide2) >> 19); /* Product: '/Divide6' incorporates: * DataStoreRead: '/Data Store Read' * DataStoreWrite: '/Data Store Write' * DataStoreWrite: '/Data Store Write2' * Inport: '/uwMCoef' * Product: '/Divide' * Product: '/Product1' * Product: '/Product2' * Product: '/Product4' * Product: '/Product5' */ LoadObsTheta_stCoef.uwK3Pu = (uint16_T)(LoadObsTheta_stCoefIn.uwMCoef == 0U ? MAX_uint32_T : (uint32_T)(uint16_T)(((uint64_T)(uint32_T)(((uint64_T) (uint32_T)(((uint64_T)(((uint32_T)LoadObsTheta_stCoef.uwK1Pu * LoadObsTheta_stCoef.uwK1Pu) >> 1) * LoadObsTheta_stCoef.uwK1Pu) >> 14) * rtb_Divide2) >> 6) * LoadObsTheta_stCoef.uwTctrPu) >> 21) / LoadObsTheta_stCoefIn.uwMCoef); /* Product: '/Divide3' incorporates: * DataStoreWrite: '/Data Store Write3' * Inport: '/uwFTbcHz' * Inport: '/uwFbHz' */ LoadObsTheta_stCoef.uwCurTs = (uint16_T)(LoadObsTheta_stCoefIn.uwFTbcHz == 0U ? MAX_uint32_T : ((uint32_T)LoadObsTheta_stCoefIn.uwFbHz << 10) / LoadObsTheta_stCoefIn.uwFTbcHz); /* Product: '/Divide4' incorporates: * DataStoreWrite: '/Data Store Write5' */ LoadObsTheta_stCoef.uwJmPuInv = (uint16_T)(rtb_Divide2 == 0U ? MAX_uint32_T : 16384U / rtb_Divide2); /* Product: '/Product3' incorporates: * DataStoreWrite: '/Data Store Write3' * DataStoreWrite: '/Data Store Write7' * Product: '/Divide3' */ LoadObsTheta_stCoef.uwTctrPu = (uint16_T)((LoadObsTheta_stCoef.uwCurTs * 3217U) >> 7); /* Product: '/Divide1' incorporates: * DataStoreWrite: '/Data Store Write4' * Inport: '/uwFluxWb' * Inport: '/uwFluxbWb' */ LoadObsTheta_stCoef.uwFluxPu = (uint16_T)(LoadObsTheta_stCoefIn.uwFluxbWb == 0U ? MAX_uint32_T : ((uint32_T)LoadObsTheta_stCoefIn.uwFluxWb << 12) / LoadObsTheta_stCoefIn.uwFluxbWb); /* Product: '/Divide5' incorporates: * DataStoreWrite: '/Data Store Write4' * DataStoreWrite: '/Data Store Write6' * Product: '/Divide1' */ LoadObsTheta_stCoef.uwFluxPuInv = (uint16_T)(LoadObsTheta_stCoef.uwFluxPu == 0U ? MAX_uint32_T : 16777216U / LoadObsTheta_stCoef.uwFluxPu); /* End of Outputs for SubSystem: '/Initialize Function2' */ } void LoadObsTheta_voInit(void) { /* Outputs for Atomic SubSystem: '/Initialize Function1' */ /* Outport: '/swSpdFbkPu' incorporates: * Constant: '/Constant' */ LoadObsTheta_Y.swSpdFbkPu = 0; /* Outport: '/uwThetaObsPu' incorporates: * Constant: '/Constant1' */ LoadObsTheta_Y.uwThetaObsPu = 0U; /* Outport: '/swTLPu' incorporates: * Constant: '/Constant2' */ LoadObsTheta_Y.swTLPu = 0; /* Outport: '/swIqCompPu' incorporates: * Constant: '/Constant3' */ LoadObsTheta_Y.swIqCompPu = 0; /* End of Outputs for SubSystem: '/Initialize Function1' */ } /* Model step function */ void LoadObsTheta_step(void) { int32_T rtb_Sum11; int16_T rtb_Sum5; /* Sum: '/Sum5' incorporates: * Inport: '/ThetamPu' * UnitDelay: '/Unit Delay4' */ rtb_Sum5 = (int16_T)(((LoadObsTheta_U.ThetamPu << 13) - (LoadObsTheta_DW.UnitDelay4_DSTATE >> 1)) >> 13); /* Switch: '/Switch2' incorporates: * Constant: '/Constant2' * RelationalOperator: '/Compare' * RelationalOperator: '/Compare' * Sum: '/Sum1' * Sum: '/Sum5' * Switch: '/Switch3' */ if (rtb_Sum5 >= 16384) { rtb_Sum5 = (int16_T)(rtb_Sum5 - 32767); } else if (rtb_Sum5 < -16384) { /* Switch: '/Switch2' incorporates: * Constant: '/Constant4' * Sum: '/Sum4' * Switch: '/Switch3' */ rtb_Sum5 = (int16_T)(rtb_Sum5 + 32767); } /* End of Switch: '/Switch2' */ /* Sum: '/Sum6' incorporates: * DataStoreRead: '/Data Store Read3' * Product: '/Product2' * Switch: '/Switch2' * UnitDelay: '/Unit Delay1' */ LoadObsTheta_DW.UnitDelay1_DSTATE += LoadObsTheta_stCoef.uwK3Pu * rtb_Sum5; /* Sum: '/Sum11' incorporates: * DataStoreRead: '/Data Store Read' * DataStoreRead: '/Data Store Read1' * Inport: '/IqFbkPu' * Product: '/Product1' * Product: '/Product7' * Sum: '/Sum6' * Sum: '/Sum9' * Switch: '/Switch2' * UnitDelay: '/Unit Delay1' */ rtb_Sum11 = (((int16_T)((LoadObsTheta_U.IqFbkPu * LoadObsTheta_stCoef.uwFluxPu) >> 14) << 13) + LoadObsTheta_stCoef.uwK2Pu * rtb_Sum5) + (LoadObsTheta_DW.UnitDelay1_DSTATE >> 5); /* Sum: '/Sum10' incorporates: * DataStoreRead: '/Data Store Read4' * DataStoreRead: '/Data Store Read6' * Product: '/Product4' * Product: '/Product5' * Sum: '/Sum11' * UnitDelay: '/Unit Delay2' */ LoadObsTheta_DW.UnitDelay2_DSTATE += (int32_T)(((int64_T) LoadObsTheta_stCoef.uwJmPuInv * rtb_Sum11 * LoadObsTheta_stCoef.uwTctrPu) >> 22); /* Saturate: '/Saturation' incorporates: * Sum: '/Sum10' * UnitDelay: '/Unit Delay2' */ if (LoadObsTheta_DW.UnitDelay2_DSTATE > 536870912) { /* Outport: '/swSpdFbkPu' incorporates: * DataTypeConversion: '/Data Type Conversion2' */ LoadObsTheta_Y.swSpdFbkPu = MIN_int16_T; } else if (LoadObsTheta_DW.UnitDelay2_DSTATE < -536870912) { /* Outport: '/swSpdFbkPu' incorporates: * DataTypeConversion: '/Data Type Conversion2' */ LoadObsTheta_Y.swSpdFbkPu = MIN_int16_T; } else { /* Outport: '/swSpdFbkPu' incorporates: * DataTypeConversion: '/Data Type Conversion2' */ LoadObsTheta_Y.swSpdFbkPu = (int16_T)(LoadObsTheta_DW.UnitDelay2_DSTATE >> 14); } /* End of Saturate: '/Saturation' */ /* Sum: '/Sum8' incorporates: * DataStoreRead: '/Data Store Read5' * DataStoreRead: '/Data Store Read8' * Product: '/Product3' * Product: '/Product6' * Sum: '/Sum10' * Sum: '/Sum7' * Switch: '/Switch2' * UnitDelay: '/Unit Delay2' * UnitDelay: '/Unit Delay3' */ LoadObsTheta_DW.UnitDelay3_DSTATE += (int32_T)(((int64_T) (((LoadObsTheta_stCoef.uwK1Pu * rtb_Sum5) >> 1) + LoadObsTheta_DW.UnitDelay2_DSTATE) * LoadObsTheta_stCoef.uwCurTs) >> 10); /* Switch: '/Switch' incorporates: * Constant: '/Constant1' * RelationalOperator: '/Compare' * RelationalOperator: '/Compare' * Sum: '/Sum2' * Sum: '/Sum8' * Switch: '/Switch1' */ if (LoadObsTheta_DW.UnitDelay3_DSTATE >= 536870912) { LoadObsTheta_DW.UnitDelay3_DSTATE -= 536870912; } else if (LoadObsTheta_DW.UnitDelay3_DSTATE < 0) { /* Switch: '/Switch' incorporates: * Constant: '/Constant3' * Sum: '/Sum3' * Switch: '/Switch1' * UnitDelay: '/Unit Delay3' */ LoadObsTheta_DW.UnitDelay3_DSTATE += 536870912; } /* End of Switch: '/Switch' */ /* Outport: '/uwThetaObsPu' incorporates: * DataTypeConversion: '/Data Type Conversion1' * Switch: '/Switch' * UnitDelay: '/Unit Delay3' */ LoadObsTheta_Y.uwThetaObsPu = (uint16_T)(LoadObsTheta_DW.UnitDelay3_DSTATE >> 14); /* Outport: '/swTLPu' incorporates: * DataTypeConversion: '/Data Type Conversion3' * Sum: '/Sum6' * UnitDelay: '/Unit Delay1' */ LoadObsTheta_Y.swTLPu = (int16_T)(LoadObsTheta_DW.UnitDelay1_DSTATE >> 18); /* Outport: '/swIqCompPu' incorporates: * DataStoreRead: '/Data Store Read2' * Product: '/Product8' * Sum: '/Sum11' */ LoadObsTheta_Y.swIqCompPu = (int16_T)(((int64_T) LoadObsTheta_stCoef.uwFluxPuInv * rtb_Sum11) >> 23); /* Update for UnitDelay: '/Unit Delay4' incorporates: * Switch: '/Switch' * UnitDelay: '/Unit Delay3' */ LoadObsTheta_DW.UnitDelay4_DSTATE = LoadObsTheta_DW.UnitDelay3_DSTATE; } /* Model initialize function */ void LoadObsTheta_initialize(void) { /* (no initialization code required) */ } /* Model terminate function */ void LoadObsTheta_terminate(void) { /* (no terminate code required) */ } /* * File trailer for generated code. * * [EOF] */