/*! \file gd32f3x0_it.c \brief interrupt service routines */ /* Copyright (C) 2022 GigaDevice 2022-12-01, V1.0.0, firmware for GD32F3x0 */ /****************************** * Include File ******************************/ #include "gd32f30x_it.h" #include "user.h" #include "TimeTask_Event.h" #include "can.h" #include "FSM_1st.h" #include "api_rt.h" #include "sys_ctrl.h" /****************************** * Parameter ******************************/ extern uint8_t data; /****************************** * Function ******************************/ /*! \brief this function handles NMI exception \param[in] none \param[out] none \retval none */ void NMI_Handler(void) { } /*! \brief this function handles HardFault exception \param[in] none \param[out] none \retval none */ void HardFault_Handler(void) { sysctrl_stPwmState.blPwmOnflg = TRUE;/* HardFault_Handler无法被屏蔽,hw_blPWMOnFlg可能被RAMtest修改 */ sysctrl_voPwmOff(); /* if Hard Fault exception occurs, go to infinite loop */ while (1) { //do nothing } } /*! \brief this function handles MemManage exception \param[in] none \param[out] none \retval none */ void MemManage_Handler(void) { /* if Memory Manage exception occurs, go to infinite loop */ while (1) { //do nothing } } /*! \brief this function handles BusFault exception \param[in] none \param[out] none \retval none */ void BusFault_Handler(void) { /* if Bus Fault exception occurs, go to infinite loop */ while (1) { //do nothing } } /*! \brief this function handles UsageFault exception \param[in] none \param[out] none \retval none */ void UsageFault_Handler(void) { /* if Usage Fault exception occurs, go to infinite loop */ while (1) { //do nothing } } /*! \brief this function handles SVC exception \param[in] none \param[out] none \retval none */ void SVC_Handler(void) { } /*! \brief this function handles DebugMon exception \param[in] none \param[out] none \retval none */ void DebugMon_Handler(void) { } /*! \brief this function handles PendSV exception \param[in] none \param[out] none \retval none */ void PendSV_Handler(void) { } /*! \brief this function handles SysTick exception \param[in] none \param[out] none \retval none */ void SysTick_Handler(void) { iRtTimer_Isr(HW_SYSTICK_TIMER); } /*! \brief \param[in] none \param[out] none \retval none */ void ADC0_1_IRQHandler(void) { /* MCU self check count */ clasB_uwADCCnt++; iRtAdc_CompleteIsr(0); } /*! \brief \param[in] none \param[out] none \retval none */ void TIMER0_UP_TIMER9_IRQHandler(void) { /* MCU self check count */ clasB_uwTIM0Cnt ++; iRtPwm_UpdateIsr(0); } /*! \brief \param[in] none \param[out] none \retval none */ void TIMER1_IRQHandler(void) { /* MCU self check count */ clasB_uwTIM1Cnt++; iRtCap_Isr(0); // UWORD uwIntSource = 0; // if (timer_interrupt_flag_get(TIMER1, TIMER_INT_FLAG_UP) != 0) // { // if(switch_flg.SysCoef_Flag == TRUE) // { // uwIntSource = 1; // cadence_voCadenceCal(uwIntSource); // bikespeed_voBikeSpeedCal(uwIntSource); // } // timer_interrupt_flag_clear(TIMER1, TIMER_INT_FLAG_UP); // } // else if (timer_interrupt_flag_get(TIMER1, TIMER_INT_FLAG_CH2) != 0) // { // if(switch_flg.SysCoef_Flag == TRUE) // { // uwIntSource = 2; // cadence_voCadenceCal(uwIntSource); // /* Select rising or falling edge trigger */ // if(gpio_input_bit_get(GPIOB, GPIO_PIN_10) != 0) // { // /* reset the CH2P and CH2NP bits */ // TIMER_CHCTL2(TIMER1) &= ~(uint32_t)(TIMER_CHCTL2_CH2P|TIMER_CHCTL2_CH2NP); // TIMER_CHCTL2(TIMER1) |= (uint32_t)((uint32_t)(TIMER_IC_POLARITY_FALLING) << 8U); // } // else // { // /* reset the CH2P and CH2NP bits */ // TIMER_CHCTL2(TIMER1) &= ~(uint32_t)(TIMER_CHCTL2_CH2P|TIMER_CHCTL2_CH2NP); // TIMER_CHCTL2(TIMER1) |= (uint32_t)((uint32_t)(TIMER_IC_POLARITY_RISING) << 8U); // } // } // timer_interrupt_flag_clear(TIMER1, TIMER_INT_FLAG_CH2); // } // else if (timer_interrupt_flag_get(TIMER1, TIMER_INT_FLAG_CH3) != 0) // { // if(switch_flg.SysCoef_Flag == TRUE) // { // uwIntSource = 3; // bikespeed_voBikeSpeedCal(uwIntSource); // } // timer_interrupt_flag_clear(TIMER1, TIMER_INT_FLAG_CH3); // } // else // { // //do nothing // } } /*! \brief \param[in] none \param[out] none \retval none */ void TIMER3_IRQHandler(void) { /* MCU self check count */ clasB_uwTIM3Cnt++; iRtTimer_Isr(HW_TBS_TIMER); } /*! \brief \param[in] none \param[out] none \retval none */ void TIMER5_IRQHandler(void) { /* MCU self check count */ clasB_uwTIM5Cnt++; iRtTimer_Isr(HW_EVENT1MS_TIMER); } /*! \brief \param[in] none \param[out] none \retval none */ void DMA1_Channel2_IRQHandler(void) { iRtUart_RxIsr(0); // /* Read PC Conmand */ // if (dma_flag_get(DMA1, DMA_CH2, DMA_INT_FLAG_FTF) != 0) // { // UART_voCBDoneRead(UART_ERR_OK, 22); // DMA_CH2CTL(DMA1) &= ~DMA_CHXCTL_CHEN; // //dma_flag_clear(DMA1, DMA_CH2, DMA_INT_FLAG_FTF); // DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_INT_FLAG_FTF, DMA_CH2); // uwTempCount = 22 - DMA_CH2CNT(DMA1); // DMA_CH2CNT(DMA1) = uwTempCount; // DMA_CH2CTL(DMA1) |= DMA_CHXCTL_CHEN; // } // /* RX error */ // if (dma_flag_get(DMA1, DMA_CH2, DMA_FLAG_ERR) != 0) // { // DMA_CH2CTL(DMA1) &= ~DMA_CHXCTL_CHEN; // //dma_flag_clear(DMA1, DMA_CH2, DMA_FLAG_ERR); // DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_FLAG_ERR, DMA_CH2); // DMA_CH2CNT(DMA1) = 22; // DMA_CH2CTL(DMA1) |= DMA_CHXCTL_CHEN; // } } /*! \brief \param[in] none \param[out] none \retval none */ void DMA1_Channel4_IRQHandler(void) { /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */ if (dma_flag_get(DMA1, DMA_CH4, DMA_INT_FLAG_FTF) != 0) { iRtUart_AsyncWriteCompleteIsr(0); DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_INT_FLAG_FTF, DMA_CH4); } // TX error if (dma_flag_get(DMA1, DMA_CH4, DMA_FLAG_ERR) != 0) { iRtUart_AsyncWriteErrorIsr(0); DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_FLAG_ERR, DMA_CH4); } // if (dma_flag_get(DMA1, DMA_CH4, DMA_INT_FLAG_FTF) != 0) // { // if (UART_stParaStatus.bParaStart) // { // UART_bInsertPendTx = FALSE; // clear insertBuffer pending // UART_stParaStatus.bParaStart = FALSE; // clear parameter status // } // else // { // // do nothing // } // DMA_CH4CTL(DMA1) &= ~DMA_CHXCTL_CHEN; // //dma_flag_clear(DMA1, DMA_CH4, DMA_INT_FLAG_FTF); // DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_INT_FLAG_FTF, DMA_CH4); // UART_stParaStatus.bWriteBusy = FALSE; // } // /* TX error */ // if (dma_flag_get(DMA1, DMA_CH4, DMA_FLAG_ERR) != 0) // { // if (UART_stParaStatus.bParaStart) // { // UART_bInsertPendTx = FALSE; // clear insertBuffer pending // UART_stParaStatus.bParaStart = FALSE; // clear parameter status // } // DMA_CH4CTL(DMA1) &= ~DMA_CHXCTL_CHEN; // //dma_flag_clear(DMA1, DMA_CH4, DMA_FLAG_ERR); // DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_FLAG_ERR, DMA_CH4); // UART_stParaStatus.bWriteBusy = FALSE; // } } /*! \brief \param[in] none \param[out] none \retval none */ void CAN0_RX0_IRQHandler(void) { can_message_receive(CAN0, CAN_FIFO0, pRxMsg); if((pRxMsg->rx_ff != CAN_FF_STANDARD) || (pRxMsg->rx_dlen == 0)) { can_interrupt_enable(CAN0, CAN_INT_RFF0); return; } switch (pRxMsg->rx_sfid) { case ID_PBU_BC: case ID_PBU_TO_MC: //接收PBU数据 { CAN_RxBuf_Struct_PBU.ucBufID = (UWORD)pRxMsg->rx_sfid; CAN_Rx_ISR(&CAN_RxBuf_Struct_PBU, pRxMsg->rx_dlen); break; } case ID_BMS_BC: case ID_BMS_TO_MC: //接收BMS数据 { CAN_RxBuf_Struct_BMS.ucBufID = (UWORD)pRxMsg->rx_sfid; CAN_Rx_ISR(&CAN_RxBuf_Struct_BMS, pRxMsg->rx_dlen); break; } case ID_HMI_BC: case ID_HMI_TO_MC: //接收HMI数据 { CAN_RxBuf_Struct_HMI.ucBufID = (UWORD)pRxMsg->rx_sfid; CAN_Rx_ISR(&CAN_RxBuf_Struct_HMI, pRxMsg->rx_dlen); break; } case ID_CDL_BC: case ID_CDL_TO_MC: // case ID_CDL_TO_MC_TE://接收CDL数据 { CAN_RxBuf_Struct_CDL.ucBufID = (UWORD)pRxMsg->rx_sfid; CAN_Rx_ISR(&CAN_RxBuf_Struct_CDL, pRxMsg->rx_dlen); break; } default: break; } can_interrupt_enable(CAN0, CAN_INT_RFF0); }