api_rt_pwm.c 17 KB

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  1. #include "api_rt_pwm.h"
  2. #include "api_rt_dbg.h"
  3. #include "api_rt_timer.h"
  4. #include "board_config.h"
  5. #include "gd32f30x.h"
  6. #include <stdint.h>
  7. #include "api_rt_adc.h"
  8. #include "classB.h"
  9. ApiRtPwm_Handle Pwms[1];
  10. /* ========================================================================== */
  11. /* ============================ Api RT Functions ============================ */
  12. /* ========================================================================== */
  13. void iRtPwm_Init()
  14. {
  15. Pwms[0].PwmBase = TIMER0;
  16. for (int i = 0; i < 6; i++)
  17. {
  18. Pwms[0].CompareValues[i] = HW_INIT_HHPWM_PERIOD;
  19. Pwms[0].ActiveCompareValues[i] = HW_INIT_HHPWM_PERIOD;
  20. }
  21. Pwms[0].CountZeroISR.Enable = 0;
  22. Pwms[0].CountZeroISR.Action = 0;
  23. Pwms[0].CountMaxISR.Enable = 0;
  24. Pwms[0].CountMaxISR.Action = 0;
  25. Pwms[0].BreakISR.Enable = 0;
  26. Pwms[0].BreakISR.Action = 0;
  27. Pwms[0].OutputEnable = 0;
  28. for (int i = 0; i < 4; i++)
  29. {
  30. Pwms[0].ChannelISR[i].Enable = 0;
  31. Pwms[0].ChannelISR[i].Action = 0;
  32. // Pwms[0].ChannelOutputEnable[i] = 0;
  33. }
  34. #if API_FUNCTION_PWM_SYNC_MULTI_SAMPLING
  35. Pwms[0].SyncSamplingEnable = 1;
  36. Pwms[0].SyncSamplingUpTickCount = 1;
  37. Pwms[0].SyncSamplingUpTick[0] = HW_INIT_HHPWM_PERIOD;
  38. Pwms[0].SyncSamplingDownTickCount = 1;
  39. Pwms[0].SyncSamplingDownTick[0] = HW_SAMPLE_BEFORE_UPDATE_CNTS;
  40. #endif
  41. }
  42. void iRtPwm_CountZeroIsr(uint8_t devIndex)
  43. {
  44. if (Pwms[devIndex].CountZeroISR.Enable)
  45. {
  46. if (Pwms[devIndex].CountZeroISR.Action != 0)
  47. {
  48. Pwms[devIndex].CountZeroISR.Action();
  49. }
  50. }
  51. }
  52. void iRtPwm_CountMaxIsr(uint8_t devIndex)
  53. {
  54. if (Pwms[devIndex].CountMaxISR.Enable)
  55. {
  56. if (Pwms[devIndex].CountMaxISR.Action != 0)
  57. {
  58. Pwms[devIndex].CountMaxISR.Action();
  59. }
  60. }
  61. }
  62. void iRtPwm_UpdateIsr(uint8_t devIndex)
  63. {
  64. uint32_t base = Pwms[devIndex].PwmBase;
  65. uint32_t ulOvTimeCnt = 0;
  66. if(TIMER_INTF(base) & TIMER_INT_FLAG_UP)
  67. {
  68. if((TIMER_CTL0(base) & TIMER_CTL0_DIR) == 0) // When Counting Up
  69. {
  70. /* TBC Up interrupt */
  71. iRtPwm_CountZeroIsr(devIndex);
  72. }
  73. else
  74. {
  75. /* Reset Timer6 counts*/
  76. iTimer_Reset(HW_TBC_HALF_UPDATE_TIMER);
  77. /* TBC Down interrupt */
  78. iRtPwm_CountMaxIsr(devIndex);
  79. /* Timing management, refer to the Software design description for details */
  80. while ((iTimer_GetCount(HW_TBC_HALF_UPDATE_TIMER) < HW_INIT_PWM_PERIOD) && (ulOvTimeCnt < 10000))
  81. {
  82. ulOvTimeCnt++;
  83. };
  84. /* ADC0 trigger set */
  85. iPwm_SetCompareValueImmediate(0,3,Pwms[0].SyncSamplingUpTick[1]);
  86. /* ADC Enable*/
  87. iAdc_Enable(0);
  88. /* Software trigger for regular sampling*/
  89. iAdc_Convert(0);
  90. /* Compara value load */
  91. iRtPwm_ActivateCompareValues(0);
  92. timer_dma_enable(base,TIMER_DMA_UPD);
  93. dma_channel_enable(DMA0,DMA_CH4);
  94. }
  95. }
  96. /* Timer0 update interrupt flag clear */
  97. TIMER_INTF(base) = ~(uint32_t)TIMER_INT_FLAG_UP;
  98. }
  99. void iRtPwm_SyncSamplingAdcIsr(uint8_t devIndex)
  100. {
  101. if (ADC_STAT(ADC0) & ADC_INT_FLAG_EOIC)
  102. {
  103. Adcs[1].Results[HW_ADC_IA_CH] = ADC_IDATA0(ADC0);
  104. Adcs[1].Results[HW_ADC_IB_CH] = ADC_IDATA1(ADC0);
  105. Adcs[1].Results[HW_ADC_IC_CH] = ADC_IDATA2(ADC0);
  106. /* ADC0 disable */
  107. ADC_CTL1(ADC0) &= ~((uint32_t)ADC_CTL1_ADCON);
  108. /* ADC1 trigger set */
  109. iPwm_SetCompareValueImmediate(0,3,Pwms[0].SyncSamplingUpTick[0]);
  110. /* ADC1 enable */
  111. ADC_CTL1(ADC1) |= (uint32_t)ADC_CTL1_ADCON;
  112. /* ADC0 interrupt flag clear */
  113. ADC_STAT(ADC0) &= ~((uint32_t)ADC_INT_FLAG_EOIC);
  114. }
  115. else if (ADC_STAT(ADC1) & ADC_INT_FLAG_EOIC)
  116. {
  117. if (Pwms[0].SyncSamplingUpTick[0] != HW_INIT_HHHPWM_PERIOD)
  118. {
  119. Adcs[2].Results[HW_ADC_IDC_CH] = ADC_IDATA0(ADC1);
  120. }
  121. /* ADC1 disable */
  122. ADC_CTL1(ADC1) &= ~((uint32_t)ADC_CTL1_ADCON);
  123. /* ADC1 interrupt flag clear */
  124. ADC_STAT(ADC1) &= ~((uint32_t)ADC_INT_FLAG_EOIC);
  125. }
  126. else
  127. {
  128. //do nothing
  129. }
  130. }
  131. void iRtPwm_ActivateCompareValues(uint8_t devIndex)
  132. {
  133. ASSERT_LESS(devIndex, 1);
  134. for (int i = 0; i < 6; i++)
  135. {
  136. Pwms[devIndex].ActiveCompareValues[i] = Pwms[devIndex].CompareValues[i];
  137. }
  138. }
  139. /* ========================================================================== */
  140. /* ============================== API Functions ============================= */
  141. /* ========================================================================== */
  142. uint32_t iPwm_GetClock(uint8_t devIndex)
  143. {
  144. return HW_TIM_CLOCK_HZ;
  145. }
  146. void iPwm_EnableCount(uint8_t devIndex)
  147. {
  148. uint32_t base = Pwms[devIndex].PwmBase;
  149. TIMER_CTL0(base) |= (uint32_t)BIT(0);
  150. }
  151. void iPwm_DisableCount(uint8_t devIndex)
  152. {
  153. uint32_t base = Pwms[devIndex].PwmBase;
  154. TIMER_CTL0(base) &= ~(uint32_t)BIT(0);
  155. }
  156. uint32_t iPwm_GetCountMax(uint8_t devIndex)
  157. {
  158. uint32_t base = Pwms[devIndex].PwmBase;
  159. uint32_t count_value = 0U;
  160. count_value = TIMER_CAR(base);
  161. return count_value;
  162. }
  163. void iPwm_SetCountMax(uint8_t devIndex, uint32_t countMax)
  164. {
  165. uint32_t base = Pwms[devIndex].PwmBase;
  166. TIMER_CAR(base)= countMax;
  167. }
  168. uint32_t iPwm_GetCount(uint8_t devIndex)
  169. {
  170. uint32_t base = Pwms[devIndex].PwmBase;
  171. uint32_t count_value = 0U;
  172. count_value = TIMER_CNT(base);
  173. return count_value;
  174. }
  175. void iPwm_SetCount(uint8_t devIndex, uint32_t count)
  176. {
  177. uint32_t base = Pwms[devIndex].PwmBase;
  178. TIMER_CNT(base)= count;
  179. }
  180. ApiPwm_CountMode iPwm_GetCountMode(uint8_t devIndex)
  181. {
  182. uint32_t base = Pwms[devIndex].PwmBase;
  183. ApiPwm_CountMode mode = ApiPwm_CountUp;
  184. if ((TIMER_CTL0(base) & (uint16_t)0x0060) == (uint16_t)0x0000)
  185. {
  186. if ((TIMER_CTL0(base) & (uint16_t)0x0010) != 0)
  187. {
  188. mode = ApiPwm_CountUp;
  189. }
  190. #if API_FUNCTION_PWM_COUNTDOWN == SUPPORT
  191. else
  192. {
  193. mode = ApiPwm_CountDown;
  194. }
  195. #endif
  196. }
  197. else
  198. {
  199. mode = ApiPwm_CountUpDown;
  200. }
  201. return mode;
  202. }
  203. void iPwm_SetCountMode(uint8_t devIndex, ApiPwm_CountMode mode)
  204. {
  205. uint32_t base = Pwms[devIndex].PwmBase;
  206. switch (mode)
  207. {
  208. case ApiPwm_CountUp:
  209. TIMER_CTL0(base) &= ~((uint16_t)0x0060);
  210. TIMER_CTL0(base) &= ~(uint16_t)0x0010;
  211. break;
  212. #if FUNCTION_PWM_COUNTDOWN == SUPPORT
  213. case ApiPwm_CountDown:
  214. TIMER_CTL0(base) &= ~((uint16_t)0x0060);
  215. TIMER_CTL0(base) |= (uint16_t)0x0010;
  216. break;
  217. #endif
  218. case ApiPwm_CountUpDown:
  219. TIMER_CTL0(base) |= ((uint16_t)0x0060);
  220. break;
  221. default:
  222. break;
  223. }
  224. }
  225. ApiPwm_CompareMode iPwm_GetCompareMode(uint8_t devIndex, uint8_t channelIndex)
  226. {
  227. uint32_t base = Pwms[devIndex].PwmBase;
  228. uint8_t conf = 0;
  229. switch (channelIndex)
  230. {
  231. case 0:
  232. conf = TIMER_CHCTL0(base) & (uint32_t)0x000000F0UL;
  233. break;
  234. case 1:
  235. conf = (TIMER_CHCTL0(base) & (uint32_t)0x0000F000UL) >> 16;
  236. break;
  237. case 2:
  238. conf = TIMER_CHCTL1(base) & (uint32_t)0x000000F0UL;
  239. break;
  240. case 3:
  241. conf = (TIMER_CHCTL1(base) & (uint32_t)0x0000F000UL) >> 16;
  242. break;
  243. default:
  244. break;
  245. }
  246. ApiPwm_CompareMode mode = ApiPwm_NoAction;
  247. switch (conf >> 4)
  248. {
  249. case 0x00:
  250. mode = ApiPwm_NoAction;
  251. break;
  252. case 0x01:
  253. mode = ApiPwm_UpMatchSet;
  254. #if FUNCTION_PWM_COUNTDOWN
  255. if (iPwm_GetCountMode(devIndex) == Pwm_CountDown)
  256. mode = ApiPwm_DownMatchSet;
  257. #endif
  258. break;
  259. case 0x02:
  260. mode = ApiPwm_UpMatchClear;
  261. #if FUNCTION_PWM_COUNTDOWN
  262. if (iPwm_GetCountMode(devIndex) == Pwm_CountDown)
  263. mode = ApiPwm_DownMatchClear;
  264. #endif
  265. break;
  266. case 0x03:
  267. mode = ApiPwm_UpMatchToggle;
  268. #if FUNCTION_PWM_COUNTDOWN
  269. if (iPwm_GetCountMode(devIndex) == Pwm_CountDown)
  270. mode = ApiPwm_DownMatchToggle;
  271. #endif
  272. break;
  273. case 0x04:
  274. mode = ApiPwm_ForceClear;
  275. break;
  276. case 0x05:
  277. mode = ApiPwm_ForceSet;
  278. break;
  279. case 0x06:
  280. mode = ApiPwm_HigherClear;
  281. break;
  282. case 0x07:
  283. mode = ApiPwm_HigherSet;
  284. break;
  285. default:
  286. mode = ApiPwm_NoAction;
  287. break;
  288. }
  289. return mode;
  290. }
  291. void iPwm_SetCompareMode(uint8_t devIndex, uint8_t channelIndex, ApiPwm_CompareMode mode)
  292. {
  293. uint32_t base = Pwms[devIndex].PwmBase;
  294. uint8_t conf = 0;
  295. switch (mode)
  296. {
  297. case ApiPwm_NoAction:
  298. conf = 0x00;
  299. break;
  300. case ApiPwm_UpMatchSet:
  301. conf = 0x01;
  302. break;
  303. case ApiPwm_UpMatchClear:
  304. conf = 0x02;
  305. break;
  306. case ApiPwm_UpMatchToggle:
  307. conf = 0x03;
  308. break;
  309. case ApiPwm_ForceClear:
  310. conf = 0x04;
  311. break;
  312. case ApiPwm_ForceSet:
  313. conf = 0x05;
  314. break;
  315. case ApiPwm_HigherClear:
  316. conf = 0x06;
  317. break;
  318. case ApiPwm_HigherSet:
  319. conf = 0x07;
  320. break;
  321. default:
  322. break;
  323. }
  324. #if API_FUNCTION_PWM_COUNTDOWN
  325. if (iPwm_GetCountMode(devIndex) == ApiPwm_CountDown)
  326. {
  327. switch (mode)
  328. {
  329. case ApiPwm_DownMatchSet:
  330. conf = 0x01;
  331. break;
  332. case ApiPwm_DownMatchClear:
  333. conf = 0x02;
  334. break;
  335. case ApiPwm_DownMatchToggle:
  336. conf = 0x03;
  337. break;
  338. }
  339. }
  340. #endif
  341. switch (channelIndex)
  342. {
  343. case 0:
  344. TIMER_CHCTL0(base) &= ~((uint32_t)0x000000F0UL);
  345. TIMER_CHCTL0(base) |= (((uint32_t)conf) << 4);
  346. break;
  347. case 1:
  348. TIMER_CHCTL0(base) &= ~((uint32_t)0x0000F000UL);
  349. TIMER_CHCTL0(base) |= (((uint32_t)conf) << (4 + 8));
  350. break;
  351. case 2:
  352. TIMER_CHCTL0(base) &= ~((uint32_t)0x000000F0UL);
  353. TIMER_CHCTL0(base) |= (((uint32_t)conf) << 4);
  354. break;
  355. case 3:
  356. TIMER_CHCTL0(base) &= ~((uint32_t)0x0000F000UL);
  357. TIMER_CHCTL0(base) |= (((uint32_t)conf) << (4 + 8));
  358. break;
  359. }
  360. }
  361. uint32_t iPwm_GetCompareValue(uint8_t devIndex, uint8_t channelIndex)
  362. {
  363. uint32_t base = Pwms[devIndex].PwmBase;
  364. uint32_t value = 0;
  365. switch (channelIndex)
  366. {
  367. case 0:
  368. value = TIMER_CH0CV(base);
  369. break;
  370. case 1:
  371. value = TIMER_CH1CV(base);
  372. break;
  373. case 2:
  374. value = TIMER_CH2CV(base);
  375. break;
  376. case 3:
  377. value = TIMER_CH3CV(base);
  378. break;
  379. default:
  380. break;
  381. }
  382. return value;
  383. }
  384. void iPwm_SetCompareValue(uint8_t devIndex, uint8_t channelIndex, uint32_t value)
  385. {
  386. ASSERT_LESS(devIndex, 1);
  387. ASSERT_LESS(channelIndex, 3);
  388. Pwms[devIndex].CompareValues[channelIndex] = value;
  389. }
  390. void iPwm_SetCompareValueDelay(uint8_t devIndex, uint8_t channelIndex, uint32_t value)
  391. {
  392. ASSERT_LESS(devIndex, 1);
  393. ASSERT_LESS(channelIndex, 3);
  394. Pwms[devIndex].CompareValues[channelIndex + 3] = value;
  395. }
  396. void iPwm_SetCompareGroupValues16(uint8_t devIndex, uint16_t* values)
  397. {
  398. for (int i = 0; i < 6; i++)
  399. {
  400. Pwms[devIndex].CompareValues[i] = values[i];
  401. }
  402. }
  403. void iPwm_SetCompareValueImmediate(uint8_t devIndex, uint8_t channelIndex, uint32_t value)
  404. {
  405. ASSERT_LESS(devIndex, 1);
  406. ASSERT_LESS(channelIndex, 4);
  407. uint32_t base = Pwms[devIndex].PwmBase;
  408. switch (channelIndex)
  409. {
  410. case 0:
  411. TIMER_CH0CV(base) = value;
  412. break;
  413. case 1:
  414. TIMER_CH1CV(base) = value;
  415. break;
  416. case 2:
  417. TIMER_CH2CV(base) = value;
  418. break;
  419. case 3:
  420. TIMER_CH3CV(base) = value;
  421. break;
  422. default:
  423. break;
  424. }
  425. }
  426. int8_t iPwm_GetEnableState(uint8_t devIndex)
  427. {
  428. ASSERT_LESS(devIndex, 1);
  429. return Pwms[devIndex].OutputEnable;
  430. }
  431. void iPwm_EnableOutput(uint8_t devIndex)
  432. {
  433. ASSERT_LESS(devIndex, 1);
  434. uint32_t base = Pwms[devIndex].PwmBase;
  435. TIMER_CCHP(base) |= (uint32_t)0x00008000UL;
  436. Pwms[devIndex].OutputEnable = 1;
  437. }
  438. void iPwm_DisableOutput(uint8_t devIndex)
  439. {
  440. ASSERT_LESS(devIndex, 1);
  441. uint32_t base = Pwms[devIndex].PwmBase;
  442. TIMER_CCHP(base) &= ~((uint32_t)0x00008000UL);
  443. Pwms[devIndex].OutputEnable = 0;
  444. }
  445. int8_t iPwm_GetChannelEnableState(uint8_t devIndex, uint8_t channelIndex)
  446. {
  447. // ASSERT_LESS(devIndex, 1);
  448. // ////ASSERT_LESS(channelIndex, 4);
  449. //
  450. // uint32_t base = Pwms[devIndex].PwmBase;
  451. // uint32_t value = 0;
  452. //
  453. // if (channelIndex < 64)
  454. // {
  455. // value = ((uint32_t)0x01) << (channelIndex * 4);
  456. // }
  457. // else
  458. // {
  459. // value = ((uint32_t)0x04) << ((channelIndex - 64) * 4);
  460. // }
  461. //
  462. // return ((TIMER_CHCTL2(base) & value) >> value);
  463. }
  464. void iPwm_EnableChannelOutput(uint8_t devIndex, uint8_t channelIndex)
  465. {
  466. ASSERT_LESS(devIndex, 1);
  467. ////ASSERT_LESS(channelIndex, 4);
  468. uint32_t base = Pwms[devIndex].PwmBase;
  469. if (channelIndex < 64)
  470. {
  471. TIMER_CHCTL2(base)|= ((uint32_t)0x01) << (channelIndex * 4);
  472. }
  473. else
  474. {
  475. TIMER_CHCTL2(base)|= ((uint32_t)0x04) << ((channelIndex - 64) * 4);
  476. }
  477. }
  478. void iPwm_DisableChannelOutput(uint8_t devIndex, uint8_t channelIndex)
  479. {
  480. ASSERT_LESS(devIndex, 1);
  481. ////ASSERT_LESS(channelIndex, 4);
  482. uint32_t base = Pwms[devIndex].PwmBase;
  483. if (channelIndex < 64)
  484. {
  485. TIMER_CHCTL2(base)&= ~(((uint32_t)0x01) << (channelIndex * 4));
  486. }
  487. else
  488. {
  489. TIMER_CHCTL2(base) &= ~(((uint32_t)0x04) << ((channelIndex - 64) * 4));
  490. }
  491. }
  492. void iPwm_EnableDeviceInterrupt(uint8_t devIndex, ApiPwm_DeviceInterrupt interrupt)
  493. {
  494. ASSERT_LESS(devIndex, 1);
  495. switch (interrupt)
  496. {
  497. case ApiPwm_CountZeroInt:
  498. Pwms[devIndex].CountZeroISR.Enable = 1;
  499. break;
  500. case ApiPwm_CountMaxInt:
  501. Pwms[devIndex].CountMaxISR.Enable = 1;
  502. break;
  503. case ApiPwm_BreakInt:
  504. Pwms[devIndex].BreakISR.Enable = 1;
  505. break;
  506. default:
  507. break;
  508. }
  509. }
  510. void iPwm_DisableDeviceInterrupt(uint8_t devIndex, ApiPwm_DeviceInterrupt interrupt)
  511. {
  512. ASSERT_LESS(devIndex, 1);
  513. switch (interrupt)
  514. {
  515. case ApiPwm_CountZeroInt:
  516. Pwms[devIndex].CountZeroISR.Enable = 0;
  517. break;
  518. case ApiPwm_CountMaxInt:
  519. Pwms[devIndex].CountMaxISR.Enable = 0;
  520. break;
  521. case ApiPwm_BreakInt:
  522. Pwms[devIndex].BreakISR.Enable = 0;
  523. break;
  524. default:
  525. break;
  526. }
  527. }
  528. void iPwm_EnableChannelInterrupt(uint8_t devIndex, uint8_t channelIndex, ApiPwm_ChannelInterrupt interrupt)
  529. {
  530. ASSERT_LESS(devIndex, 1);
  531. ASSERT_LESS(channelIndex, 4);
  532. Pwms[devIndex].ChannelISR[channelIndex].Enable = 1;
  533. }
  534. void iPwm_DisableChannelInterrupt(uint8_t devIndex, uint8_t channelIndex, ApiPwm_ChannelInterrupt interrupt)
  535. {
  536. ASSERT_LESS(devIndex, 1);
  537. ASSERT_LESS(channelIndex, 4);
  538. Pwms[devIndex].ChannelISR[channelIndex].Enable = 0;
  539. }
  540. void iPwm_BindDeviceInterrupt(uint8_t devIndex, ApiPwm_DeviceInterrupt interrupt, void (*action)())
  541. {
  542. ASSERT_LESS(devIndex, 1);
  543. switch (interrupt)
  544. {
  545. case ApiPwm_CountZeroInt:
  546. Pwms[devIndex].CountZeroISR.Action = action;
  547. break;
  548. case ApiPwm_CountMaxInt:
  549. Pwms[devIndex].CountMaxISR.Action = action;
  550. break;
  551. case ApiPwm_BreakInt:
  552. Pwms[devIndex].BreakISR.Action = action;
  553. break;
  554. default:
  555. break;
  556. }
  557. }
  558. void iPwm_BindChannelInterrupt(uint8_t devIndex, uint8_t channelIndex, ApiPwm_DeviceInterrupt interrupt, void (*action)())
  559. {
  560. ASSERT_LESS(devIndex, 1);
  561. ASSERT_LESS(channelIndex, 4);
  562. Pwms[devIndex].ChannelISR[channelIndex].Action = action;
  563. }
  564. int8_t iPwm_GetBreakState(uint8_t devIndex)
  565. {
  566. ASSERT_LESS(devIndex, 1);
  567. uint32_t base = Pwms[devIndex].PwmBase;
  568. return (TIMER_INTF(base) & ((uint32_t)0x00000080UL)) ? 1 : 0;
  569. }
  570. void iPwm_ClearBreak(uint8_t devIndex)
  571. {
  572. ASSERT_LESS(devIndex, 1);
  573. uint32_t base = Pwms[devIndex].PwmBase;
  574. TIMER_INTF(base) &= ~((uint32_t)0x00000080UL);
  575. }
  576. #if API_FUNCTION_PWM_SYNC_MULTI_SAMPLING
  577. void iPwm_EnableSyncMultiSampling(uint8_t devIndex)
  578. {
  579. Pwms[devIndex].SyncSamplingEnable = 1;
  580. }
  581. void iPwm_DisableSyncMultiSampling(uint8_t devIndex)
  582. {
  583. Pwms[devIndex].SyncSamplingEnable = 0;
  584. Pwms[devIndex].SyncSamplingUpTickCount = 1;
  585. Pwms[devIndex].SyncSamplingUpTick[0] = TIMER_CAR(Pwms[devIndex].PwmBase)>> 1;
  586. Pwms[devIndex].SyncSamplingDownTickCount = 1;
  587. Pwms[devIndex].SyncSamplingDownTick[0] = TIMER_CAR(Pwms[devIndex].PwmBase)>> 1;
  588. }
  589. void iPwm_SyncMultiSamplingCountUp(uint8_t devIndex, uint32_t samplingTicks[], uint8_t samplingCounts)
  590. {
  591. if (Pwms[devIndex].SyncSamplingEnable == 1)
  592. {
  593. Pwms[devIndex].SyncSamplingUpTickCount = samplingCounts;
  594. for (int i = 0; i < samplingCounts; i++)
  595. {
  596. Pwms[devIndex].SyncSamplingUpTick[i] = samplingTicks[i];
  597. }
  598. }
  599. }
  600. void iPwm_SyncMultiSamplingCountDown(uint8_t devIndex, uint32_t samplingTicks[], uint8_t samplingCounts)
  601. {
  602. if (Pwms[devIndex].SyncSamplingEnable == 1)
  603. {
  604. Pwms[devIndex].SyncSamplingDownTickCount = samplingCounts;
  605. for (int i = 0; i < samplingCounts; i++)
  606. {
  607. Pwms[devIndex].SyncSamplingDownTick[i] = samplingTicks[i];
  608. }
  609. }
  610. }
  611. #endif