PmsmSimUt.cpp 27 KB

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  1. //
  2. // File: PmsmSimUt.cpp
  3. //
  4. // Code generated for Simulink model 'PmsmSimUt'.
  5. //
  6. // Model version : 1.18
  7. // Simulink Coder version : 9.4 (R2020b) 29-Jul-2020
  8. // C/C++ source code generated on : Tue Aug 1 23:42:37 2023
  9. //
  10. // Target selection: ert.tlc
  11. // Embedded hardware selection: Intel->x86-64 (Windows64)
  12. // Code generation objectives: Unspecified
  13. // Validation result: Not run
  14. //
  15. #include "PmsmSimUt.h"
  16. #include "PmsmSimUt_private.h"
  17. void PmsmSimUtModelClass::PmsmSimUt_reset()
  18. {
  19. // Outputs for Atomic SubSystem: '<Root>/Initialize Function'
  20. // StateWriter: '<S2>/State Writer' incorporates:
  21. // Constant: '<S2>/Constant4'
  22. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c = PmsmSimUt_P.Params.Flux;
  23. // End of Outputs for SubSystem: '<Root>/Initialize Function'
  24. }
  25. real_T rt_modd_snf(real_T u0, real_T u1)
  26. {
  27. real_T q;
  28. real_T y;
  29. boolean_T yEq;
  30. y = u0;
  31. if (u1 == 0.0) {
  32. if (u0 == 0.0) {
  33. y = u1;
  34. }
  35. } else if (rtIsNaN(u0) || rtIsNaN(u1) || rtIsInf(u0)) {
  36. y = (rtNaN);
  37. } else if (u0 == 0.0) {
  38. y = 0.0 / u1;
  39. } else if (rtIsInf(u1)) {
  40. if ((u1 < 0.0) != (u0 < 0.0)) {
  41. y = u1;
  42. }
  43. } else {
  44. y = std::fmod(u0, u1);
  45. yEq = (y == 0.0);
  46. if ((!yEq) && (u1 > std::floor(u1))) {
  47. q = std::abs(u0 / u1);
  48. yEq = !(std::abs(q - std::floor(q + 0.5)) > DBL_EPSILON * q);
  49. }
  50. if (yEq) {
  51. y = u1 * 0.0;
  52. } else {
  53. if ((u0 < 0.0) != (u1 < 0.0)) {
  54. y += u1;
  55. }
  56. }
  57. }
  58. return y;
  59. }
  60. // Model step function
  61. void PmsmSimUtModelClass::step()
  62. {
  63. real_T rtb_Gain1_c[3];
  64. real_T rtb_Add1;
  65. real_T rtb_Add2;
  66. real_T rtb_Add2_tmp_tmp;
  67. real_T rtb_Add2_tmp_tmp_0;
  68. real_T rtb_Fcn1;
  69. real_T rtb_Gain;
  70. real_T rtb_Gain1_i;
  71. real_T rtb_Gain2_k;
  72. real_T rtb_Mod;
  73. real_T rtb_Relay2;
  74. real_T rtb_Switch_h;
  75. real_T rtb_Switch_idx_0;
  76. real_T rtb_Switch_idx_1;
  77. real_T rtb_a;
  78. real_T rtb_id;
  79. real_T rtb_iq;
  80. int32_T i;
  81. uint8_T rtb_Compare;
  82. // Math: '<S18>/Mod' incorporates:
  83. // Constant: '<S18>/Constant'
  84. // DiscreteIntegrator: '<S18>/Discrete-Time Integrator'
  85. rtb_Mod = rt_modd_snf(PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE,
  86. PmsmSimUt_P.Constant_Value);
  87. // Fcn: '<S17>/iq' incorporates:
  88. // Constant: '<S17>/Constant3'
  89. // DiscreteIntegrator: '<S17>/Discrete-Time Integrator1'
  90. rtb_iq = PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE / PmsmSimUt_P.Params.Lq;
  91. // Fcn: '<S17>/id' incorporates:
  92. // Constant: '<S17>/Constant1'
  93. // Constant: '<S17>/Constant2'
  94. // DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
  95. rtb_id = (PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c -
  96. PmsmSimUt_P.Params.Flux) / PmsmSimUt_P.Params.Ld;
  97. // Outputs for Enabled SubSystem: '<S21>/Subsystem - pi//2 delay' incorporates:
  98. // EnablePort: '<S25>/Enable'
  99. // Outputs for Enabled SubSystem: '<S21>/Subsystem1' incorporates:
  100. // EnablePort: '<S26>/Enable'
  101. // Fcn: '<S29>/Fcn' incorporates:
  102. // Fcn: '<S25>/Fcn'
  103. // Fcn: '<S25>/Fcn1'
  104. // Fcn: '<S26>/Fcn'
  105. rtb_Add2_tmp_tmp = std::sin(rtb_Mod);
  106. rtb_Add2_tmp_tmp_0 = std::cos(rtb_Mod);
  107. // End of Outputs for SubSystem: '<S21>/Subsystem1'
  108. // End of Outputs for SubSystem: '<S21>/Subsystem - pi//2 delay'
  109. rtb_Add2 = rtb_Add2_tmp_tmp_0 * rtb_id - rtb_Add2_tmp_tmp * rtb_iq;
  110. // Fcn: '<S29>/Fcn1' incorporates:
  111. // Fcn: '<S29>/Fcn'
  112. rtb_a = rtb_Add2_tmp_tmp * rtb_id + rtb_Add2_tmp_tmp_0 * rtb_iq;
  113. // Gain: '<S30>/K1' incorporates:
  114. // Constant: '<S10>/Constant'
  115. rtb_Gain1_i = PmsmSimUt_P.K1_Gain * PmsmSimUt_P.Constant_Value_e;
  116. // Fcn: '<S30>/a'
  117. rtb_Gain2_k = rtb_Add2 + rtb_Gain1_i;
  118. // Fcn: '<S30>/b'
  119. rtb_Fcn1 = (-0.5 * rtb_Add2 + 0.8660254037844386 * rtb_a) + rtb_Gain1_i;
  120. // Fcn: '<S30>/c'
  121. rtb_Add2 = (-0.5 * rtb_Add2 - 0.8660254037844386 * rtb_a) + rtb_Gain1_i;
  122. // Outport: '<Root>/Out' incorporates:
  123. // Gain: '<S30>/K2'
  124. PmsmSimUt_Y.Out.Iabc[0] = PmsmSimUt_P.K2_Gain * rtb_Gain2_k;
  125. PmsmSimUt_Y.Out.Iabc[1] = PmsmSimUt_P.K2_Gain * rtb_Fcn1;
  126. PmsmSimUt_Y.Out.Iabc[2] = PmsmSimUt_P.K2_Gain * rtb_Add2;
  127. // Switch: '<Root>/Switch2' incorporates:
  128. // Inport: '<Root>/ObsIn'
  129. if (PmsmSimUt_U.ObsIn.Enable > PmsmSimUt_P.Switch2_Threshold) {
  130. rtb_Fcn1 = PmsmSimUt_U.ObsIn.Theta;
  131. } else {
  132. rtb_Fcn1 = rtb_Mod;
  133. }
  134. // End of Switch: '<Root>/Switch2'
  135. // Gain: '<S17>/Gain' incorporates:
  136. // DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
  137. // DiscreteIntegrator: '<S17>/Discrete-Time Integrator1'
  138. // Fcn: '<S17>/Te//p=(3//2)*(Flux_d*iq-Flux_q*id)'
  139. rtb_Gain = (PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c * rtb_iq -
  140. PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE * rtb_id) * 1.5 *
  141. PmsmSimUt_P.Params.Pn;
  142. // Outputs for Enabled SubSystem: '<S18>/Subsystem' incorporates:
  143. // EnablePort: '<S19>/Enable'
  144. // Constant: '<Root>/Constant2'
  145. if (PmsmSimUt_P.Params.SpdCtrl > 0.0) {
  146. // DiscreteIntegrator: '<S19>/Discrete-Time Integrator1'
  147. PmsmSimUt_B.DiscreteTimeIntegrator1 =
  148. PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTAT_d;
  149. // Update for DiscreteIntegrator: '<S19>/Discrete-Time Integrator1' incorporates:
  150. // Constant: '<S19>/Constant1'
  151. // Gain: '<S19>/Gain'
  152. // Gain: '<S19>/Gain1'
  153. // Inport: '<Root>/CtrlIn'
  154. // Product: '<S19>/Divide'
  155. // Sum: '<S19>/Sum'
  156. PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTAT_d += ((rtb_Gain -
  157. PmsmSimUt_P.Params.B * PmsmSimUt_B.DiscreteTimeIntegrator1) -
  158. PmsmSimUt_U.CtrlIn.Tm) / PmsmSimUt_P.Params.Jm * PmsmSimUt_P.Params.Ts *
  159. PmsmSimUt_P.DiscreteTimeIntegrator1_gainval;
  160. }
  161. // End of Outputs for SubSystem: '<S18>/Subsystem'
  162. // Switch: '<S18>/Switch' incorporates:
  163. // Constant: '<Root>/Constant2'
  164. // Constant: '<Root>/Constant4'
  165. // Gain: '<S18>/Gain3'
  166. if (PmsmSimUt_P.Params.SpdCtrl > PmsmSimUt_P.Switch_Threshold) {
  167. rtb_Gain2_k = PmsmSimUt_B.DiscreteTimeIntegrator1;
  168. } else {
  169. rtb_Gain2_k = PmsmSimUt_P.Gain3_Gain * PmsmSimUt_P.Params.SpdRpm;
  170. }
  171. // End of Switch: '<S18>/Switch'
  172. // Gain: '<S18>/Gain1'
  173. rtb_Gain1_i = PmsmSimUt_P.Params.Pn * rtb_Gain2_k;
  174. // Switch: '<Root>/Switch3' incorporates:
  175. // Inport: '<Root>/ObsIn'
  176. if (PmsmSimUt_U.ObsIn.Enable > PmsmSimUt_P.Switch3_Threshold) {
  177. rtb_a = PmsmSimUt_U.ObsIn.We;
  178. } else {
  179. rtb_a = rtb_Gain1_i;
  180. }
  181. // End of Switch: '<Root>/Switch3'
  182. // RelationalOperator: '<S11>/Compare' incorporates:
  183. // Constant: '<S11>/Constant'
  184. // Constant: '<S1>/Constant'
  185. rtb_Compare = (PmsmSimUt_P.AlphaBetaZerotodq0_Alignment ==
  186. PmsmSimUt_P.CompareToConstant_const);
  187. // Sum: '<Root>/Add' incorporates:
  188. // Inport: '<Root>/ObsIn'
  189. rtb_Add2 = PmsmSimUt_U.ObsIn.Theta - rtb_Mod;
  190. // Outputs for Enabled SubSystem: '<S1>/Subsystem1' incorporates:
  191. // EnablePort: '<S14>/Enable'
  192. if (rtb_Compare > 0) {
  193. // Fcn: '<S14>/Fcn' incorporates:
  194. // Fcn: '<S14>/Fcn1'
  195. rtb_Add1 = std::sin(rtb_Add2);
  196. rtb_Switch_h = std::cos(rtb_Add2);
  197. // Fcn: '<S14>/Fcn'
  198. PmsmSimUt_B.Fcn_g = rtb_id * rtb_Switch_h + rtb_iq * rtb_Add1;
  199. // Fcn: '<S14>/Fcn1'
  200. PmsmSimUt_B.Fcn1_e = -rtb_id * rtb_Add1 + rtb_iq * rtb_Switch_h;
  201. }
  202. // End of Outputs for SubSystem: '<S1>/Subsystem1'
  203. // Outputs for Enabled SubSystem: '<S1>/Subsystem - pi//2 delay' incorporates:
  204. // EnablePort: '<S13>/Enable'
  205. // RelationalOperator: '<S12>/Compare' incorporates:
  206. // Constant: '<S12>/Constant'
  207. // Constant: '<S1>/Constant'
  208. if (PmsmSimUt_P.AlphaBetaZerotodq0_Alignment ==
  209. PmsmSimUt_P.CompareToConstant1_const) {
  210. // Fcn: '<S13>/Fcn'
  211. PmsmSimUt_B.Fcn_b = rtb_id * std::sin(rtb_Add2) - rtb_iq * std::cos(rtb_Add2);
  212. // Fcn: '<S13>/Fcn1'
  213. PmsmSimUt_B.Fcn1_n = rtb_id * std::cos(rtb_Add2) + rtb_iq * std::sin
  214. (rtb_Add2);
  215. }
  216. // End of RelationalOperator: '<S12>/Compare'
  217. // End of Outputs for SubSystem: '<S1>/Subsystem - pi//2 delay'
  218. // Switch: '<S1>/Switch'
  219. if (rtb_Compare != 0) {
  220. rtb_Switch_idx_0 = PmsmSimUt_B.Fcn_g;
  221. rtb_Switch_idx_1 = PmsmSimUt_B.Fcn1_e;
  222. } else {
  223. rtb_Switch_idx_0 = PmsmSimUt_B.Fcn_b;
  224. rtb_Switch_idx_1 = PmsmSimUt_B.Fcn1_n;
  225. }
  226. // End of Switch: '<S1>/Switch'
  227. // Switch: '<Root>/Switch5' incorporates:
  228. // Inport: '<Root>/ObsIn'
  229. if (PmsmSimUt_U.ObsIn.Enable > PmsmSimUt_P.Switch5_Threshold) {
  230. rtb_Add2 = rtb_Switch_idx_1;
  231. } else {
  232. rtb_Add2 = rtb_iq;
  233. }
  234. // End of Switch: '<Root>/Switch5'
  235. // Switch: '<Root>/Switch4' incorporates:
  236. // Inport: '<Root>/ObsIn'
  237. if (PmsmSimUt_U.ObsIn.Enable > PmsmSimUt_P.Switch4_Threshold) {
  238. rtb_Add1 = rtb_Switch_idx_0;
  239. } else {
  240. rtb_Add1 = rtb_id;
  241. }
  242. // End of Switch: '<Root>/Switch4'
  243. // ManualSwitch: '<Root>/Manual Switch1' incorporates:
  244. // Constant: '<Root>/Constant5'
  245. // Constant: '<Root>/Constant6'
  246. if (PmsmSimUt_P.ManualSwitch1_CurrentSetting == 1) {
  247. rtb_Switch_idx_0 = PmsmSimUt_P.Constant5_Value;
  248. } else {
  249. rtb_Switch_idx_0 = PmsmSimUt_P.Constant6_Value;
  250. }
  251. // End of ManualSwitch: '<Root>/Manual Switch1'
  252. // Product: '<S6>/Product' incorporates:
  253. // Constant: '<S6>/Constant1'
  254. // Constant: '<S6>/Constant2'
  255. // Product: '<S6>/Product2'
  256. // Product: '<S6>/Product3'
  257. // Sum: '<S6>/Sum'
  258. rtb_Switch_idx_1 = (rtb_Add1 * PmsmSimUt_P.Params.Ld + PmsmSimUt_P.Params.Flux)
  259. * rtb_a * rtb_Switch_idx_0;
  260. // Sum: '<Root>/Add1' incorporates:
  261. // Inport: '<Root>/CtrlIn'
  262. rtb_Add1 = PmsmSimUt_U.CtrlIn.IdCmd - rtb_Add1;
  263. // Switch: '<Root>/Switch1' incorporates:
  264. // Constant: '<S6>/Constant3'
  265. // Gain: '<S6>/Gain1'
  266. // Inport: '<Root>/ICtrlIn'
  267. // Product: '<S6>/Product'
  268. // Product: '<S6>/Product1'
  269. // Sum: '<Root>/Sum1'
  270. if (PmsmSimUt_U.ICtrlIn.Enable > PmsmSimUt_P.Switch1_Threshold) {
  271. rtb_Switch_idx_0 = PmsmSimUt_U.ICtrlIn.UdCtrl;
  272. } else {
  273. // Sum: '<S16>/Sum6' incorporates:
  274. // DiscreteIntegrator: '<S16>/Discrete-Time Integrator'
  275. // Gain: '<S16>/Kp4'
  276. rtb_Relay2 = PmsmSimUt_P.Params.CKpd * rtb_Add1 +
  277. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_j;
  278. // Saturate: '<S16>/Saturation2'
  279. if (rtb_Relay2 > PmsmSimUt_P.Saturation2_UpperSat_o) {
  280. rtb_Relay2 = PmsmSimUt_P.Saturation2_UpperSat_o;
  281. } else {
  282. if (rtb_Relay2 < PmsmSimUt_P.Saturation2_LowerSat_o) {
  283. rtb_Relay2 = PmsmSimUt_P.Saturation2_LowerSat_o;
  284. }
  285. }
  286. // End of Saturate: '<S16>/Saturation2'
  287. rtb_Switch_idx_0 = PmsmSimUt_P.Gain1_Gain * rtb_a * rtb_Add2 *
  288. PmsmSimUt_P.Params.Lq * rtb_Switch_idx_0 + rtb_Relay2;
  289. }
  290. // End of Switch: '<Root>/Switch1'
  291. // Outputs for Enabled SubSystem: '<Root>/Subsystem' incorporates:
  292. // EnablePort: '<S5>/Enable'
  293. // Logic: '<Root>/AND' incorporates:
  294. // Constant: '<Root>/Constant1'
  295. // Constant: '<Root>/Constant3'
  296. // Logic: '<Root>/NOT'
  297. if ((!(PmsmSimUt_P.Params.CustomSpdCtrl != 0.0)) &&
  298. (PmsmSimUt_P.Params.SpdCtrl != 0.0)) {
  299. PmsmSimUt_DW.Subsystem_MODE = true;
  300. // Saturate: '<Root>/Saturation2' incorporates:
  301. // Memory: '<S7>/Memory'
  302. if (PmsmSimUt_DW.Memory_PreviousInput > PmsmSimUt_P.Saturation2_UpperSat_p)
  303. {
  304. rtb_Switch_h = PmsmSimUt_P.Saturation2_UpperSat_p;
  305. } else if (PmsmSimUt_DW.Memory_PreviousInput <
  306. PmsmSimUt_P.Saturation2_LowerSat_f) {
  307. rtb_Switch_h = PmsmSimUt_P.Saturation2_LowerSat_f;
  308. } else {
  309. rtb_Switch_h = PmsmSimUt_DW.Memory_PreviousInput;
  310. }
  311. // End of Saturate: '<Root>/Saturation2'
  312. // Sum: '<S5>/Add4' incorporates:
  313. // Gain: '<Root>/Gain1'
  314. rtb_Relay2 = rtb_Switch_h - 9.5492965855137211 / PmsmSimUt_P.Params.Pn *
  315. rtb_a;
  316. // DiscreteIntegrator: '<S20>/Discrete-Time Integrator'
  317. PmsmSimUt_B.DiscreteTimeIntegrator =
  318. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_n;
  319. // Sum: '<S20>/Sum6' incorporates:
  320. // Gain: '<S20>/Kp4'
  321. PmsmSimUt_B.Iq_ref = PmsmSimUt_P.Params.SKp * rtb_Relay2 +
  322. PmsmSimUt_B.DiscreteTimeIntegrator;
  323. // Saturate: '<S20>/Saturation2'
  324. if (PmsmSimUt_B.Iq_ref > PmsmSimUt_P.Saturation2_UpperSat) {
  325. // Sum: '<S20>/Sum6' incorporates:
  326. // Saturate: '<S20>/Saturation2'
  327. PmsmSimUt_B.Iq_ref = PmsmSimUt_P.Saturation2_UpperSat;
  328. } else {
  329. if (PmsmSimUt_B.Iq_ref < PmsmSimUt_P.Saturation2_LowerSat) {
  330. // Sum: '<S20>/Sum6' incorporates:
  331. // Saturate: '<S20>/Saturation2'
  332. PmsmSimUt_B.Iq_ref = PmsmSimUt_P.Saturation2_LowerSat;
  333. }
  334. }
  335. // End of Saturate: '<S20>/Saturation2'
  336. // Update for DiscreteIntegrator: '<S20>/Discrete-Time Integrator' incorporates:
  337. // Gain: '<S20>/Gain'
  338. // Gain: '<S20>/Kp5'
  339. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_n += PmsmSimUt_P.Params.SKi *
  340. rtb_Relay2 * PmsmSimUt_P.Params.Ts *
  341. PmsmSimUt_P.DiscreteTimeIntegrator_gainval;
  342. if (PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_n >=
  343. PmsmSimUt_P.DiscreteTimeIntegrator_UpperSat) {
  344. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_n =
  345. PmsmSimUt_P.DiscreteTimeIntegrator_UpperSat;
  346. } else {
  347. if (PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_n <=
  348. PmsmSimUt_P.DiscreteTimeIntegrator_LowerSat) {
  349. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_n =
  350. PmsmSimUt_P.DiscreteTimeIntegrator_LowerSat;
  351. }
  352. }
  353. // End of Update for DiscreteIntegrator: '<S20>/Discrete-Time Integrator'
  354. // Switch: '<Root>/Switch'
  355. rtb_Switch_h = PmsmSimUt_B.Iq_ref;
  356. } else {
  357. if (PmsmSimUt_DW.Subsystem_MODE) {
  358. // Disable for DiscreteIntegrator: '<S20>/Discrete-Time Integrator'
  359. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_n =
  360. PmsmSimUt_B.DiscreteTimeIntegrator;
  361. PmsmSimUt_DW.Subsystem_MODE = false;
  362. }
  363. // Switch: '<Root>/Switch' incorporates:
  364. // Inport: '<Root>/CtrlIn'
  365. rtb_Switch_h = PmsmSimUt_U.CtrlIn.IqCmd;
  366. }
  367. // End of Logic: '<Root>/AND'
  368. // End of Outputs for SubSystem: '<Root>/Subsystem'
  369. // Sum: '<Root>/Add2'
  370. rtb_Add2 = rtb_Switch_h - rtb_Add2;
  371. // Switch: '<Root>/Switch6' incorporates:
  372. // Inport: '<Root>/ICtrlIn'
  373. // Sum: '<Root>/Sum'
  374. if (PmsmSimUt_U.ICtrlIn.Enable > PmsmSimUt_P.Switch6_Threshold) {
  375. rtb_a = PmsmSimUt_U.ICtrlIn.UqCtrl;
  376. } else {
  377. // Sum: '<S15>/Sum6' incorporates:
  378. // DiscreteIntegrator: '<S15>/Discrete-Time Integrator'
  379. // Gain: '<S15>/Kp4'
  380. rtb_Relay2 = PmsmSimUt_P.Params.CKpq * rtb_Add2 +
  381. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_g;
  382. // Saturate: '<S15>/Saturation2'
  383. if (rtb_Relay2 > PmsmSimUt_P.Saturation2_UpperSat_b) {
  384. rtb_Relay2 = PmsmSimUt_P.Saturation2_UpperSat_b;
  385. } else {
  386. if (rtb_Relay2 < PmsmSimUt_P.Saturation2_LowerSat_j) {
  387. rtb_Relay2 = PmsmSimUt_P.Saturation2_LowerSat_j;
  388. }
  389. }
  390. // End of Saturate: '<S15>/Saturation2'
  391. rtb_a = rtb_Switch_idx_1 + rtb_Relay2;
  392. }
  393. // End of Switch: '<Root>/Switch6'
  394. // Fcn: '<S27>/Fcn' incorporates:
  395. // Fcn: '<S27>/Fcn1'
  396. rtb_Relay2 = std::sin(rtb_Fcn1);
  397. rtb_Fcn1 = std::cos(rtb_Fcn1);
  398. rtb_Switch_idx_1 = rtb_Fcn1 * rtb_Switch_idx_0 - rtb_Relay2 * rtb_a;
  399. // Fcn: '<S27>/Fcn1'
  400. rtb_Fcn1 = rtb_Relay2 * rtb_Switch_idx_0 + rtb_Fcn1 * rtb_a;
  401. // Gain: '<S28>/K1' incorporates:
  402. // Constant: '<S9>/Constant'
  403. rtb_Switch_idx_0 = PmsmSimUt_P.K1_Gain_j * PmsmSimUt_P.Constant_Value_p;
  404. // Fcn: '<S28>/a'
  405. rtb_a = rtb_Switch_idx_1 + rtb_Switch_idx_0;
  406. // Fcn: '<S28>/b'
  407. rtb_Relay2 = (-0.5 * rtb_Switch_idx_1 + 0.8660254037844386 * rtb_Fcn1) +
  408. rtb_Switch_idx_0;
  409. // Fcn: '<S28>/c'
  410. rtb_Switch_idx_1 = (-0.5 * rtb_Switch_idx_1 - 0.8660254037844386 * rtb_Fcn1) +
  411. rtb_Switch_idx_0;
  412. // Gain: '<S28>/K2'
  413. rtb_a *= PmsmSimUt_P.K2_Gain_b;
  414. rtb_Fcn1 = PmsmSimUt_P.K2_Gain_b * rtb_Relay2;
  415. rtb_Relay2 = PmsmSimUt_P.K2_Gain_b * rtb_Switch_idx_1;
  416. for (i = 0; i < 3; i++) {
  417. // Gain: '<S22>/Gain1' incorporates:
  418. // Gain: '<S22>/Gain3'
  419. rtb_Gain1_c[i] = PmsmSimUt_P.Gain1_Gain_e * (PmsmSimUt_P.Gain3_Gain_j[i + 6]
  420. * rtb_Relay2 + (PmsmSimUt_P.Gain3_Gain_j[i + 3] * rtb_Fcn1 +
  421. PmsmSimUt_P.Gain3_Gain_j[i] * rtb_a));
  422. }
  423. // RelationalOperator: '<S23>/Compare' incorporates:
  424. // Constant: '<S21>/Constant'
  425. // Constant: '<S23>/Constant'
  426. rtb_Compare = (PmsmSimUt_P.AlphaBetaZerotodq0_Alignment_e ==
  427. PmsmSimUt_P.CompareToConstant_const_a);
  428. // Outputs for Enabled SubSystem: '<S21>/Subsystem1' incorporates:
  429. // EnablePort: '<S26>/Enable'
  430. if (rtb_Compare > 0) {
  431. // Fcn: '<S26>/Fcn'
  432. PmsmSimUt_B.Fcn = rtb_Gain1_c[0] * rtb_Add2_tmp_tmp_0 + rtb_Gain1_c[1] *
  433. rtb_Add2_tmp_tmp;
  434. // Fcn: '<S26>/Fcn1'
  435. PmsmSimUt_B.Fcn1 = -rtb_Gain1_c[0] * rtb_Add2_tmp_tmp + rtb_Gain1_c[1] *
  436. rtb_Add2_tmp_tmp_0;
  437. }
  438. // End of Outputs for SubSystem: '<S21>/Subsystem1'
  439. // Outputs for Enabled SubSystem: '<S21>/Subsystem - pi//2 delay' incorporates:
  440. // EnablePort: '<S25>/Enable'
  441. // RelationalOperator: '<S24>/Compare' incorporates:
  442. // Constant: '<S21>/Constant'
  443. // Constant: '<S24>/Constant'
  444. if (PmsmSimUt_P.AlphaBetaZerotodq0_Alignment_e ==
  445. PmsmSimUt_P.CompareToConstant1_const_o) {
  446. // Fcn: '<S25>/Fcn'
  447. PmsmSimUt_B.Fcn_a = rtb_Gain1_c[0] * rtb_Add2_tmp_tmp - rtb_Gain1_c[1] *
  448. rtb_Add2_tmp_tmp_0;
  449. // Fcn: '<S25>/Fcn1'
  450. PmsmSimUt_B.Fcn1_p = rtb_Gain1_c[0] * rtb_Add2_tmp_tmp_0 + rtb_Gain1_c[1] *
  451. rtb_Add2_tmp_tmp;
  452. }
  453. // End of RelationalOperator: '<S24>/Compare'
  454. // End of Outputs for SubSystem: '<S21>/Subsystem - pi//2 delay'
  455. // Switch: '<S21>/Switch'
  456. if (rtb_Compare != 0) {
  457. rtb_Switch_idx_0 = PmsmSimUt_B.Fcn;
  458. rtb_Switch_idx_1 = PmsmSimUt_B.Fcn1;
  459. } else {
  460. rtb_Switch_idx_0 = PmsmSimUt_B.Fcn_a;
  461. rtb_Switch_idx_1 = PmsmSimUt_B.Fcn1_p;
  462. }
  463. // End of Switch: '<S21>/Switch'
  464. // Outport: '<Root>/Out' incorporates:
  465. // BusCreator: '<Root>/Bus Creator'
  466. // DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
  467. // DiscreteIntegrator: '<S17>/Discrete-Time Integrator1'
  468. // Gain: '<S18>/Gain2'
  469. // Inport: '<Root>/CtrlIn'
  470. // SignalConversion generated from: '<Root>/Bus Creator'
  471. PmsmSimUt_Y.Out.WmRpm = PmsmSimUt_P.Gain2_Gain * rtb_Gain2_k;
  472. PmsmSimUt_Y.Out.Uabc[0] = rtb_a;
  473. PmsmSimUt_Y.Out.Uabc[1] = rtb_Fcn1;
  474. PmsmSimUt_Y.Out.Uabc[2] = rtb_Relay2;
  475. PmsmSimUt_Y.Out.Idq[0] = rtb_id;
  476. PmsmSimUt_Y.Out.Idq[1] = rtb_iq;
  477. PmsmSimUt_Y.Out.Te = rtb_Gain;
  478. PmsmSimUt_Y.Out.Theta = rtb_Mod;
  479. PmsmSimUt_Y.Out.We = rtb_Gain1_i;
  480. PmsmSimUt_Y.Out.FluxDq[0] = PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c;
  481. PmsmSimUt_Y.Out.FluxDq[1] = PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE;
  482. PmsmSimUt_Y.Out.IdRef = PmsmSimUt_U.CtrlIn.IdCmd;
  483. PmsmSimUt_Y.Out.IqRef = rtb_Switch_h;
  484. // Gain: '<S17>/Gain1' incorporates:
  485. // Constant: '<S17>/Constant'
  486. // DiscreteIntegrator: '<S17>/Discrete-Time Integrator1'
  487. // Fcn: '<S17>/d(Flux_d)//dt'
  488. rtb_Mod = ((rtb_Switch_idx_0 - PmsmSimUt_P.Params.R * rtb_id) + rtb_Gain1_i *
  489. PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE) *
  490. PmsmSimUt_P.Params.Ts;
  491. // Sum: '<S7>/Sum' incorporates:
  492. // Inport: '<Root>/CtrlIn'
  493. // Memory: '<S7>/Memory'
  494. rtb_Relay2 = PmsmSimUt_U.CtrlIn.WmRpm - PmsmSimUt_DW.Memory_PreviousInput;
  495. // DeadZone: '<S7>/Dead Zone'
  496. if (rtb_Relay2 > PmsmSimUt_P.DeadZone_End) {
  497. rtb_Relay2 -= PmsmSimUt_P.DeadZone_End;
  498. } else if (rtb_Relay2 >= PmsmSimUt_P.DeadZone_Start) {
  499. rtb_Relay2 = 0.0;
  500. } else {
  501. rtb_Relay2 -= PmsmSimUt_P.DeadZone_Start;
  502. }
  503. // End of DeadZone: '<S7>/Dead Zone'
  504. // Relay: '<S7>/Relay1'
  505. PmsmSimUt_DW.Relay1_Mode = ((rtb_Relay2 >= PmsmSimUt_P.Relay1_OnVal) ||
  506. ((!(rtb_Relay2 <= PmsmSimUt_P.Relay1_OffVal)) && PmsmSimUt_DW.Relay1_Mode));
  507. // Relay: '<S7>/Relay2'
  508. PmsmSimUt_DW.Relay2_Mode = ((rtb_Relay2 >= PmsmSimUt_P.Relay2_OnVal) ||
  509. ((!(rtb_Relay2 <= PmsmSimUt_P.Relay2_OffVal)) && PmsmSimUt_DW.Relay2_Mode));
  510. // Update for DiscreteIntegrator: '<S18>/Discrete-Time Integrator' incorporates:
  511. // Gain: '<S18>/Gain'
  512. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE += PmsmSimUt_P.Params.Ts *
  513. rtb_Gain1_i * PmsmSimUt_P.DiscreteTimeIntegrator_gainva_p;
  514. // Update for DiscreteIntegrator: '<S17>/Discrete-Time Integrator1' incorporates:
  515. // Constant: '<S17>/Constant'
  516. // DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
  517. // Fcn: '<S17>/d(Flux_q)//dt'
  518. // Gain: '<S17>/Gain2'
  519. PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE += ((rtb_Switch_idx_1 -
  520. PmsmSimUt_P.Params.R * rtb_iq) - rtb_Gain1_i *
  521. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c) * PmsmSimUt_P.Params.Ts *
  522. PmsmSimUt_P.DiscreteTimeIntegrator1_gainv_b;
  523. // Update for DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
  524. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c +=
  525. PmsmSimUt_P.DiscreteTimeIntegrator_gainv_pq * rtb_Mod;
  526. // Update for DiscreteIntegrator: '<S16>/Discrete-Time Integrator' incorporates:
  527. // Gain: '<S16>/Gain'
  528. // Gain: '<S16>/Kp5'
  529. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_j += PmsmSimUt_P.Params.CKid *
  530. rtb_Add1 * PmsmSimUt_P.Params.Ts *
  531. PmsmSimUt_P.DiscreteTimeIntegrator_gainva_b;
  532. if (PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_j >=
  533. PmsmSimUt_P.DiscreteTimeIntegrator_UpperS_b) {
  534. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_j =
  535. PmsmSimUt_P.DiscreteTimeIntegrator_UpperS_b;
  536. } else {
  537. if (PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_j <=
  538. PmsmSimUt_P.DiscreteTimeIntegrator_LowerS_l) {
  539. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_j =
  540. PmsmSimUt_P.DiscreteTimeIntegrator_LowerS_l;
  541. }
  542. }
  543. // End of Update for DiscreteIntegrator: '<S16>/Discrete-Time Integrator'
  544. // Relay: '<S7>/Relay1'
  545. if (PmsmSimUt_DW.Relay1_Mode) {
  546. rtb_Switch_h = PmsmSimUt_P.Relay1_YOn;
  547. } else {
  548. rtb_Switch_h = PmsmSimUt_P.Relay1_YOff;
  549. }
  550. // Relay: '<S7>/Relay2'
  551. if (PmsmSimUt_DW.Relay2_Mode) {
  552. rtb_iq = PmsmSimUt_P.Relay2_YOn;
  553. } else {
  554. rtb_iq = PmsmSimUt_P.Relay2_YOff;
  555. }
  556. // Update for Memory: '<S7>/Memory' incorporates:
  557. // Gain: '<S7>/Gain'
  558. // Sum: '<S7>/Add'
  559. // Sum: '<S7>/Sum1'
  560. PmsmSimUt_DW.Memory_PreviousInput += (rtb_Switch_h + rtb_iq) *
  561. PmsmSimUt_P.Params.Ts;
  562. // Update for DiscreteIntegrator: '<S15>/Discrete-Time Integrator' incorporates:
  563. // Gain: '<S15>/Gain'
  564. // Gain: '<S15>/Kp5'
  565. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_g += PmsmSimUt_P.Params.CKiq *
  566. rtb_Add2 * PmsmSimUt_P.Params.Ts *
  567. PmsmSimUt_P.DiscreteTimeIntegrator_gainva_c;
  568. if (PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_g >=
  569. PmsmSimUt_P.DiscreteTimeIntegrator_UpperS_k) {
  570. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_g =
  571. PmsmSimUt_P.DiscreteTimeIntegrator_UpperS_k;
  572. } else {
  573. if (PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_g <=
  574. PmsmSimUt_P.DiscreteTimeIntegrator_LowerS_a) {
  575. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_g =
  576. PmsmSimUt_P.DiscreteTimeIntegrator_LowerS_a;
  577. }
  578. }
  579. // End of Update for DiscreteIntegrator: '<S15>/Discrete-Time Integrator'
  580. }
  581. // Model initialize function
  582. void PmsmSimUtModelClass::initialize()
  583. {
  584. // Registration code
  585. // initialize non-finites
  586. rt_InitInfAndNaN(sizeof(real_T));
  587. // InitializeConditions for DiscreteIntegrator: '<S18>/Discrete-Time Integrator'
  588. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE =
  589. PmsmSimUt_P.DiscreteTimeIntegrator_IC;
  590. // InitializeConditions for DiscreteIntegrator: '<S17>/Discrete-Time Integrator1'
  591. PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTATE =
  592. PmsmSimUt_P.DiscreteTimeIntegrator1_IC_a;
  593. // InitializeConditions for DiscreteIntegrator: '<S17>/Discrete-Time Integrator'
  594. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_c = PmsmSimUt_P.Params.Flux;
  595. // InitializeConditions for DiscreteIntegrator: '<S16>/Discrete-Time Integrator'
  596. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_j = PmsmSimUt_P.Subsystem1_Init;
  597. // InitializeConditions for Memory: '<S7>/Memory'
  598. PmsmSimUt_DW.Memory_PreviousInput = PmsmSimUt_P.Memory_InitialCondition;
  599. // InitializeConditions for DiscreteIntegrator: '<S15>/Discrete-Time Integrator'
  600. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_g = PmsmSimUt_P.Subsystem_Init_c;
  601. // SystemInitialize for Enabled SubSystem: '<S18>/Subsystem'
  602. // InitializeConditions for DiscreteIntegrator: '<S19>/Discrete-Time Integrator1'
  603. PmsmSimUt_DW.DiscreteTimeIntegrator1_DSTAT_d =
  604. PmsmSimUt_P.DiscreteTimeIntegrator1_IC;
  605. // SystemInitialize for DiscreteIntegrator: '<S19>/Discrete-Time Integrator1' incorporates:
  606. // Outport: '<S19>/Wm'
  607. PmsmSimUt_B.DiscreteTimeIntegrator1 = PmsmSimUt_P.Wm_Y0;
  608. // End of SystemInitialize for SubSystem: '<S18>/Subsystem'
  609. // SystemInitialize for Enabled SubSystem: '<S1>/Subsystem1'
  610. // SystemInitialize for Fcn: '<S14>/Fcn' incorporates:
  611. // Outport: '<S14>/dq'
  612. PmsmSimUt_B.Fcn_g = PmsmSimUt_P.dq_Y0_e[0];
  613. // SystemInitialize for Fcn: '<S14>/Fcn1' incorporates:
  614. // Outport: '<S14>/dq'
  615. PmsmSimUt_B.Fcn1_e = PmsmSimUt_P.dq_Y0_e[1];
  616. // End of SystemInitialize for SubSystem: '<S1>/Subsystem1'
  617. // SystemInitialize for Enabled SubSystem: '<S1>/Subsystem - pi//2 delay'
  618. // SystemInitialize for Fcn: '<S13>/Fcn' incorporates:
  619. // Outport: '<S13>/dq'
  620. PmsmSimUt_B.Fcn_b = PmsmSimUt_P.dq_Y0[0];
  621. // SystemInitialize for Fcn: '<S13>/Fcn1' incorporates:
  622. // Outport: '<S13>/dq'
  623. PmsmSimUt_B.Fcn1_n = PmsmSimUt_P.dq_Y0[1];
  624. // End of SystemInitialize for SubSystem: '<S1>/Subsystem - pi//2 delay'
  625. // SystemInitialize for Enabled SubSystem: '<Root>/Subsystem'
  626. // InitializeConditions for DiscreteIntegrator: '<S20>/Discrete-Time Integrator'
  627. PmsmSimUt_DW.DiscreteTimeIntegrator_DSTATE_n = PmsmSimUt_P.Subsystem_Init;
  628. // SystemInitialize for Sum: '<S20>/Sum6' incorporates:
  629. // Outport: '<S5>/Iq_ref'
  630. // Saturate: '<S20>/Saturation2'
  631. PmsmSimUt_B.Iq_ref = PmsmSimUt_P.Iq_ref_Y0;
  632. // End of SystemInitialize for SubSystem: '<Root>/Subsystem'
  633. // SystemInitialize for Enabled SubSystem: '<S21>/Subsystem1'
  634. // SystemInitialize for Fcn: '<S26>/Fcn' incorporates:
  635. // Outport: '<S26>/dq'
  636. PmsmSimUt_B.Fcn = PmsmSimUt_P.dq_Y0_f[0];
  637. // SystemInitialize for Fcn: '<S26>/Fcn1' incorporates:
  638. // Outport: '<S26>/dq'
  639. PmsmSimUt_B.Fcn1 = PmsmSimUt_P.dq_Y0_f[1];
  640. // End of SystemInitialize for SubSystem: '<S21>/Subsystem1'
  641. // SystemInitialize for Enabled SubSystem: '<S21>/Subsystem - pi//2 delay'
  642. // SystemInitialize for Fcn: '<S25>/Fcn' incorporates:
  643. // Outport: '<S25>/dq'
  644. PmsmSimUt_B.Fcn_a = PmsmSimUt_P.dq_Y0_l[0];
  645. // SystemInitialize for Fcn: '<S25>/Fcn1' incorporates:
  646. // Outport: '<S25>/dq'
  647. PmsmSimUt_B.Fcn1_p = PmsmSimUt_P.dq_Y0_l[1];
  648. // End of SystemInitialize for SubSystem: '<S21>/Subsystem - pi//2 delay'
  649. }
  650. // Model terminate function
  651. void PmsmSimUtModelClass::terminate()
  652. {
  653. // (no terminate code required)
  654. }
  655. // Constructor
  656. PmsmSimUtModelClass::PmsmSimUtModelClass() :
  657. PmsmSimUt_U(),
  658. PmsmSimUt_Y(),
  659. PmsmSimUt_B(),
  660. PmsmSimUt_DW(),
  661. PmsmSimUt_M()
  662. {
  663. // Currently there is no constructor body generated.
  664. }
  665. // Destructor
  666. PmsmSimUtModelClass::~PmsmSimUtModelClass()
  667. {
  668. // Currently there is no destructor body generated.
  669. }
  670. // Real-Time Model get method
  671. PmsmSimUtModelClass::RT_MODEL_PmsmSimUt_T * PmsmSimUtModelClass::getRTM()
  672. {
  673. return (&PmsmSimUt_M);
  674. }
  675. //
  676. // File trailer for generated code.
  677. //
  678. // [EOF]
  679. //