api_rt_pwm.c 17 KB

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  1. #include "api_rt_pwm.h"
  2. #include "api_rt_dbg.h"
  3. #include "api_rt_timer.h"
  4. #include "board_config.h"
  5. #include "gd32f30x.h"
  6. #include <stdint.h>
  7. #include "api_rt_adc.h"
  8. #include "classB.h"
  9. ApiRtPwm_Handle Pwms[1];
  10. /* ========================================================================== */
  11. /* ============================ Api RT Functions ============================ */
  12. /* ========================================================================== */
  13. void iRtPwm_Init()
  14. {
  15. Pwms[0].PwmBase = TIMER0;
  16. for (int i = 0; i < 6; i++)
  17. {
  18. Pwms[0].CompareValues[i] = HW_INIT_HHPWM_PERIOD;
  19. Pwms[0].ActiveCompareValues[i] = HW_INIT_HHPWM_PERIOD;
  20. }
  21. Pwms[0].CountZeroISR.Enable = 0;
  22. Pwms[0].CountZeroISR.Action = 0;
  23. Pwms[0].CountMaxISR.Enable = 0;
  24. Pwms[0].CountMaxISR.Action = 0;
  25. Pwms[0].BreakISR.Enable = 0;
  26. Pwms[0].BreakISR.Action = 0;
  27. Pwms[0].OutputEnable = 0;
  28. for (int i = 0; i < 4; i++)
  29. {
  30. Pwms[0].ChannelISR[i].Enable = 0;
  31. Pwms[0].ChannelISR[i].Action = 0;
  32. // Pwms[0].ChannelOutputEnable[i] = 0;
  33. }
  34. #if API_FUNCTION_PWM_SYNC_MULTI_SAMPLING
  35. Pwms[0].SyncSamplingEnable = 1;
  36. Pwms[0].SyncSamplingUpTickCount = 1;
  37. Pwms[0].SyncSamplingUpTick[0] = HW_INIT_HHPWM_PERIOD;
  38. Pwms[0].SyncSamplingDownTickCount = 1;
  39. Pwms[0].SyncSamplingDownTick[0] = HW_SAMPLE_BEFORE_UPDATE_CNTS;
  40. #endif
  41. }
  42. void iRtPwm_CountZeroIsr(uint8_t devIndex)
  43. {
  44. if (Pwms[devIndex].CountZeroISR.Enable)
  45. {
  46. if (Pwms[devIndex].CountZeroISR.Action != 0)
  47. {
  48. Pwms[devIndex].CountZeroISR.Action();
  49. }
  50. }
  51. }
  52. void iRtPwm_CountMaxIsr(uint8_t devIndex)
  53. {
  54. if (Pwms[devIndex].CountMaxISR.Enable)
  55. {
  56. if (Pwms[devIndex].CountMaxISR.Action != 0)
  57. {
  58. Pwms[devIndex].CountMaxISR.Action();
  59. }
  60. }
  61. }
  62. void iRtPwm_UpdateIsr(uint8_t devIndex)
  63. {
  64. uint32_t base = Pwms[devIndex].PwmBase;
  65. uint32_t ulOvTimeCnt = 0;
  66. if(TIMER_INTF(base) & TIMER_INT_FLAG_UP)
  67. {
  68. if((TIMER_CTL0(base) & TIMER_CTL0_DIR) == 0) // When Counting Up
  69. {
  70. /* TBC Up interrupt */
  71. iRtPwm_CountZeroIsr(devIndex);
  72. }
  73. else
  74. {
  75. /* Reset Timer6 counts*/
  76. iTimer_Reset(HW_PWMCNT_TIMER);
  77. /* TBC Down interrupt */
  78. iRtPwm_CountMaxIsr(devIndex);
  79. /* Timing management, refer to the Software design description for details */
  80. while ((iTimer_GetCount(HW_PWMCNT_TIMER) < HW_INIT_PWM_PERIOD) && (ulOvTimeCnt < 10000))
  81. {
  82. ulOvTimeCnt++;
  83. };
  84. /* ADC0 trigger set */
  85. iPwm_SetCompareValueImmediate(0,3,Pwms[0].SyncSamplingUpTick[1]);
  86. /* ADC Enable*/
  87. iAdc_Enable(0);
  88. /* Software trigger for regular sampling*/
  89. iAdc_Convert(0);
  90. /* Compara value load */
  91. iRtPwm_ActivateCompareValues(0);
  92. timer_dma_enable(base,TIMER_DMA_UPD);
  93. dma_channel_enable(DMA0,DMA_CH4);
  94. }
  95. }
  96. /* Timer0 update interrupt flag clear */
  97. TIMER_INTF(base) = ~(uint32_t)TIMER_INT_FLAG_UP;
  98. }
  99. void iRtPwm_SyncSamplingAdcIsr(uint8_t devIndex)
  100. {
  101. if (ADC_STAT(ADC0) & ADC_INT_FLAG_EOIC)
  102. {
  103. // adc_uwRdsonUReg = ADC_IDATA0(ADC0);
  104. // adc_uwRdsonVReg = ADC_IDATA1(ADC0);
  105. // adc_uwRdsonWReg = ADC_IDATA2(ADC0);
  106. Adcs[1].Results[HW_ADC_IA_CH] = ADC_IDATA0(ADC0);
  107. Adcs[1].Results[HW_ADC_IB_CH] = ADC_IDATA1(ADC0);
  108. Adcs[1].Results[HW_ADC_IC_CH] = ADC_IDATA2(ADC0);
  109. /* ADC0 disable */
  110. ADC_CTL1(ADC0) &= ~((uint32_t)ADC_CTL1_ADCON);
  111. /* ADC1 trigger set */
  112. iPwm_SetCompareValueImmediate(0,3,Pwms[0].SyncSamplingUpTick[0]);
  113. /* ADC1 enable */
  114. ADC_CTL1(ADC1) |= (uint32_t)ADC_CTL1_ADCON;
  115. /* ADC0 interrupt flag clear */
  116. ADC_STAT(ADC0) &= ~((uint32_t)ADC_INT_FLAG_EOIC);
  117. }
  118. else if (ADC_STAT(ADC1) & ADC_INT_FLAG_EOIC)
  119. {
  120. if (Pwms[0].SyncSamplingUpTick[0] != HW_INIT_HHHPWM_PERIOD)
  121. {
  122. Adcs[2].Results[HW_ADC_IDC_CH] = ADC_IDATA0(ADC1);
  123. }
  124. /* ADC1 disable */
  125. ADC_CTL1(ADC1) &= ~((uint32_t)ADC_CTL1_ADCON);
  126. /* ADC1 interrupt flag clear */
  127. ADC_STAT(ADC1) &= ~((uint32_t)ADC_INT_FLAG_EOIC);
  128. }
  129. else
  130. {
  131. //do noting
  132. }
  133. }
  134. void iRtPwm_ActivateCompareValues(uint8_t devIndex)
  135. {
  136. ASSERT_LESS(devIndex, 1);
  137. for (int i = 0; i < 6; i++)
  138. {
  139. Pwms[devIndex].ActiveCompareValues[i] = Pwms[devIndex].CompareValues[i];
  140. }
  141. }
  142. /* ========================================================================== */
  143. /* ============================== API Functions ============================= */
  144. /* ========================================================================== */
  145. uint32_t iPwm_GetClock(uint8_t devIndex)
  146. {
  147. return HW_TIM_CLOCK_HZ;
  148. }
  149. void iPwm_EnableCount(uint8_t devIndex)
  150. {
  151. uint32_t base = Pwms[devIndex].PwmBase;
  152. TIMER_CTL0(base) |= (uint32_t)BIT(0);
  153. }
  154. void iPwm_DisableCount(uint8_t devIndex)
  155. {
  156. uint32_t base = Pwms[devIndex].PwmBase;
  157. TIMER_CTL0(base) &= ~(uint32_t)BIT(0);
  158. }
  159. uint32_t iPwm_GetCountMax(uint8_t devIndex)
  160. {
  161. uint32_t base = Pwms[devIndex].PwmBase;
  162. uint32_t count_value = 0U;
  163. count_value = TIMER_CAR(base);
  164. return count_value;
  165. }
  166. void iPwm_SetCountMax(uint8_t devIndex, uint32_t countMax)
  167. {
  168. uint32_t base = Pwms[devIndex].PwmBase;
  169. TIMER_CAR(base)= countMax;
  170. }
  171. uint32_t iPwm_GetCount(uint8_t devIndex)
  172. {
  173. uint32_t base = Pwms[devIndex].PwmBase;
  174. uint32_t count_value = 0U;
  175. count_value = TIMER_CNT(base);
  176. return count_value;
  177. }
  178. void iPwm_SetCount(uint8_t devIndex, uint32_t count)
  179. {
  180. uint32_t base = Pwms[devIndex].PwmBase;
  181. TIMER_CNT(base)= count;
  182. }
  183. ApiPwm_CountMode iPwm_GetCountMode(uint8_t devIndex)
  184. {
  185. uint32_t base = Pwms[devIndex].PwmBase;
  186. ApiPwm_CountMode mode = ApiPwm_CountUp;
  187. if ((TIMER_CTL0(base) & (uint16_t)0x0060) == (uint16_t)0x0000)
  188. {
  189. if ((TIMER_CTL0(base) & (uint16_t)0x0010) != 0)
  190. {
  191. mode = ApiPwm_CountUp;
  192. }
  193. #if API_FUNCTION_PWM_COUNTDOWN == SUPPORT
  194. else
  195. {
  196. mode = ApiPwm_CountDown;
  197. }
  198. #endif
  199. }
  200. else
  201. {
  202. mode = ApiPwm_CountUpDown;
  203. }
  204. return mode;
  205. }
  206. void iPwm_SetCountMode(uint8_t devIndex, ApiPwm_CountMode mode)
  207. {
  208. uint32_t base = Pwms[devIndex].PwmBase;
  209. switch (mode)
  210. {
  211. case ApiPwm_CountUp:
  212. TIMER_CTL0(base) &= ~((uint16_t)0x0060);
  213. TIMER_CTL0(base) &= ~(uint16_t)0x0010;
  214. break;
  215. #if FUNCTION_PWM_COUNTDOWN == SUPPORT
  216. case ApiPwm_CountDown:
  217. TIMER_CTL0(base) &= ~((uint16_t)0x0060);
  218. TIMER_CTL0(base) |= (uint16_t)0x0010;
  219. break;
  220. #endif
  221. case ApiPwm_CountUpDown:
  222. TIMER_CTL0(base) |= ((uint16_t)0x0060);
  223. break;
  224. default:
  225. break;
  226. }
  227. }
  228. ApiPwm_CompareMode iPwm_GetCompareMode(uint8_t devIndex, uint8_t channelIndex)
  229. {
  230. uint32_t base = Pwms[devIndex].PwmBase;
  231. uint8_t conf = 0;
  232. switch (channelIndex)
  233. {
  234. case 0:
  235. conf = TIMER_CHCTL0(base) & (uint32_t)0x000000F0UL;
  236. break;
  237. case 1:
  238. conf = (TIMER_CHCTL0(base) & (uint32_t)0x0000F000UL) >> 16;
  239. break;
  240. case 2:
  241. conf = TIMER_CHCTL1(base) & (uint32_t)0x000000F0UL;
  242. break;
  243. case 3:
  244. conf = (TIMER_CHCTL1(base) & (uint32_t)0x0000F000UL) >> 16;
  245. break;
  246. default:
  247. break;
  248. }
  249. ApiPwm_CompareMode mode = ApiPwm_NoAction;
  250. switch (conf >> 4)
  251. {
  252. case 0x00:
  253. mode = ApiPwm_NoAction;
  254. break;
  255. case 0x01:
  256. mode = ApiPwm_UpMatchSet;
  257. #if FUNCTION_PWM_COUNTDOWN
  258. if (iPwm_GetCountMode(devIndex) == Pwm_CountDown)
  259. mode = ApiPwm_DownMatchSet;
  260. #endif
  261. break;
  262. case 0x02:
  263. mode = ApiPwm_UpMatchClear;
  264. #if FUNCTION_PWM_COUNTDOWN
  265. if (iPwm_GetCountMode(devIndex) == Pwm_CountDown)
  266. mode = ApiPwm_DownMatchClear;
  267. #endif
  268. break;
  269. case 0x03:
  270. mode = ApiPwm_UpMatchToggle;
  271. #if FUNCTION_PWM_COUNTDOWN
  272. if (iPwm_GetCountMode(devIndex) == Pwm_CountDown)
  273. mode = ApiPwm_DownMatchToggle;
  274. #endif
  275. break;
  276. case 0x04:
  277. mode = ApiPwm_ForceClear;
  278. break;
  279. case 0x05:
  280. mode = ApiPwm_ForceSet;
  281. break;
  282. case 0x06:
  283. mode = ApiPwm_HigherClear;
  284. break;
  285. case 0x07:
  286. mode = ApiPwm_HigherSet;
  287. break;
  288. default:
  289. mode = ApiPwm_NoAction;
  290. break;
  291. }
  292. return mode;
  293. }
  294. void iPwm_SetCompareMode(uint8_t devIndex, uint8_t channelIndex, ApiPwm_CompareMode mode)
  295. {
  296. uint32_t base = Pwms[devIndex].PwmBase;
  297. uint8_t conf = 0;
  298. switch (mode)
  299. {
  300. case ApiPwm_NoAction:
  301. conf = 0x00;
  302. break;
  303. case ApiPwm_UpMatchSet:
  304. conf = 0x01;
  305. break;
  306. case ApiPwm_UpMatchClear:
  307. conf = 0x02;
  308. break;
  309. case ApiPwm_UpMatchToggle:
  310. conf = 0x03;
  311. break;
  312. case ApiPwm_ForceClear:
  313. conf = 0x04;
  314. break;
  315. case ApiPwm_ForceSet:
  316. conf = 0x05;
  317. break;
  318. case ApiPwm_HigherClear:
  319. conf = 0x06;
  320. break;
  321. case ApiPwm_HigherSet:
  322. conf = 0x07;
  323. break;
  324. default:
  325. break;
  326. }
  327. #if API_FUNCTION_PWM_COUNTDOWN
  328. if (iPwm_GetCountMode(devIndex) == ApiPwm_CountDown)
  329. {
  330. switch (mode)
  331. {
  332. case ApiPwm_DownMatchSet:
  333. conf = 0x01;
  334. break;
  335. case ApiPwm_DownMatchClear:
  336. conf = 0x02;
  337. break;
  338. case ApiPwm_DownMatchToggle:
  339. conf = 0x03;
  340. break;
  341. }
  342. }
  343. #endif
  344. switch (channelIndex)
  345. {
  346. case 0:
  347. TIMER_CHCTL0(base) &= ~((uint32_t)0x000000F0UL);
  348. TIMER_CHCTL0(base) |= (((uint32_t)conf) << 4);
  349. break;
  350. case 1:
  351. TIMER_CHCTL0(base) &= ~((uint32_t)0x0000F000UL);
  352. TIMER_CHCTL0(base) |= (((uint32_t)conf) << (4 + 8));
  353. break;
  354. case 2:
  355. TIMER_CHCTL0(base) &= ~((uint32_t)0x000000F0UL);
  356. TIMER_CHCTL0(base) |= (((uint32_t)conf) << 4);
  357. break;
  358. case 3:
  359. TIMER_CHCTL0(base) &= ~((uint32_t)0x0000F000UL);
  360. TIMER_CHCTL0(base) |= (((uint32_t)conf) << (4 + 8));
  361. break;
  362. }
  363. }
  364. uint32_t iPwm_GetCompareValue(uint8_t devIndex, uint8_t channelIndex)
  365. {
  366. uint32_t base = Pwms[devIndex].PwmBase;
  367. uint32_t value = 0;
  368. switch (channelIndex)
  369. {
  370. case 0:
  371. value = TIMER_CH0CV(base);
  372. break;
  373. case 1:
  374. value = TIMER_CH1CV(base);
  375. break;
  376. case 2:
  377. value = TIMER_CH2CV(base);
  378. break;
  379. case 3:
  380. value = TIMER_CH3CV(base);
  381. break;
  382. default:
  383. break;
  384. }
  385. return value;
  386. }
  387. void iPwm_SetCompareValue(uint8_t devIndex, uint8_t channelIndex, uint32_t value)
  388. {
  389. ASSERT_LESS(devIndex, 1);
  390. ASSERT_LESS(channelIndex, 3);
  391. Pwms[devIndex].CompareValues[channelIndex] = value;
  392. }
  393. void iPwm_SetCompareValueDelay(uint8_t devIndex, uint8_t channelIndex, uint32_t value)
  394. {
  395. ASSERT_LESS(devIndex, 1);
  396. ASSERT_LESS(channelIndex, 3);
  397. Pwms[devIndex].CompareValues[channelIndex + 3] = value;
  398. }
  399. void iPwm_SetCompareGroupValues16(uint8_t devIndex, uint16_t* values)
  400. {
  401. for (int i = 0; i < 6; i++)
  402. {
  403. Pwms[devIndex].CompareValues[i] = values[i];
  404. }
  405. }
  406. void iPwm_SetCompareValueImmediate(uint8_t devIndex, uint8_t channelIndex, uint32_t value)
  407. {
  408. ASSERT_LESS(devIndex, 1);
  409. ASSERT_LESS(channelIndex, 4);
  410. uint32_t base = Pwms[devIndex].PwmBase;
  411. switch (channelIndex)
  412. {
  413. case 0:
  414. TIMER_CH0CV(base) = value;
  415. break;
  416. case 1:
  417. TIMER_CH1CV(base) = value;
  418. break;
  419. case 2:
  420. TIMER_CH2CV(base) = value;
  421. break;
  422. case 3:
  423. TIMER_CH3CV(base) = value;
  424. break;
  425. default:
  426. break;
  427. }
  428. }
  429. int8_t iPwm_GetEnableState(uint8_t devIndex)
  430. {
  431. ASSERT_LESS(devIndex, 1);
  432. return Pwms[devIndex].OutputEnable;
  433. }
  434. void iPwm_EnableOutput(uint8_t devIndex)
  435. {
  436. ASSERT_LESS(devIndex, 1);
  437. uint32_t base = Pwms[devIndex].PwmBase;
  438. TIMER_CCHP(base) |= (uint32_t)0x00008000UL;
  439. Pwms[devIndex].OutputEnable = 1;
  440. }
  441. void iPwm_DisableOutput(uint8_t devIndex)
  442. {
  443. ASSERT_LESS(devIndex, 1);
  444. uint32_t base = Pwms[devIndex].PwmBase;
  445. TIMER_CCHP(base) &= ~((uint32_t)0x00008000UL);
  446. Pwms[devIndex].OutputEnable = 0;
  447. }
  448. // // int8_t Pwm_GetChannelEnableState(uint8_t devIndex, uint8_t channelIndex)
  449. // // {
  450. // // }
  451. // // void Pwm_EnableChannelOutput(uint8_t devIndex, uint8_t channelIndex)
  452. // // {
  453. // // ASSERT_LESS(devIndex, 1);
  454. // // ASSERT_LESS(channelIndex, 4);
  455. // // TIM_TypeDef *base = Pwms[devIndex].PwmBase;
  456. // // if (channelIndex < 64)
  457. // // {
  458. // // base->CCER |= ((uint32_t)0x01) << (channelIndex * 4);
  459. // // }
  460. // // else
  461. // // {
  462. // // base->CCER |= ((uint32_t)0x04) << ((channelIndex - 64) * 4);
  463. // // }
  464. // // }
  465. // // void Pwm_DisableChannelOutput(uint8_t devIndex, uint8_t channelIndex)
  466. // // {
  467. // // ASSERT_LESS(devIndex, 1);
  468. // // ASSERT_LESS(channelIndex, 4);
  469. // // TIM_TypeDef *base = Pwms[devIndex].PwmBase;
  470. // // if (channelIndex < 64)
  471. // // {
  472. // // base->CCER &= ~(((uint32_t)0x01) << (channelIndex * 4));
  473. // // }
  474. // // else
  475. // // {
  476. // // base->CCER &= ~(((uint32_t)0x04) << ((channelIndex - 64) * 4));
  477. // // }
  478. // // }
  479. void iPwm_EnableDeviceInterrupt(uint8_t devIndex, ApiPwm_DeviceInterrupt interrupt)
  480. {
  481. ASSERT_LESS(devIndex, 1);
  482. switch (interrupt)
  483. {
  484. case ApiPwm_CountZeroInt:
  485. Pwms[devIndex].CountZeroISR.Enable = 1;
  486. break;
  487. case ApiPwm_CountMaxInt:
  488. Pwms[devIndex].CountMaxISR.Enable = 1;
  489. break;
  490. case ApiPwm_BreakInt:
  491. Pwms[devIndex].BreakISR.Enable = 1;
  492. break;
  493. default:
  494. break;
  495. }
  496. }
  497. void iPwm_DisableDeviceInterrupt(uint8_t devIndex, ApiPwm_DeviceInterrupt interrupt)
  498. {
  499. ASSERT_LESS(devIndex, 1);
  500. switch (interrupt)
  501. {
  502. case ApiPwm_CountZeroInt:
  503. Pwms[devIndex].CountZeroISR.Enable = 0;
  504. break;
  505. case ApiPwm_CountMaxInt:
  506. Pwms[devIndex].CountMaxISR.Enable = 0;
  507. break;
  508. case ApiPwm_BreakInt:
  509. Pwms[devIndex].BreakISR.Enable = 0;
  510. break;
  511. default:
  512. break;
  513. }
  514. }
  515. void iPwm_EnableChannelInterrupt(uint8_t devIndex, uint8_t channelIndex, ApiPwm_ChannelInterrupt interrupt)
  516. {
  517. ASSERT_LESS(devIndex, 1);
  518. ASSERT_LESS(channelIndex, 4);
  519. Pwms[devIndex].ChannelISR[channelIndex].Enable = 1;
  520. }
  521. void iPwm_DisableChannelInterrupt(uint8_t devIndex, uint8_t channelIndex, ApiPwm_ChannelInterrupt interrupt)
  522. {
  523. ASSERT_LESS(devIndex, 1);
  524. ASSERT_LESS(channelIndex, 4);
  525. Pwms[devIndex].ChannelISR[channelIndex].Enable = 0;
  526. }
  527. void iPwm_BindDeviceInterrupt(uint8_t devIndex, ApiPwm_DeviceInterrupt interrupt, void (*action)())
  528. {
  529. ASSERT_LESS(devIndex, 1);
  530. switch (interrupt)
  531. {
  532. case ApiPwm_CountZeroInt:
  533. Pwms[devIndex].CountZeroISR.Action = action;
  534. break;
  535. case ApiPwm_CountMaxInt:
  536. Pwms[devIndex].CountMaxISR.Action = action;
  537. break;
  538. case ApiPwm_BreakInt:
  539. Pwms[devIndex].BreakISR.Action = action;
  540. break;
  541. default:
  542. break;
  543. }
  544. }
  545. void iPwm_BindChannelInterrupt(uint8_t devIndex, uint8_t channelIndex, ApiPwm_DeviceInterrupt interrupt, void (*action)())
  546. {
  547. ASSERT_LESS(devIndex, 1);
  548. ASSERT_LESS(channelIndex, 4);
  549. Pwms[devIndex].ChannelISR[channelIndex].Action = action;
  550. }
  551. int8_t iPwm_GetBreakState(uint8_t devIndex)
  552. {
  553. ASSERT_LESS(devIndex, 1);
  554. uint32_t base = Pwms[devIndex].PwmBase;
  555. return (TIMER_INTF(base) & ((uint32_t)0x00000080UL)) ? 1 : 0;
  556. }
  557. void iPwm_ClearBreak(uint8_t devIndex)
  558. {
  559. ASSERT_LESS(devIndex, 1);
  560. uint32_t base = Pwms[devIndex].PwmBase;
  561. TIMER_INTF(base) &= ~((uint32_t)0x00000080UL);
  562. }
  563. #if API_FUNCTION_PWM_SYNC_MULTI_SAMPLING
  564. void iPwm_EnableSyncMultiSampling(uint8_t devIndex)
  565. {
  566. Pwms[devIndex].SyncSamplingEnable = 1;
  567. }
  568. void iPwm_DisableSyncMultiSampling(uint8_t devIndex)
  569. {
  570. Pwms[devIndex].SyncSamplingEnable = 0;
  571. Pwms[devIndex].SyncSamplingUpTickCount = 1;
  572. Pwms[devIndex].SyncSamplingUpTick[0] = TIMER_CAR(Pwms[devIndex].PwmBase)>> 1;
  573. Pwms[devIndex].SyncSamplingDownTickCount = 1;
  574. Pwms[devIndex].SyncSamplingDownTick[0] = TIMER_CAR(Pwms[devIndex].PwmBase)>> 1;
  575. }
  576. void iPwm_SyncMultiSamplingCountUp(uint8_t devIndex, uint32_t samplingTicks[], uint8_t samplingCounts)
  577. {
  578. if (Pwms[devIndex].SyncSamplingEnable == 1)
  579. {
  580. Pwms[devIndex].SyncSamplingUpTickCount = samplingCounts;
  581. for (int i = 0; i < samplingCounts; i++)
  582. {
  583. Pwms[devIndex].SyncSamplingUpTick[i] = samplingTicks[i];
  584. }
  585. }
  586. }
  587. void iPwm_SyncMultiSamplingCountDown(uint8_t devIndex, uint32_t samplingTicks[], uint8_t samplingCounts)
  588. {
  589. if (Pwms[devIndex].SyncSamplingEnable == 1)
  590. {
  591. Pwms[devIndex].SyncSamplingDownTickCount = samplingCounts;
  592. for (int i = 0; i < samplingCounts; i++)
  593. {
  594. Pwms[devIndex].SyncSamplingDownTick[i] = samplingTicks[i];
  595. }
  596. }
  597. }
  598. #endif