gd32f30x_it.c 7.7 KB

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  1. /*!
  2. \file gd32f3x0_it.c
  3. \brief interrupt service routines
  4. */
  5. /*
  6. Copyright (C) 2022 GigaDevice
  7. 2022-12-01, V1.0.0, firmware for GD32F3x0
  8. */
  9. /******************************
  10. * Include File
  11. ******************************/
  12. #include "gd32f30x_it.h"
  13. #include "user.h"
  14. #include "TimeTask_Event.h"
  15. #include "can.h"
  16. #include "FSM_1st.h"
  17. #include "api_rt.h"
  18. #include "sys_ctrl.h"
  19. #include "enviolo_can.h"
  20. #include "giant_can.h"
  21. #include "string.h"
  22. /******************************
  23. * Parameter
  24. ******************************/
  25. extern uint8_t data;
  26. /******************************
  27. * Function
  28. ******************************/
  29. /*!
  30. \brief this function handles NMI exception
  31. \param[in] none
  32. \param[out] none
  33. \retval none
  34. */
  35. void NMI_Handler(void)
  36. {
  37. }
  38. /*!
  39. \brief this function handles HardFault exception
  40. \param[in] none
  41. \param[out] none
  42. \retval none
  43. */
  44. void HardFault_Handler(void)
  45. {
  46. sysctrl_stPwmState.blPwmOnflg = TRUE;/* HardFault_Handler无法被屏蔽,hw_blPWMOnFlg可能被RAMtest修改 */
  47. sysctrl_voPwmOff();
  48. /* if Hard Fault exception occurs, go to infinite loop */
  49. while (1)
  50. {
  51. //do nothing
  52. }
  53. }
  54. /*!
  55. \brief this function handles MemManage exception
  56. \param[in] none
  57. \param[out] none
  58. \retval none
  59. */
  60. void MemManage_Handler(void)
  61. {
  62. /* if Memory Manage exception occurs, go to infinite loop */
  63. while (1)
  64. {
  65. //do nothing
  66. }
  67. }
  68. /*!
  69. \brief this function handles BusFault exception
  70. \param[in] none
  71. \param[out] none
  72. \retval none
  73. */
  74. void BusFault_Handler(void)
  75. {
  76. /* if Bus Fault exception occurs, go to infinite loop */
  77. while (1)
  78. {
  79. //do nothing
  80. }
  81. }
  82. /*!
  83. \brief this function handles UsageFault exception
  84. \param[in] none
  85. \param[out] none
  86. \retval none
  87. */
  88. void UsageFault_Handler(void)
  89. {
  90. /* if Usage Fault exception occurs, go to infinite loop */
  91. while (1)
  92. {
  93. //do nothing
  94. }
  95. }
  96. /*!
  97. \brief this function handles SVC exception
  98. \param[in] none
  99. \param[out] none
  100. \retval none
  101. */
  102. void SVC_Handler(void)
  103. {
  104. }
  105. /*!
  106. \brief this function handles DebugMon exception
  107. \param[in] none
  108. \param[out] none
  109. \retval none
  110. */
  111. void DebugMon_Handler(void)
  112. {
  113. }
  114. /*!
  115. \brief this function handles PendSV exception
  116. \param[in] none
  117. \param[out] none
  118. \retval none
  119. */
  120. void PendSV_Handler(void)
  121. {
  122. }
  123. /*!
  124. \brief this function handles SysTick exception
  125. \param[in] none
  126. \param[out] none
  127. \retval none
  128. */
  129. void SysTick_Handler(void)
  130. {
  131. iRtTimer_Isr(HW_SYSTICK_TIMER);
  132. }
  133. /*!
  134. \brief
  135. \param[in] none
  136. \param[out] none
  137. \retval none
  138. */
  139. void ADC0_1_IRQHandler(void)
  140. {
  141. /* MCU self check count */
  142. clasB_uwADCCnt++;
  143. iRtAdc_CompleteIsr(0);
  144. }
  145. /*!
  146. \brief
  147. \param[in] none
  148. \param[out] none
  149. \retval none
  150. */
  151. void TIMER0_UP_TIMER9_IRQHandler(void)
  152. {
  153. /* MCU self check count */
  154. clasB_uwTIM0Cnt ++;
  155. iRtPwm_UpdateIsr(0);
  156. }
  157. /*!
  158. \brief
  159. \param[in] none
  160. \param[out] none
  161. \retval none
  162. */
  163. void TIMER1_IRQHandler(void)
  164. {
  165. /* MCU self check count */
  166. clasB_uwTIM1Cnt++;
  167. iRtCap_Isr(0);
  168. }
  169. /*!
  170. \brief
  171. \param[in] none
  172. \param[out] none
  173. \retval none
  174. */
  175. void TIMER3_IRQHandler(void)
  176. {
  177. /* MCU self check count */
  178. clasB_uwTIM3Cnt++;
  179. iRtTimer_Isr(HW_TBS_TIMER);
  180. }
  181. /*!
  182. \brief
  183. \param[in] none
  184. \param[out] none
  185. \retval none
  186. */
  187. void TIMER5_IRQHandler(void)
  188. {
  189. /* MCU self check count */
  190. clasB_uwTIM5Cnt++;
  191. iRtTimer_Isr(HW_EVENT1MS_TIMER);
  192. }
  193. /*!
  194. \brief
  195. \param[in] none
  196. \param[out] none
  197. \retval none
  198. */
  199. void DMA1_Channel2_IRQHandler(void)
  200. {
  201. iRtUart_RxIsr(0);
  202. }
  203. /*!
  204. \brief
  205. \param[in] none
  206. \param[out] none
  207. \retval none
  208. */
  209. void DMA1_Channel4_IRQHandler(void)
  210. {
  211. /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */
  212. if (dma_flag_get(DMA1, DMA_CH4, DMA_INT_FLAG_FTF) != 0)
  213. {
  214. iRtUart_AsyncWriteCompleteIsr(0);
  215. DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_INT_FLAG_FTF, DMA_CH4);
  216. }
  217. // TX error
  218. if (dma_flag_get(DMA1, DMA_CH4, DMA_FLAG_ERR) != 0)
  219. {
  220. iRtUart_AsyncWriteErrorIsr(0);
  221. DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_FLAG_ERR, DMA_CH4);
  222. }
  223. // if (dma_flag_get(DMA1, DMA_CH4, DMA_INT_FLAG_FTF) != 0)
  224. // {
  225. // if (UART_stParaStatus.bParaStart)
  226. // {
  227. // UART_bInsertPendTx = FALSE; // clear insertBuffer pending
  228. // UART_stParaStatus.bParaStart = FALSE; // clear parameter status
  229. // }
  230. // else
  231. // {
  232. // // do nothing
  233. // }
  234. // DMA_CH4CTL(DMA1) &= ~DMA_CHXCTL_CHEN;
  235. // //dma_flag_clear(DMA1, DMA_CH4, DMA_INT_FLAG_FTF);
  236. // DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_INT_FLAG_FTF, DMA_CH4);
  237. // UART_stParaStatus.bWriteBusy = FALSE;
  238. // }
  239. // /* TX error */
  240. // if (dma_flag_get(DMA1, DMA_CH4, DMA_FLAG_ERR) != 0)
  241. // {
  242. // if (UART_stParaStatus.bParaStart)
  243. // {
  244. // UART_bInsertPendTx = FALSE; // clear insertBuffer pending
  245. // UART_stParaStatus.bParaStart = FALSE; // clear parameter status
  246. // }
  247. // DMA_CH4CTL(DMA1) &= ~DMA_CHXCTL_CHEN;
  248. // //dma_flag_clear(DMA1, DMA_CH4, DMA_FLAG_ERR);
  249. // DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_FLAG_ERR, DMA_CH4);
  250. // UART_stParaStatus.bWriteBusy = FALSE;
  251. // }
  252. }
  253. /*!
  254. \brief
  255. \param[in] none
  256. \param[out] none
  257. \retval none
  258. */
  259. void CAN0_RX0_IRQHandler(void)
  260. {
  261. can_message_receive(CAN0, CAN_FIFO0, pRxMsg);
  262. if((pRxMsg->rx_ff != CAN_FF_STANDARD) || (pRxMsg->rx_dlen == 0))
  263. {
  264. can_interrupt_enable(CAN0, CAN_INT_RFF0);
  265. return;
  266. }
  267. switch (pRxMsg->rx_sfid)
  268. {
  269. case ID_PBU_BC:
  270. case ID_PBU_TO_MC: //接收PBU数据
  271. {
  272. CAN_RxBuf_Struct_PBU.ucBufID = (UWORD)pRxMsg->rx_sfid;
  273. CAN_Rx_ISR(&CAN_RxBuf_Struct_PBU, pRxMsg->rx_dlen);
  274. break;
  275. }
  276. case ID_BMS_BC:
  277. case ID_BMS_TO_MC: //接收BMS数据
  278. {
  279. CAN_RxBuf_Struct_BMS.ucBufID = (UWORD)pRxMsg->rx_sfid;
  280. CAN_Rx_ISR(&CAN_RxBuf_Struct_BMS, pRxMsg->rx_dlen);
  281. break;
  282. }
  283. case ID_HMI_BC:
  284. case ID_HMI_TO_MC: //接收HMI数据
  285. {
  286. CAN_RxBuf_Struct_HMI.ucBufID = (UWORD)pRxMsg->rx_sfid;
  287. CAN_Rx_ISR(&CAN_RxBuf_Struct_HMI, pRxMsg->rx_dlen);
  288. break;
  289. }
  290. case ID_CDL_BC:
  291. case ID_CDL_TO_MC: // case ID_CDL_TO_MC_TE://接收CDL数据
  292. {
  293. CAN_RxBuf_Struct_CDL.ucBufID = (UWORD)pRxMsg->rx_sfid;
  294. CAN_Rx_ISR(&CAN_RxBuf_Struct_CDL, pRxMsg->rx_dlen);
  295. break;
  296. }
  297. default:
  298. break;
  299. }
  300. can_interrupt_enable(CAN0, CAN_INT_RFF0);
  301. }
  302. /*!
  303. \brief
  304. \param[in] none
  305. \param[out] none
  306. \retval none
  307. */
  308. void CAN0_RX1_IRQHandler(void)
  309. {
  310. can_message_receive(CAN0, CAN_FIFO1, pRxMsg2);
  311. // pTxMsg->tx_sfid = pRxMsg2->rx_sfid;
  312. // pTxMsg->tx_efid = pRxMsg2->rx_efid;
  313. // pTxMsg->tx_ft = pRxMsg2->rx_ft;
  314. // pTxMsg->tx_ff = pRxMsg2->rx_ff;
  315. // pTxMsg->tx_dlen = pRxMsg2->rx_dlen;
  316. // if(pTxMsg->tx_dlen > 0)
  317. // {
  318. // memcpy((uint8_t*)pTxMsg->tx_data, (uint8_t*)pRxMsg2->rx_data, pTxMsg->tx_dlen);
  319. // }
  320. // can_ubMbox = can_message_transmit(CAN0, pTxMsg);
  321. // ULONG OVtim = 0;
  322. // while((can_transmit_states(CAN0,can_ubMbox) != CAN_TRANSMIT_OK) && (OVtim < 0XFFF))
  323. // {
  324. // OVtim++;
  325. // } //等待发送结束
  326. if(pRxMsg2->rx_ff != CAN_FF_STANDARD)
  327. {
  328. can_interrupt_enable(CAN0, CAN_INT_RFF1);
  329. return;
  330. }
  331. giant_DataProcess();
  332. can_interrupt_enable(CAN0, CAN_INT_RFF1);
  333. }