motor_ctl-4/User project/1.FrameLayer/Source/gd32f30x_it.c

/*!
    \file  gd32f3x0_it.c
    \brief interrupt service routines
*/

/*
    Copyright (C) 2017 GigaDevice

    2017-06-06, V1.0.0, firmware for GD32F3x0
*/

#include "gd32f30x_it.h"
#include "user.h"
#include "TimeTask_Event.h"
#include "syspar.h"
#include "can.h"

extern uint8_t data;

/*!
    \brief      this function handles NMI exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void NMI_Handler(void)
{
}

/*!
    \brief      this function handles HardFault exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void HardFault_Handler(void)
{
    hw_blPWMOnFlg = TRUE;/* HardFault_Handler无法被屏蔽，hw_blPWMOnFlg可能被RAMtest修改 */
    hw_voPWMOff();
    /* if Hard Fault exception occurs, go to infinite loop */
    while (1);
}

/*!
    \brief      this function handles MemManage exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void MemManage_Handler(void)
{
    /* if Memory Manage exception occurs, go to infinite loop */
    while (1);
}

/*!
    \brief      this function handles BusFault exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void BusFault_Handler(void)
{
    /* if Bus Fault exception occurs, go to infinite loop */
    while (1);
}

/*!
    \brief      this function handles UsageFault exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void UsageFault_Handler(void)
{
    /* if Usage Fault exception occurs, go to infinite loop */
    while (1);
}

/*!
    \brief      this function handles SVC exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void SVC_Handler(void)
{
}

/*!
    \brief      this function handles DebugMon exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void DebugMon_Handler(void)
{
}

/*!
    \brief      this function handles PendSV exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void PendSV_Handler(void)
{
}

/*!
    \brief      this function handles SysTick exception
    \param[in]  none
    \param[out] none
    \retval     none
*/
void SysTick_Handler(void)
{
    /* Add your code below */
  
    clas_ubSystickFlg = 1; // for TUV

    cp_ulSystickCnt ++;
    stl_voSystickProc();
    /* TBT interrupt */
    tbt_voIsr();
    /* UART Timeout */
    UART_voApplTimer();
}
/*!
    \brief      
    \param[in]  none
    \param[out] none
    \retval     none
*/
UWORD tstcccmin=2000, tstcccmax=0,tstccccnt;
void ADC0_1_IRQHandler(void)
{
    clasB_uwADCCnt++;
    
    //GPIO_OCTL(GPIOC) |= 0x0800; //TEST PC11
   
    if (cp_stFlg.CurrentSampleModelSelect == COMBINATION)
    {
        if (ADC_STAT(ADC0) & ADC_INT_FLAG_EOIC)
        {         
            adc_uwRdsonUReg = ADC_IDATA0(ADC0);
            adc_uwRdsonVReg = ADC_IDATA1(ADC0);
            adc_uwRdsonWReg = ADC_IDATA2(ADC0);  
            
//            adc_disable(ADC0);            
//            timer_channel_output_pulse_value_config(TIMER0, TIMER_CH_3, pwm_stGenOut.uwSigRTrig);
//            adc_interrupt_flag_clear(ADC0 , ADC_INT_FLAG_EOIC);
            if(curSpeed_state.state == ClzLoop)
            {
              tstccccnt ++;
              if(tstccccnt>100)
              {
                tstccccnt = 100;
                 if(adc_uwRdsonWReg < tstcccmin)
                 {
                   tstcccmin = adc_uwRdsonWReg;
                 }
                 
                 if(adc_uwRdsonWReg > tstcccmax)
                 {
                   tstcccmax = adc_uwRdsonWReg;
                 }
              }

               
            }
             
            
            
            /* ADC0 disable */
            ADC_CTL1(ADC0) &= ~((uint32_t)ADC_CTL1_ADCON);
            /* ADC1 trigger set */
            TIMER_CH3CV(TIMER0) = (uint32_t) pwm_stGenOut.uwSigRTrig;
             /* ADC1 enable */
            ADC_CTL1(ADC1) |= (uint32_t)ADC_CTL1_ADCON;
            /* ADC0 interrupt flag clear */
            ADC_STAT(ADC0) &= ~((uint32_t)ADC_INT_FLAG_EOIC);
        }
        else if (ADC_STAT(ADC1) & ADC_INT_FLAG_EOIC)
        {         
            if (pwm_stGenOut.blSampleCalibFlag == TRUE)
            {
                adc_uwADDMAPhase1 = ADC_IDATA0(ADC1);
            }
            
//            adc_disable(ADC1);              
//            adc_interrupt_flag_clear(ADC1 , ADC_INT_FLAG_EOIC);

            /* ADC1 disable */
            ADC_CTL1(ADC1) &= ~((uint32_t)ADC_CTL1_ADCON);
            /* ADC1 interrupt flag clear */
            ADC_STAT(ADC1) &= ~((uint32_t)ADC_INT_FLAG_EOIC); 
        }
        else
        {
        }
    }
    else
    {
    }
    
    //GPIO_OCTL(GPIOC) &= ~0x0800; //TEST PC11
}

/*!
    \brief      
    \param[in]  none
    \param[out] none
    \retval     none
*/
void TIMER0_UP_TIMER9_IRQHandler(void)
{   
    ULONG OVtimeCnt = 0;
    
    clasB_uwTIM0Cnt ++;
     
    if(cp_stFlg.CurrentSampleModelSelect == COMBINATION)
    {      
        if(TIMER_INTF(TIMER0) & TIMER_INT_FLAG_UP)
        {           
            if((TIMER_CTL0(TIMER0) & TIMER_CTL0_DIR) == 0) // When Counting Up
            { 
                /* TBC Up interrupt */
                tbc_voUpIsr();             
            }
            else
            {               
                TIMER_CNT(TIMER6) = 0;               
                
                /* TBC Down interrupt */
                tbc_voDownIsr();
                
                while ((TIMER_CNT(TIMER6) < HW_PWM_PERIOD) && (OVtimeCnt < 10000))
                {
                    OVtimeCnt++;
                };
                
                /* ADC0 trigger set */
                TIMER_CH3CV(TIMER0) = (uint32_t) pwm_stGenOut.uwRDSONTrig;
                adc_enable(ADC0);
                // adc_interrupt_enable(ADC0 , ADC_INT_EOIC);
                //adc_external_trigger_config(ADC0, ADC_INSERTED_CHANNEL, ENABLE);

                /* Software trigger for regular sampling*/
                adc_software_trigger_enable(ADC0, ADC_REGULAR_CHANNEL); 
                
                /* Compara value load */    
                hw_uwPWMCmpr[0] = pwm_stGenOut.uwNewTIM1COMPR[0];
                hw_uwPWMCmpr[1] = pwm_stGenOut.uwNewTIM1COMPR[1];
                hw_uwPWMCmpr[2] = pwm_stGenOut.uwNewTIM1COMPR[2];
                hw_uwPWMCmpr[3] = pwm_stGenOut.uwNewTIM1COMPR[3];
                hw_uwPWMCmpr[4] = pwm_stGenOut.uwNewTIM1COMPR[4];
                hw_uwPWMCmpr[5] = pwm_stGenOut.uwNewTIM1COMPR[5];               
                timer_dma_enable(TIMER0,TIMER_DMA_UPD);
                dma_channel_enable(DMA0,DMA_CH4);  

            }
        } 
        //timer_interrupt_flag_clear(TIMER0, TIMER_INT_FLAG_UP);
        TIMER_INTF(TIMER0) = (~(uint32_t)TIMER_INT_FLAG_UP);
    }
    else
    {
    }
    
}

/*!
    \brief      
    \param[in]  none
    \param[out] none
    \retval     none
*/
void TIMER1_IRQHandler(void)
{
    UWORD uwIntSource = 0;
    clasB_uwTIM1Cnt++;
    if (timer_interrupt_flag_get(TIMER1, TIMER_INT_FLAG_UP))
    {
        uwIntSource = 1;
        cadence_voCadenceCal(uwIntSource);
        bikespeed_voBikeSpeedCal(uwIntSource);
        timer_interrupt_flag_clear(TIMER1, TIMER_INT_FLAG_UP);
    }
    else if (timer_interrupt_flag_get(TIMER1, TIMER_INT_FLAG_CH2))
    {
        uwIntSource = 2;        
        cadence_voCadenceCal(uwIntSource);
        if(gpio_input_bit_get(GPIOB, GPIO_PIN_10))
        {
           /* reset the CH2P and CH2NP bits */
           TIMER_CHCTL2(TIMER1) &= (~(uint32_t)(TIMER_CHCTL2_CH2P|TIMER_CHCTL2_CH2NP));
           TIMER_CHCTL2(TIMER1) |= (uint32_t)((uint32_t)(TIMER_IC_POLARITY_FALLING) << 8U);
        }
        else
        {
           /* reset the CH2P and CH2NP bits */
           TIMER_CHCTL2(TIMER1) &= (~(uint32_t)(TIMER_CHCTL2_CH2P|TIMER_CHCTL2_CH2NP));
           TIMER_CHCTL2(TIMER1) |= (uint32_t)((uint32_t)(TIMER_IC_POLARITY_RISING) << 8U);       
        }
        
        timer_interrupt_flag_clear(TIMER1, TIMER_INT_FLAG_CH2);
    }
    else if (timer_interrupt_flag_get(TIMER1, TIMER_INT_FLAG_CH3))
    {
        uwIntSource = 3;
        bikespeed_voBikeSpeedCal(uwIntSource);
        timer_interrupt_flag_clear(TIMER1, TIMER_INT_FLAG_CH3);
    }
}
/*!
    \brief      
    \param[in]  none
    \param[out] none
    \retval     none
*/
void TIMER3_IRQHandler(void)
{
    
    if(timer_interrupt_flag_get(TIMER3, TIMER_INT_FLAG_UP))
    {
        clasB_uwTIM3Cnt++;
        /* TBS interrupt */
        tbs_voIsr();
        timer_interrupt_flag_clear(TIMER3, TIMER_INT_FLAG_UP);
    }
}
/*!
    \brief      
    \param[in]  none
    \param[out] none
    \retval     none
*/
void TIMER5_IRQHandler(void)
{
    if(timer_interrupt_flag_get(TIMER5, TIMER_INT_FLAG_UP))
    {
        clasB_uwTIM5Cnt++;
        TimingTaskTimerServer();
        /* Event_1ms interrupt */
        Event_1ms();
        timer_interrupt_flag_clear(TIMER5, TIMER_INT_FLAG_UP);
    }
}

/*!
    \brief      
    \param[in]  none
    \param[out] none
    \retval     none
*/
void USART0_IRQHandler(void)
{


}
/*!
    \brief      
    \param[in]  none
    \param[out] none
    \retval     none
*/
void DMA1_Channel2_IRQHandler(void)
{
    static UWORD uwTempCount = 0;
    // Read PC Conmand
    if (dma_flag_get(DMA1, DMA_CH2, DMA_INT_FLAG_FTF))
    {
        UART_voCBDoneRead(UART_ERR_OK, 22);
        DMA_CH2CTL(DMA1) &= ~DMA_CHXCTL_CHEN;
        //dma_flag_clear(DMA1, DMA_CH2, DMA_INT_FLAG_FTF);
        DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_INT_FLAG_FTF, DMA_CH2);
        uwTempCount = 22 - DMA_CH2CNT(DMA1);  
        DMA_CH2CNT(DMA1) = uwTempCount;
        DMA_CH2CTL(DMA1) |= DMA_CHXCTL_CHEN;
    }
    // RX error
    if (dma_flag_get(DMA1, DMA_CH2, DMA_FLAG_ERR))
    {
        DMA_CH2CTL(DMA1) &= ~DMA_CHXCTL_CHEN;
        //dma_flag_clear(DMA1, DMA_CH2, DMA_FLAG_ERR);
        DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_FLAG_ERR, DMA_CH2); 
        DMA_CH2CNT(DMA1) = 22;
        DMA_CH2CTL(DMA1) |= DMA_CHXCTL_CHEN;
    }
}


/*!
    \brief      
    \param[in]  none
    \param[out] none
    \retval     none
*/
void DMA1_Channel4_IRQHandler(void)
{
    if (dma_flag_get(DMA1, DMA_CH4, DMA_INT_FLAG_FTF))
    {
        if (UART_stParaStatus.bParaStart)
        {
            UART_bInsertPendTx = FALSE;           // clear insertBuffer pending
            UART_stParaStatus.bParaStart = FALSE; // clear parameter status
        }
        else
        {
            // do nothing
        }
        DMA_CH4CTL(DMA1) &= ~DMA_CHXCTL_CHEN;
        //dma_flag_clear(DMA1, DMA_CH4, DMA_INT_FLAG_FTF);
        DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_INT_FLAG_FTF, DMA_CH4);
        UART_stParaStatus.bWriteBusy = FALSE;
    }
    // TX error
    if (dma_flag_get(DMA1, DMA_CH4, DMA_FLAG_ERR))
    {
        if (UART_stParaStatus.bParaStart)
        {
            UART_bInsertPendTx = FALSE;           // clear insertBuffer pending
            UART_stParaStatus.bParaStart = FALSE; // clear parameter status
        }
        DMA_CH4CTL(DMA1) &= ~DMA_CHXCTL_CHEN;
        //dma_flag_clear(DMA1, DMA_CH4, DMA_FLAG_ERR);
        DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_FLAG_ERR, DMA_CH4); 
        UART_stParaStatus.bWriteBusy = FALSE;
    }
}
/*!
    \brief      
    \param[in]  none
    \param[out] none
    \retval     none
*/
UWORD uwCnts = 0;
void  CAN0_RX0_IRQHandler(void)
{
    can_message_receive(CAN0, CAN_FIFO0, pRxMsg);
    if((pRxMsg->rx_ff != CAN_FF_STANDARD) || (pRxMsg->rx_dlen == 0))
    {
        can_interrupt_enable(CAN0, CAN_INT_RFF0);
        return;
    }
    
    switch (pRxMsg->rx_sfid)
    {
    case ID_PBU_BC:
    case ID_PBU_TO_MC: //鎺ユ敹PBU鏁版嵁
    {
        CAN_RxBuf_Struct_PBU.ucBufID = pRxMsg->rx_sfid;
        CAN_Rx_ISR(&CAN_RxBuf_Struct_PBU, pRxMsg->rx_dlen);
        break;
    }
    case ID_BMS_BC:
    case ID_BMS_TO_MC: //鎺ユ敹BMS鏁版嵁
    {
        CAN_RxBuf_Struct_BMS.ucBufID = pRxMsg->rx_sfid;
        CAN_Rx_ISR(&CAN_RxBuf_Struct_BMS, pRxMsg->rx_dlen);
        break;
    }
    case ID_HMI_BC:
    case ID_HMI_TO_MC: //鎺ユ敹HMI鏁版嵁
    {
        CAN_RxBuf_Struct_HMI.ucBufID = pRxMsg->rx_sfid;
        CAN_Rx_ISR(&CAN_RxBuf_Struct_HMI, pRxMsg->rx_dlen);
        break;
    }
    case ID_CDL_BC:
    case ID_CDL_TO_MC: // case ID_CDL_TO_MC_TE://鎺ユ敹CDL鏁版嵁
    {
        CAN_RxBuf_Struct_CDL.ucBufID = pRxMsg->rx_sfid;
        CAN_Rx_ISR(&CAN_RxBuf_Struct_CDL, pRxMsg->rx_dlen);
        break;
    }
    default:
        break;
    }
        
    can_interrupt_enable(CAN0, CAN_INT_RFF0);

}
void CAN0_RX1_IRQHandler(void)
{

}