gd32f30x_it.c 6.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331
  1. /*!
  2. \file gd32f3x0_it.c
  3. \brief interrupt service routines
  4. */
  5. /*
  6. Copyright (C) 2022 GigaDevice
  7. 2022-12-01, V1.0.0, firmware for GD32F3x0
  8. */
  9. /******************************
  10. * Include File
  11. ******************************/
  12. #include "gd32f30x_it.h"
  13. #include "user.h"
  14. #include "TimeTask_Event.h"
  15. #include "can.h"
  16. #include "FSM_1st.h"
  17. #include "api_rt.h"
  18. #include "sys_ctrl.h"
  19. /******************************
  20. * Parameter
  21. ******************************/
  22. extern uint8_t data;
  23. /******************************
  24. * Function
  25. ******************************/
  26. /*!
  27. \brief this function handles NMI exception
  28. \param[in] none
  29. \param[out] none
  30. \retval none
  31. */
  32. void NMI_Handler(void)
  33. {
  34. }
  35. /*!
  36. \brief this function handles HardFault exception
  37. \param[in] none
  38. \param[out] none
  39. \retval none
  40. */
  41. void HardFault_Handler(void)
  42. {
  43. sysctrl_stPwmState.blPwmOnflg = TRUE;/* HardFault_Handler无法被屏蔽,hw_blPWMOnFlg可能被RAMtest修改 */
  44. sysctrl_voPwmOff();
  45. /* if Hard Fault exception occurs, go to infinite loop */
  46. while (1)
  47. {
  48. //do nothing
  49. }
  50. }
  51. /*!
  52. \brief this function handles MemManage exception
  53. \param[in] none
  54. \param[out] none
  55. \retval none
  56. */
  57. void MemManage_Handler(void)
  58. {
  59. /* if Memory Manage exception occurs, go to infinite loop */
  60. while (1)
  61. {
  62. //do nothing
  63. }
  64. }
  65. /*!
  66. \brief this function handles BusFault exception
  67. \param[in] none
  68. \param[out] none
  69. \retval none
  70. */
  71. void BusFault_Handler(void)
  72. {
  73. /* if Bus Fault exception occurs, go to infinite loop */
  74. while (1)
  75. {
  76. //do nothing
  77. }
  78. }
  79. /*!
  80. \brief this function handles UsageFault exception
  81. \param[in] none
  82. \param[out] none
  83. \retval none
  84. */
  85. void UsageFault_Handler(void)
  86. {
  87. /* if Usage Fault exception occurs, go to infinite loop */
  88. while (1)
  89. {
  90. //do nothing
  91. }
  92. }
  93. /*!
  94. \brief this function handles SVC exception
  95. \param[in] none
  96. \param[out] none
  97. \retval none
  98. */
  99. void SVC_Handler(void)
  100. {
  101. }
  102. /*!
  103. \brief this function handles DebugMon exception
  104. \param[in] none
  105. \param[out] none
  106. \retval none
  107. */
  108. void DebugMon_Handler(void)
  109. {
  110. }
  111. /*!
  112. \brief this function handles PendSV exception
  113. \param[in] none
  114. \param[out] none
  115. \retval none
  116. */
  117. void PendSV_Handler(void)
  118. {
  119. }
  120. /*!
  121. \brief this function handles SysTick exception
  122. \param[in] none
  123. \param[out] none
  124. \retval none
  125. */
  126. void SysTick_Handler(void)
  127. {
  128. iRtTimer_Isr(HW_SYSTICK_TIMER);
  129. }
  130. /*!
  131. \brief
  132. \param[in] none
  133. \param[out] none
  134. \retval none
  135. */
  136. void ADC0_1_IRQHandler(void)
  137. {
  138. /* MCU self check count */
  139. clasB_uwADCCnt++;
  140. iRtAdc_CompleteIsr(0);
  141. }
  142. /*!
  143. \brief
  144. \param[in] none
  145. \param[out] none
  146. \retval none
  147. */
  148. void TIMER0_UP_TIMER9_IRQHandler(void)
  149. {
  150. /* MCU self check count */
  151. clasB_uwTIM0Cnt ++;
  152. iRtPwm_UpdateIsr(0);
  153. }
  154. /*!
  155. \brief
  156. \param[in] none
  157. \param[out] none
  158. \retval none
  159. */
  160. void TIMER1_IRQHandler(void)
  161. {
  162. /* MCU self check count */
  163. clasB_uwTIM1Cnt++;
  164. iRtCap_Isr(0);
  165. }
  166. /*!
  167. \brief
  168. \param[in] none
  169. \param[out] none
  170. \retval none
  171. */
  172. void TIMER3_IRQHandler(void)
  173. {
  174. /* MCU self check count */
  175. clasB_uwTIM3Cnt++;
  176. iRtTimer_Isr(HW_TBS_TIMER);
  177. }
  178. /*!
  179. \brief
  180. \param[in] none
  181. \param[out] none
  182. \retval none
  183. */
  184. void TIMER5_IRQHandler(void)
  185. {
  186. /* MCU self check count */
  187. clasB_uwTIM5Cnt++;
  188. iRtTimer_Isr(HW_EVENT1MS_TIMER);
  189. }
  190. /*!
  191. \brief
  192. \param[in] none
  193. \param[out] none
  194. \retval none
  195. */
  196. void DMA1_Channel2_IRQHandler(void)
  197. {
  198. iRtUart_RxIsr(0);
  199. }
  200. /*!
  201. \brief
  202. \param[in] none
  203. \param[out] none
  204. \retval none
  205. */
  206. void DMA1_Channel4_IRQHandler(void)
  207. {
  208. /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */
  209. if (dma_flag_get(DMA1, DMA_CH4, DMA_INT_FLAG_FTF) != 0)
  210. {
  211. iRtUart_AsyncWriteCompleteIsr(0);
  212. DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_INT_FLAG_FTF, DMA_CH4);
  213. }
  214. // TX error
  215. if (dma_flag_get(DMA1, DMA_CH4, DMA_FLAG_ERR) != 0)
  216. {
  217. iRtUart_AsyncWriteErrorIsr(0);
  218. DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_FLAG_ERR, DMA_CH4);
  219. }
  220. // if (dma_flag_get(DMA1, DMA_CH4, DMA_INT_FLAG_FTF) != 0)
  221. // {
  222. // if (UART_stParaStatus.bParaStart)
  223. // {
  224. // UART_bInsertPendTx = FALSE; // clear insertBuffer pending
  225. // UART_stParaStatus.bParaStart = FALSE; // clear parameter status
  226. // }
  227. // else
  228. // {
  229. // // do nothing
  230. // }
  231. // DMA_CH4CTL(DMA1) &= ~DMA_CHXCTL_CHEN;
  232. // //dma_flag_clear(DMA1, DMA_CH4, DMA_INT_FLAG_FTF);
  233. // DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_INT_FLAG_FTF, DMA_CH4);
  234. // UART_stParaStatus.bWriteBusy = FALSE;
  235. // }
  236. // /* TX error */
  237. // if (dma_flag_get(DMA1, DMA_CH4, DMA_FLAG_ERR) != 0)
  238. // {
  239. // if (UART_stParaStatus.bParaStart)
  240. // {
  241. // UART_bInsertPendTx = FALSE; // clear insertBuffer pending
  242. // UART_stParaStatus.bParaStart = FALSE; // clear parameter status
  243. // }
  244. // DMA_CH4CTL(DMA1) &= ~DMA_CHXCTL_CHEN;
  245. // //dma_flag_clear(DMA1, DMA_CH4, DMA_FLAG_ERR);
  246. // DMA_INTC(DMA1) |= DMA_FLAG_ADD(DMA_FLAG_ERR, DMA_CH4);
  247. // UART_stParaStatus.bWriteBusy = FALSE;
  248. // }
  249. }
  250. /*!
  251. \brief
  252. \param[in] none
  253. \param[out] none
  254. \retval none
  255. */
  256. void CAN0_RX0_IRQHandler(void)
  257. {
  258. can_message_receive(CAN0, CAN_FIFO0, pRxMsg);
  259. if((pRxMsg->rx_ff != CAN_FF_STANDARD) || (pRxMsg->rx_dlen == 0))
  260. {
  261. can_interrupt_enable(CAN0, CAN_INT_RFF0);
  262. return;
  263. }
  264. switch (pRxMsg->rx_sfid)
  265. {
  266. case ID_PBU_BC:
  267. case ID_PBU_TO_MC: //接收PBU数据
  268. {
  269. CAN_RxBuf_Struct_PBU.ucBufID = (UWORD)pRxMsg->rx_sfid;
  270. CAN_Rx_ISR(&CAN_RxBuf_Struct_PBU, pRxMsg->rx_dlen);
  271. break;
  272. }
  273. case ID_BMS_BC:
  274. case ID_BMS_TO_MC: //接收BMS数据
  275. {
  276. CAN_RxBuf_Struct_BMS.ucBufID = (UWORD)pRxMsg->rx_sfid;
  277. CAN_Rx_ISR(&CAN_RxBuf_Struct_BMS, pRxMsg->rx_dlen);
  278. break;
  279. }
  280. case ID_HMI_BC:
  281. case ID_HMI_TO_MC: //接收HMI数据
  282. {
  283. CAN_RxBuf_Struct_HMI.ucBufID = (UWORD)pRxMsg->rx_sfid;
  284. CAN_Rx_ISR(&CAN_RxBuf_Struct_HMI, pRxMsg->rx_dlen);
  285. break;
  286. }
  287. case ID_CDL_BC:
  288. case ID_CDL_TO_MC: // case ID_CDL_TO_MC_TE://接收CDL数据
  289. {
  290. CAN_RxBuf_Struct_CDL.ucBufID = (UWORD)pRxMsg->rx_sfid;
  291. CAN_Rx_ISR(&CAN_RxBuf_Struct_CDL, pRxMsg->rx_dlen);
  292. break;
  293. }
  294. default:
  295. break;
  296. }
  297. can_interrupt_enable(CAN0, CAN_INT_RFF0);
  298. }