motor_ctl-4/User project/5.Api_rt/api_rt_adc.c

#include "api_rt_adc.h"
#include "gd32f30x.h"

Adc_Handle Adcs[3];


void iRtAdc_Init(void)
{
    // ADC0 Regular
    Adcs[0].AdcBase = ADC0;
    Adcs[0].DmaBase = DMA0;
    Adcs[0].DmaChannelBase = DMA_CH0;
    for (int i = 0; i < ADC_RESULT_SIZE; i++)
    {
        Adcs[0].Results[i] = 0;
    }
    // ADC0 Injected
    Adcs[1].AdcBase = ADC0;
    for (int i = 1; i < ADC_RESULT_SIZE; i++)
    {
        Adcs[1].Results[i] = 0;
    }
    // ADC1 Injected
    Adcs[2].AdcBase = ADC1;
    for (int i = 0; i < ADC_RESULT_SIZE; i++)
    {
        Adcs[2].Results[i] = 0;
    }

};
//void AdcLow_CompleteIsr(uint8_t devIndex);

uint16_t iAdc_GetResult(uint8_t devIndex, uint8_t channelIndex)
{
//    ASSERT_LESS(devIndex, 1);
    return Adcs[devIndex].Results[channelIndex];
}

uint16_t* iAdc_GetResultPointer(uint8_t devIndex)
{
  //    ASSERT_LESS(devIndex, 1);
    return Adcs[devIndex].Results;
}

void iAdc_Enable(uint8_t devIndex)
{
//    ASSERT_LESS(devIndex, 1);
    if(RESET == (ADC_CTL1(Adcs[devIndex].AdcBase) & ADC_CTL1_ADCON)){
        ADC_CTL1(Adcs[devIndex].AdcBase) |= (uint32_t)ADC_CTL1_ADCON;
    }   
}

void iAdc_Disable(uint8_t devIndex)
{
//    ASSERT_LESS(devIndex, 1);
    ADC_CTL1(Adcs[devIndex].AdcBase) &= ~((uint32_t)ADC_CTL1_ADCON);
}

ApiAdc_Status iAdc_GetStatus(uint8_t devIndex)
{
     if (ADC_STAT(Adcs[devIndex].AdcBase) & ADC_STAT_EOC != 0)
    {
        return ApiAdc_End;
    }
    else
    {
        return ApiAdc_Converting;
    }
}

void iAdc_Convert(uint8_t devIndex)
{
  //for regular only
    ADC_CTL1(Adcs[devIndex].AdcBase) |= ADC_CTL1_SWRCST;
}

void iAdc_ChannelGroupSwitch(uint8_t devIndex, uint8_t groupIndex)
{
}

void iAdc_EnableConversionInterrupt(uint8_t devIndex)
{

}

void iAdc_EnableHardwareTrigger(uint8_t devIndex);
void iAdc_DisableHardwareTrigger(uint8_t devIndex);